A diffusion-resistant copper core ball high-bandwidth chip stacking packaging structure
Patent Information
- Application Number
- CN202522202008.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-17
- Publication Date
- 2026-09-22
- Estimated Expiration
- 2035-10-17
AI Technical Summary
[0002]相关技术中，铜核球的铜球芯与锡基焊料之间通常无阻挡层结构，使得铜球芯直接与锡基焊料接触，在多次高温回流过程中易形成过厚的脆性Cu6Sn5金属间化合物，从而引发界面脆化问题
[0013]本申请实施例中，通过在铜球芯的外周表面引入材料为镍或钛的阻挡层，以较为有效地阻断铜球芯与锡基焊料之间的直接反应，有利于抑制Cu6Sn5等脆性金属间化合物的形成，从而缓解在高温、高湿环境下因脆性金属间化合物引发的失效问题，提升铜核球与封装主体连接的热稳定性与可靠性。也降低了在温度循环荷载的作用下铜核球与封装主体之间焊点的应力集中和应变积累，显著改善其抗热疲劳性能，延长封装结构在高可靠性应用场景下的使用寿命。界面金属间化合物Cu6Sn5的生成速率较低，也降低了本申请的封装结构的寄生电阻和电感，有利于提高相关高频信号的完整性，继而有利于满足5G通信、高性能计算等对高速、高频互连要求极高的新型封装系统的需求。再者，本申请材料为镍或钛的阻挡层还能够抑制柯肯达尔空洞的产生，有利于从根本上避免界面空洞诱发的失效机制，继而有利于提升铜核球与封装主体之间的焊点的机械强度与热稳定性。此外，本申请采用镍或钛作为阻挡层的技术方案可以依托相关成熟的电镀与化学镀工艺平台，工艺流程简单、可靠，且不引入额外复杂工序，具备良好的工艺兼容性与可量产性，适合在相关封装生产线中快速导入与规模化应用。
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Figure CN224791095U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of electronic packaging technology, and in particular to a high-bandwidth chip stacking packaging structure with anti-diffusion copper core spheres. Background Technology
[0002] In related technologies, copper core balls typically lack a barrier layer between the copper core and the tin-based solder, allowing the copper core to directly contact the solder. During repeated high-temperature reflows, this can easily lead to the formation of excessively thick, brittle Cu6Sn5 intermetallic compounds, causing interface embrittlement. Furthermore, under long-term service conditions of the packaged structure, mismatched diffusion rates of interfacial elements can easily generate Kirkendal voids, further weakening the mechanical strength and thermal stability of the solder joint. Utility Model Content
[0003] This invention provides a high-bandwidth chip stacking package structure with anti-diffusion copper core balls, which aims to suppress the growth rate of intermetallic compounds at the interface and improve the thermal fatigue resistance of the solder joints between the copper core balls and the package body, thereby extending the life of the package structure.
[0004] To achieve the above objectives, this utility model provides a diffusion-resistant copper core ball high-bandwidth chip stacking package structure, comprising:
[0005] The package body includes a first interconnect layer and a second interconnect layer arranged at intervals;
[0006] A chip is disposed between the first interconnect layer and the second interconnect layer, and the chip is electrically connected to the first interconnect layer;
[0007] A copper core ball is disposed between the first interconnect layer and the second interconnect layer to give the package body a vertical conductive path. The copper core ball includes a copper core, a barrier layer and a tin-based solder. The barrier layer is made of nickel or titanium and covers the outer peripheral surface of the copper core. The tin-based solder is disposed on the side of the barrier layer opposite to the copper core so that the barrier layer can isolate the copper core and the tin-based solder.
[0008] In one embodiment, the packaging structure further includes a molding compound disposed between the first interconnect layer and the second interconnect layer, the molding compound being capable of encapsulating the copper core ball and the chip.
[0009] In one embodiment, the size of the copper core ball is larger than the size of the molding compound in the arrangement direction of the first interconnect layer and the second interconnect layer.
[0010] In one embodiment, a DAF film is disposed between the chip and the first interconnect layer.
[0011] In one embodiment, the number of copper core spheres is multiple.
[0012] The above-mentioned solution of this utility model has the following beneficial effects:
[0013] In this embodiment, a barrier layer made of nickel or titanium is introduced on the outer peripheral surface of the copper core to effectively block the direct reaction between the copper core and the tin-based solder. This helps to suppress the formation of brittle intermetallic compounds such as Cu6Sn5, thereby alleviating failure problems caused by brittle intermetallic compounds in high-temperature and high-humidity environments and improving the thermal stability and reliability of the connection between the copper core and the package body. It also reduces stress concentration and strain accumulation at the solder joints between the copper core and the package body under temperature cycling loads, significantly improving its thermal fatigue resistance and extending the service life of the package structure in high-reliability applications. The low formation rate of the intermetallic compound Cu6Sn5 also reduces the parasitic resistance and inductance of the package structure, which helps to improve the integrity of related high-frequency signals, and thus helps to meet the needs of new packaging systems with extremely high requirements for high-speed and high-frequency interconnection, such as 5G communication and high-performance computing. Furthermore, the nickel or titanium barrier layer in this application can suppress the formation of Kirkendal voids, which helps to fundamentally avoid the failure mechanism induced by interface voids, thereby improving the mechanical strength and thermal stability of the solder joint between the copper core ball and the package body. In addition, the technical solution of using nickel or titanium as the barrier layer in this application can rely on relevant mature electroplating and electroless plating process platforms. The process flow is simple and reliable, and does not introduce additional complex steps. It has good process compatibility and mass production capability, and is suitable for rapid introduction and large-scale application in relevant packaging production lines.
[0014] Other beneficial effects of this invention will be described in detail in the following detailed description section. Attached Figure Description
[0015] Figure 1 This is a schematic diagram of the packaging structure in one embodiment of the present invention;
[0016] Figure 2 This is a schematic diagram of the structure of the copper core sphere in one embodiment of the present invention.
[0017] [Explanation of Labels in the Attached Image]
[0018] 1. Package body; 11. First interconnect layer; 12. Second interconnect layer; 2. Chip; 3. Copper core ball; 31. Copper ball core; 32. Barrier layer; 33. Tin-based solder; 4. Molded body; 5. DAF film. Detailed Implementation
[0019] To make the technical problems, solutions, and advantages of this utility model clearer, a detailed description will be provided below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are only some, not all, of the embodiments of this utility model. All other embodiments obtained by those skilled in the art based on the embodiments of this utility model without creative effort are within the scope of protection of this utility model. Furthermore, the technical features involved in the different embodiments of this utility model described below can be combined with each other as long as they do not conflict with each other.
[0020] In the description of this utility model, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings and are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0021] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a locking connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.
[0022] This application addresses the reliability issue of the solder joint between the copper core ball and the package body in high-bandwidth packaging structures, providing a diffusion-resistant copper core ball high-bandwidth chip stacking packaging structure. The packaging structure of this application is suitable for advanced packaging scenarios with high requirements for packaging structure reliability and thermal stability, including but not limited to multi-layer stacked packaging of automotive electronics, 5G communication equipment, aerospace electronic systems, and high-performance computing chips. By optimizing the interface structure between the copper core ball and the tin-based solder, this application effectively enhances the mechanical and metallurgical bonding strength of the interconnect interface between the copper core ball and the package body, thereby significantly improving the thermal fatigue life and long-term reliability of the solder joint between the copper core ball and the package body under harsh service environments such as high temperature, high humidity, and thermal cycling. Furthermore, the introduction of a barrier layer reduces the parasitic resistance and inductance of the packaging structure while maintaining good soldering performance, helping to improve the performance of the packaging structure under high-speed or high-frequency signal transmission.
[0023] Specifically, please refer to Figure 1The package structure includes a package body 1, a chip 2, and a copper core ball 3. The package body 1 includes a first interconnect layer 11 and a second interconnect layer 12 arranged at intervals. The first interconnect layer 11 can be a package substrate or a wiring layer. The second interconnect layer 12 can also be a package substrate or a wiring layer. The chip 2 is disposed between the first interconnect layer 11 and the second interconnect layer 12, and the chip 2 is electrically connected to the first interconnect layer 11. For example, the chip 2 can be electrically connected to the first interconnect layer 11 via copper pillars or microbumps. The copper core ball 3 is disposed between the first interconnect layer 11 and the second interconnect layer 12 to provide a vertical conductive path for the package body 1, and can also serve as a stress buffer structure between the first interconnect layer 11 and the second interconnect layer 12.
[0024] Please see Figure 2 The copper core ball 3 includes a copper core 31, a barrier layer 32, and a tin-based solder 33. The barrier layer 32 is made of nickel or titanium and covers the outer peripheral surface of the copper core 31. The tin-based solder 33 is disposed on the side of the barrier layer 32 away from the copper core 31, so that the barrier layer 32 can isolate the copper core 31 and the tin-based solder 33, thereby effectively suppressing the formation of brittle Cu6Sn5 intermetallic compounds during multiple high-temperature reflows of the package structure.
[0025] It should be explained that pure tin solder has a melting point as high as 231.9°C, and in actual packaging, it needs to undergo high-temperature reflow treatment. During high-temperature reflow, the tin-based solder 33 reacts violently with the copper ball core 31, easily forming an excessively thick brittle Cu6Sn5 intermetallic compound, which leads to solder joint embrittlement and affects interconnect reliability.
[0026] In this embodiment, by introducing a barrier layer 32 made of nickel or titanium on the outer peripheral surface of the copper core 31, the direct reaction between the copper core 31 and the tin-based solder 33 is effectively blocked. This helps to suppress the formation of brittle intermetallic compounds such as Cu6Sn5, thereby alleviating the failure problem caused by brittle intermetallic compounds in high-temperature and high-humidity environments and improving the thermal stability and reliability of the connection between the copper core ball 3 and the package body 1. It also reduces the stress concentration and strain accumulation at the solder joint between the copper core ball 3 and the package body 1 under temperature cycling loads, significantly improving its thermal fatigue resistance and extending the service life of the package structure in high-reliability application scenarios. The low formation rate of the intermetallic compound Cu6Sn5 also reduces the parasitic resistance and inductance of the package structure in this application, which helps to improve the integrity of related high-frequency signals, and thus helps to meet the needs of new packaging systems with extremely high requirements for high-speed and high-frequency interconnection, such as 5G communication and high-performance computing. Furthermore, the nickel or titanium barrier layer 32 in this application can suppress the formation of Kirkendal voids, which helps to fundamentally avoid the failure mechanism induced by interface voids, thereby improving the mechanical strength and thermal stability of the solder joint between the copper core ball 3 and the package body 1. In addition, the technical solution of using nickel or titanium as the barrier layer 32 in this application can rely on relevant mature electroplating and electroless plating process platforms. The process flow is simple and reliable, and does not introduce additional complex steps. It has good process compatibility and mass production capability, and is suitable for rapid introduction and large-scale application in relevant packaging production lines.
[0027] In one embodiment, please refer to Figure 1 The packaging structure also includes a molding compound 4, which is disposed between the first interconnect layer 11 and the second interconnect layer 12. The molding compound 4 can cover the copper core ball 3 and the chip 2 to reduce the possibility of the chip 2 being damaged, scratched or contaminated by external impact.
[0028] For example, the encapsulation body 4 can be injection molded using high-performance epoxy molding compound to cover the outer peripheral surfaces of the copper core ball 3 and the chip 2.
[0029] In one embodiment, please refer to Figure 1 In the arrangement direction of the first interconnect layer 11 and the second interconnect layer 12, the size of the copper core ball 3 is larger than the size of the molding compound 4, so that the copper core ball 3 can be better soldered to the second interconnect layer 12. For example, after the injection-molded molding compound 4 has cured, it is polished by high-precision chemical mechanical polishing to more accurately control the amount of molding compound 4 removed so that the size of the copper core ball 3 is larger than the size of the molding compound 4, thereby exposing the upper surface of the copper core ball 3 and ensuring the flatness and coplanarity of the subsequent interconnect interface.
[0030] In one embodiment, a DAF film 5 is disposed between the chip 2 and the first interconnect layer 11 to fix the chip 2 onto the first interconnect layer 11. It should be noted that DAF (Die Attach Film) is a high-performance adhesive film used for connecting the chip 2 and the packaging substrate. It has excellent adhesion and thermal conductivity, remains stable at high temperatures, and provides reliable mechanical connection and thermal management for the chip 2. For example, the DAF film 5 can be a thermosetting or photosensitive adhesive material.
[0031] In one embodiment, please refer to Figure 1 The number of copper core balls 3 is multiple to improve the strength and stability of the electrical connection between the first interconnect layer 11 and the second interconnect layer 12.
[0032] The above description is the preferred embodiment of this utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of this utility model, and these improvements and modifications should also be considered within the protection scope of this utility model.
Claims
1. A diffusion-resistant copper core ball high-bandwidth chip stacking package structure, characterized in that, include: The package body includes a first interconnect layer and a second interconnect layer arranged at intervals; A chip is disposed between the first interconnect layer and the second interconnect layer, and the chip is electrically connected to the first interconnect layer; A copper core ball is disposed between the first interconnect layer and the second interconnect layer to give the package body a vertical conductive path. The copper core ball includes a copper core, a barrier layer and a tin-based solder. The barrier layer is made of nickel or titanium and covers the outer peripheral surface of the copper core. The tin-based solder is disposed on the side of the barrier layer opposite to the copper core so that the barrier layer can isolate the copper core and the tin-based solder.
2. The anti-diffusion copper core ball high-bandwidth chip stacking packaging structure according to claim 1, characterized in that, The packaging structure further includes a molding compound disposed between the first interconnect layer and the second interconnect layer, the molding compound being capable of encapsulating the copper core ball and the chip.
3. The anti-diffusion copper core ball high-bandwidth chip stacking packaging structure according to claim 2, characterized in that, In the arrangement direction of the first interconnect layer and the second interconnect layer, the size of the copper core ball is larger than the size of the molding compound.
4. The anti-diffusion copper core ball high-bandwidth chip stacking packaging structure according to claim 1, characterized in that, A DAF film is disposed between the chip and the first interconnect layer.
5. The anti-diffusion copper core ball high-bandwidth chip stacking packaging structure according to claim 1, characterized in that, The number of copper core spheres is multiple.