Display panel
Patent Information
- Application Number
- CN202522180639.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-15
- Publication Date
- 2026-09-25
- Estimated Expiration
- 2035-10-15
AI Technical Summary
[0003]在现有的显示面板的制造工艺中,PI液(聚酰亚胺)通过印刷技术涂布于基板上后,在经过高温烘烤工序进行固化的过程中,PI膜受热会发生收缩(回缩),若PI膜回缩严重,致使其边缘过于靠近甚至侵入有效显示区(AA区,Active Area),导致该区域的液晶分子失去均匀地配向层锚定,其排列状态会发生异常,使该区域的液晶分子排列与正常显示区域的排列不同,从而造成有效显示区周边出现显示缺陷,出现亮度或色度不均现象,影响显示面板的视觉效果和产品良率
[0015]由上可知,本实用新型上述技术特征可以具有如下一个或多个有益效果:通过在布线区设置阻挡区块,将涂布后的PI液限定在预设区域,有效阻止其在后续高温固化烘烤过程中因受热而朝向显示区方向发生过度回缩,确保显示区边缘和中心区域的液晶分子的排列方向一致,防止显示区边缘亮度缺陷,提升显示面板的视觉效果和视觉效果。
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Figure CN224803333U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of liquid crystal panel display technology, and in particular to a display panel. Background Technology
[0002] Thin-film transistor liquid crystal displays (TFT-LCDs) mainly consist of a color filter (CF) substrate, a thin-film transistor (TFT) array substrate, and liquid crystal material injected between the two substrates. To ensure that the liquid crystal molecules have a consistent initial alignment orientation, a polyimide (PI) alignment film is coated on the inner surfaces of the CF substrate and the TFT substrate. This film controls the alignment orientation of the liquid crystal molecules. After the applied voltage is removed, the liquid crystal molecules return to their initial state due to their own viscoelasticity and the strong interaction force between them and the PI film interface.
[0003] In the existing display panel manufacturing process, after PI liquid (polyimide) is coated onto the substrate using printing technology, it undergoes a high-temperature baking process for curing. During this process, the PI film shrinks (retracts) due to heat. If the PI film shrinks severely, its edges may become too close to or even encroach on the active display area (AA area). This causes the liquid crystal molecules in that area to lose uniform alignment layer anchoring, resulting in abnormal alignment. Consequently, the liquid crystal molecules in that area are arranged differently from those in the normal display area, causing display defects around the active display area, resulting in uneven brightness or color, which affects the visual effect and product yield of the display panel. Utility Model Content
[0004] In order to improve at least some of the shortcomings or deficiencies in the prior art, embodiments of the present invention provide a display panel that prevents brightness defects at the edge of the display area and improves the visual effect and performance of the display panel.
[0005] On one hand, the present invention provides a display panel, a substrate, including a wiring area and a display area, the wiring area surrounding the periphery of the display area; a blocking block located on the wiring area, the blocking block including a first row of blocking walls and a second row of blocking walls, the first row of blocking walls and the second row of blocking walls being arranged at intervals along the periphery of the display area; and an alignment film layer located on the substrate, the blocking block protruding from the alignment film layer.
[0006] In some embodiments, the first row of retaining walls includes a plurality of first retaining wall protrusions, which are spaced apart and arranged in a direction perpendicular to the periphery of the display area; the second row of retaining walls includes a plurality of second retaining wall protrusions, which are spaced apart and arranged in a direction perpendicular to the periphery of the display area; the interval between each pair of adjacent first retaining wall protrusions corresponds to one of the plurality of second retaining wall protrusions.
[0007] In some embodiments, the width of the first retaining wall protrusion and the second retaining wall protrusion is 6μm-10μm.
[0008] In some embodiments, the lengths of the first and second retaining wall protrusions are 100μm-400μm.
[0009] In some embodiments, the height of the first and second barrier protrusions is 1 μm-5 μm, and the thickness of the alignment film is 0.01 μm-1 μm.
[0010] In some embodiments, both the first retaining wall protrusion and the second retaining wall protrusion are elongated protrusions.
[0011] In some embodiments, the blocking area further includes a third row of blocking walls, wherein the first row of blocking walls, the second row of blocking walls, and the third row of blocking walls are arranged at intervals along the periphery of the display area.
[0012] In some embodiments, the third row of retaining walls includes a plurality of third retaining wall protrusions, the plurality of third retaining wall protrusions being spaced apart and arranged in a direction perpendicular to the periphery of the display area; the interval between each two adjacent second retaining wall protrusions corresponds to one of the plurality of third retaining wall protrusions.
[0013] In some embodiments, the blocking area includes multiple groups, which are arranged at intervals and the arrangement direction of the multiple groups of blocking areas is parallel to the peripheral direction of the display area.
[0014] In some embodiments, the distance between two adjacent groups of the blocking blocks ranges from 40 μm to 80 μm.
[0015] As can be seen from the above, the above-mentioned technical features of this utility model can have one or more of the following beneficial effects: by setting a blocking block in the wiring area, the coated PI liquid is confined to a preset area, which effectively prevents it from excessively shrinking towards the display area due to heat during the subsequent high-temperature curing and baking process, ensuring that the liquid crystal molecules in the edge and center areas of the display area are aligned, preventing brightness defects at the edge of the display area, and improving the visual effect and visual quality of the display panel. Attached Figure Description
[0016] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0017] Figure 1This is a top view of a display panel provided in an embodiment of the present utility model.
[0018] Figure 2 This is a partial cross-sectional view of a display panel provided in an embodiment of the present utility model.
[0019] Figure 3 for Figure 1 An enlarged schematic diagram of the structure at point A of a display panel.
[0020] Figure 4 A process flow diagram of a display panel provided for an embodiment of this utility model.
[0021] Figure label: 10. Substrate; 110. Wiring area; 120. Display area; 20. Blocking block; 210. First row of blocking walls; 211. First blocking wall protrusion; 220. Second row of blocking walls; 221. Second blocking wall protrusion; 230. Third row of blocking walls; 231. Third blocking wall protrusion; 30. Alignment film layer. Detailed Implementation
[0022] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.
[0023] See Figure 1 and Figure 2 This invention provides a display panel, including a substrate 10, a blocking block 20, and an alignment film layer 30. The substrate 10 is, for example, a color filter (CF) substrate or a thin-film transistor (TFT) array substrate. The substrate 10 includes a wiring region 110 and a display region 120. The wiring region 110 surrounds the periphery of the display region 120, and the wiring region 110 is the non-display region surrounding the periphery of the display region 120. The blocking block 20 is located on the wiring region 110 and includes a first row of blocking walls 210 and a second row of blocking walls 220, which are spaced apart along the periphery of the display region 120. The alignment film layer 30 is located on the substrate 10, and the blocking block 20 protrudes from the alignment film layer 30. The first row of blocking walls 210 and the second row of blocking walls 220 may, for example, be blocking walls composed of multiple protrusions.
[0024] By setting a blocking block 20 on the wiring area 110, and setting the protruding alignment film layer 30 of the blocking block 20, that is, the first row of blocking walls 210 and the second row of blocking walls 220 protruding from the alignment film layer 30, a reliable physical barrier is formed, which precisely limits the polyimide (PI liquid) within a preset range, preventing it from being overheated and excessively retracting towards the display area 120, ensuring that the liquid crystal molecules at the edge of the display area 120 are arranged the same as those in the normal display area, eliminating uneven display in the surrounding area of the display area 120, and improving the visual effect and product yield of the display panel.
[0025] By using the first row of baffles 210 and the second row of baffles 220 spaced apart, it is further ensured that the blocking blocks 20 can effectively block the retraction of the alignment film layer 30, reduce display defects in the display area 120, and ensure the product yield of the display panel. The blocking blocks 20 (i.e., the first row of baffles 210 and the second row of baffles 220) are, for example, made of photosensitive resin (PS) and can be formed on the wiring area 110 by photolithography.
[0026] See Figure 4 The process flow of this utility model embodiment includes, for example: Step 1: Provide a substrate 10, which is an array substrate or a CF color filter substrate. The substrate 10 includes a display area (AA area) 120 and a wiring area 110 surrounding the display area 120. A blocking block 20 is provided on the wiring area 110.
[0027] Step 2: Clean the substrate 10.
[0028] Step 3: PI coating. PI liquid (polyimide) is coated onto the substrate 10 to form an alignment film layer 30.
[0029] Step 4: Pre-baking to evaporate most of the solvent in the PI solution and to preliminarily shape the alignment film layer 30.
[0030] Step 5, main solid baking, causes the alignment film layer 30 to undergo a polymer polymerization reaction at high temperature. During this process, the alignment film layer 30 shrinks back due to heat, flowing towards the display area 120. The blocking block 20 acts as a barrier to prevent the alignment film layer 30 from shrinking back due to heat. Before solid baking the alignment film layer 30, an automated optical inspection (AOI) is required to determine whether there are any inhomogeneities, foreign objects, or overflows in the PI solution.
[0031] See Figure 3In some embodiments, the first row of baffles 210 includes a plurality of first baffle protrusions 211, which are spaced apart and arranged in a direction perpendicular to the periphery of the display area 120; the second row of baffles 220 includes a plurality of second baffle protrusions 221, which are spaced apart and arranged in a direction perpendicular to the periphery of the display area 120; the interval between each pair of adjacent first baffle protrusions 211 corresponds to one of the plurality of second baffle protrusions 221, that is, the interval between each pair of adjacent second baffle protrusions 221 is... Each of the multiple first barrier protrusions 211 is positioned at a time to ensure that when the alignment film layer 30 retracts due to heat, it is blocked by at least one barrier protrusion. This ensures that the gap between the first barrier protrusions 211 of the first row of barrier walls 210 is covered by the second barrier protrusions 221 of the second row of barrier walls 220, and vice versa. This ensures that the edge of the alignment film layer 30 is locked within a set range, thereby controlling the fluid movement of the alignment film layer 30, preventing excessive retraction of the alignment film layer 30 from affecting the display effect at the edge of the display area 120, and improving the reliability of blocking the alignment film layer 30. The first barrier protrusions 211 and the second barrier protrusions 221 are, for example, made of photosensitive resin material.
[0032] See Figure 2 and Figure 3 In some embodiments, the width of the first barrier protrusion 211 and the second barrier protrusion 221 is 6μm-10μm. For example, the width of the first barrier protrusion 211 and the second barrier protrusion 221 can be 6μm, 8μm or 10μm, to ensure that the first barrier protrusion 211 and the second barrier protrusion 221 can be stably and clearly developed, avoiding defects such as broken lines, residue or shape distortion caused by insufficient resolution, ensuring process yield and improving production stability.
[0033] In some embodiments, the lengths of the first baffle protrusion 211 and the second baffle protrusion 221 are 100μm-400μm. For example, the lengths of the first baffle protrusion 211 and the second baffle protrusion 221 can be, for example, 100μm, 200μm, 300μm, or 400μm, to ensure that each first baffle protrusion 211 and the second baffle protrusion 221 has sufficient effective blocking volume, which can efficiently disperse and withstand the fluid shear force generated by the retraction of PI liquid, avoid structural damage caused by excessive pressure per unit area, and improve the process completeness of the first baffle protrusion 211 and the second baffle protrusion 221.
[0034] In some embodiments, the heights of the first barrier protrusion 211 and the second barrier protrusion 221 are 1 μm to 5 μm. For example, the heights of the first barrier protrusion 211 and the second barrier protrusion 221 may be 1 μm, 3 μm, or 5 μm. While ensuring the blocking function to prevent the alignment film layer 30 from excessively retracting towards the display area 120, the first barrier protrusion 211 and the second barrier protrusion 221 also provide support, supporting the spacing between the color filter substrate and the film transistor array substrate in the thin-film transistor liquid crystal display.
[0035] Furthermore, the thickness of the alignment film 30 is 0.01 μm-1 μm to ensure the continuity and integrity of the alignment film 30 and to prevent excessive thickness of the alignment film 30 from affecting the blocking effect of the first and second barrier protrusions. For example, the thickness of the alignment film 30 can be, for example, 0.01 μm, 0.5 μm, or 1 μm.
[0036] See Figure 3 In some embodiments, the first barrier protrusion 211 and the second barrier protrusion 221 are elongated protrusions, providing an effective blocking area and ensuring the blocking effect of the first barrier protrusion 211 and the second barrier protrusion 221. The elongated protrusion may be, for example, a triangular protrusion, a circular protrusion, or a trapezoidal protrusion.
[0037] See Figure 2 and Figure 3 In some embodiments, the blocking block 20 further includes a third row of baffles 230, with the first row of baffles 210, the second row of baffles 220, and the third row of baffles 230 arranged at intervals along the periphery of the display area 120. By setting multiple rows of baffles, when the alignment film layer 30 retracts, the PI liquid needs to continuously change its flow path and impact the protruding entities, significantly consuming its kinetic energy in each row, thus achieving a better blocking effect. Furthermore, the blocking block 20 may also include, for example, a fourth row of baffles, a fifth row of baffles, an (n-1)th row of baffles, and an nth row of baffles, wherein the structure of the odd-numbered rows of baffles is similar to that of the first row of baffles 210, and the structure of the even-numbered rows of baffles is similar to that of the second row of baffles 220.
[0038] See Figure 3In some embodiments, the third row of baffles 230 includes a plurality of third baffle protrusions 231, which are spaced apart and arranged in a direction perpendicular to the periphery of the display area 120. The interval between each pair of adjacent second baffle protrusions 221 corresponds to one of the plurality of third baffle protrusions 231, that is, the interval between each pair of adjacent third baffle protrusions 231 corresponds to one of the plurality of second baffle protrusions 221. By setting an alternating layout of gaps and protrusions, it is ensured that the fluid retracting from the alignment film layer 30 is blocked by at least one baffle protrusion in the flow path, eliminating leakage channels for the fluid to bypass the baffle protrusions and realizing control of the fluid movement of the alignment film layer 30.
[0039] See Figure 1 , Figure 2 and Figure 3 In some embodiments, the blocking blocks 20 include multiple sets, which are arranged at intervals and in an orientation parallel to the periphery of the display area 120. These multiple sets of blocking blocks 20 provide multiple physical barriers and a continuous blocking gradient, precisely limiting the retraction distance of the alignment film layer 30 within multiple consecutive small stages. This enhances the reliability and stability of the blocking blocks 20 as retraction barriers, ensuring that the alignment film layer 30 does not retract to the periphery of the display area 120, thus guaranteeing the display effect around the display area 120.
[0040] In some embodiments, the distance between two adjacent groups of blocking blocks 20 is in the range of 40μm-80μm. For example, the blocking blocks 20 may include a first group of blocking blocks and a second group of blocking blocks. Each group of blocking blocks includes a first row of retaining walls 210, a second row of retaining walls 220 and a third row of retaining walls 230. The distance between two adjacent groups of blocking blocks 20 is the distance between the third row of retaining walls 230 of the first group of retaining walls and the first row of retaining walls 210 of the second group of retaining walls. The distance between two adjacent groups of blocking blocks 20 may be, for example, 40μm, 60μm or 80μm. By setting the distance range between two adjacent blocking blocks 20, it can be ensured that the PI liquid can achieve optimal leveling and solution evaporation between the two blocking blocks 20 during the PI liquid coating process. If the distance between two adjacent blocking blocks 20 is too close, the two blocking blocks 20 will functionally degenerate into a wider single barrier, losing the significance of multi-level buffering. If the distance is too far, the two blocking blocks 20 will not be able to form an effective relay barrier. Therefore, both blocking effect and coating quality can be achieved.
[0041] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this utility model are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such terms can be used interchangeably where appropriate so that the embodiments of the utility model described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0042] Furthermore, it is understood that the foregoing embodiments are merely illustrative examples of this utility model. Provided that the technical features do not conflict, the structure is not contradictory, and the purpose of this utility model is not violated, the technical solutions of the various embodiments can be arbitrarily combined and used.
[0043] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model, and not to limit it. Although this utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this utility model.
Claims
1. A display panel, characterized in that, include: The substrate (10) includes a wiring area (110) and a display area (120), wherein the wiring area (110) surrounds the periphery of the display area (120); A blocking block (20) is located on the wiring area (110). The blocking block (20) includes a first row of blocking walls (210) and a second row of blocking walls (220). The first row of blocking walls (210) and the second row of blocking walls (220) are arranged at intervals along the periphery of the display area (120). An alignment film layer (30) is located on the substrate (10), and the blocking block (20) protrudes from the alignment film layer (30).
2. The display panel as described in claim 1, characterized in that, The first row of retaining walls (210) includes a plurality of first retaining wall protrusions (211), which are spaced apart and arranged in a direction perpendicular to the periphery of the display area (120); the second row of retaining walls (220) includes a plurality of second retaining wall protrusions (221), which are spaced apart and arranged in a direction perpendicular to the periphery of the display area (120); the interval between each pair of adjacent first retaining wall protrusions (211) corresponds to one of the plurality of second retaining wall protrusions (221).
3. The display panel as described in claim 2, characterized in that, The width of the first retaining wall protrusion (211) and the second retaining wall protrusion (221) is 6μm-10μm.
4. The display panel as described in claim 2, characterized in that, The lengths of the first retaining wall protrusion (211) and the second retaining wall protrusion (221) are 100μm-400μm.
5. The display panel as described in claim 2, characterized in that, The height of the first barrier protrusion (211) and the second barrier protrusion (221) is 1μm-5μm, and the thickness of the alignment film layer (30) is 0.01μm-1μm.
6. The display panel as described in claim 2, characterized in that, Both the first retaining wall protrusion (211) and the second retaining wall protrusion (221) are elongated protrusions.
7. The display panel as described in claim 2, characterized in that, The blocking area (20) also includes a third row of blocking walls (230), wherein the first row of blocking walls (210), the second row of blocking walls (220) and the third row of blocking walls (230) are arranged at intervals along the periphery of the display area (120).
8. The display panel as described in claim 7, characterized in that, The third row of retaining walls (230) includes a plurality of third retaining wall protrusions (231), which are spaced apart and arranged in a direction perpendicular to the periphery of the display area (120); the interval between each two adjacent second retaining wall protrusions (221) corresponds to one of the plurality of third retaining wall protrusions (231).
9. The display panel as described in claim 7, characterized in that, The blocking area (20) includes multiple groups, which are arranged at intervals and the arrangement direction of the multiple groups of blocking areas (20) is parallel to the periphery of the display area (120).
10. The display panel as claimed in claim 9, characterized in that, The distance between two adjacent blocking blocks (20) ranges from 40μm to 80μm.