Display panel

Abstract

The application discloses a display panel, which comprises a common electrode, a first common voltage line and a second common voltage line. The first common voltage line transmits a first common voltage signal to the common electrode of a first display area close to a gate drive circuit area. The second common voltage line transmits a second common voltage signal to the common electrode of a second display area away from the gate drive circuit area. By making the voltage of the first common voltage signal smaller than the voltage of the second common voltage signal, the difference of the effective driving voltage caused by the non-uniform feed-through voltage of the first display area and the second display area can be compensated, so that the effective driving voltage of the first display area and the second display area is consistent, and the amplitude of the effective driving voltage of the sub-pixel in the positive frame and the negative frame is symmetrical. In this way, the brightness of the sub-pixel in the positive frame and the negative frame is the same, so that the uniformity of the display picture brightness can be improved, and the problem of picture flicker can be solved.

Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to a display panel. Background Technology

[0002] With the development of display technology, flat panel display technologies such as liquid crystal displays have become mainstream in display technology due to their advantages such as high image quality, power saving, thin body and wide range of applications. They are widely used in various consumer electronic products such as mobile phones, televisions, personal digital assistants, digital cameras, laptops, and desktop computers.

[0003] Currently, LCD panels use AC drive. Because the input signals for the positive and negative half-cycles are affected by the feedthrough voltage, the voltage difference between the data signals of the positive and negative frames and the common voltage signal differs, resulting in varying screen brightness and thus flickering. Furthermore, the RC load delay during gate signal transmission on the scan line causes waveform distortion, affecting the switching rate when the gate voltage is turned off, leading to differences in feedthrough voltage across different areas. Setting the common voltage of the entire display area based on the optimal common voltage at the center will cause more severe flickering in the outer display areas compared to the central display area.

[0004] Therefore, it is necessary to provide a display panel to improve this deficiency. Utility Model Content

[0005] This application provides a display panel that can solve the problem of screen flickering.

[0006] To achieve the above objectives, according to a first aspect of this application, a display panel is provided, having a display area and a gate driving circuit area located at least one side of the display area, the display area including a first display area adjacent to the gate driving circuit area and a second display area away from the gate driving circuit area, the display panel comprising: A common electrode is disposed in the first display area and the second display area; A first common voltage line is electrically connected to the common electrode located in the first display area to transmit a first common voltage signal to the common electrode located in the first display area; The second common voltage line is electrically connected to the common electrode located in the second display area to transmit a second common voltage signal to the common electrode located in the second display area; Wherein, the voltage of the first common voltage signal is less than the voltage of the second common voltage signal.

[0007] Optionally, the voltage on the common electrode located in the first display area is less than the voltage on the common electrode located in the second display area.

[0008] Optionally, the display panel includes multiple rows and columns of sub-pixels arranged along a first direction and a second direction, wherein the first direction is different from the second direction and is perpendicular to the thickness direction of the display panel; The first common voltage line extends along a first direction and is disposed between two adjacent rows of sub-pixels, and the second common voltage line extends along a second direction and is disposed between two adjacent columns of sub-pixels.

[0009] Optionally, the display panel includes multiple data lines, which extend along the second direction and are disposed between two adjacent columns of sub-pixels, and are electrically connected to the two adjacent columns of sub-pixels; The second common voltage line and the data line are respectively disposed between two adjacent columns of the sub-pixels.

[0010] Optionally, the second common voltage line is disposed on the same layer as the data line and is made of the same material.

[0011] Optionally, the display panel includes multiple data lines, with the second common voltage line and the data lines disposed between two adjacent columns of the sub-pixels.

[0012] Optionally, the second common voltage line and the data line are disposed on different layers, and the orthographic projection of the second common voltage line on the reference plane overlaps with the orthographic projection of the data line on the reference plane, wherein the reference plane is parallel to the light-emitting surface of the display panel.

[0013] Optionally, the display panel includes multiple rows and columns of sub-pixels arranged along a first direction and a second direction, and each sub-pixel includes a pixel electrode; The orthographic projection of the second common voltage line onto the reference plane partially overlaps with the orthographic projection of the pixel electrode onto the reference plane.

[0014] Optionally, the display panel includes multiple data lines, which extend along the second direction and are disposed between two adjacent columns of sub-pixels; The second common voltage line is disposed on the same layer as the data line and is made of the same material.

[0015] Optionally, the display panel includes at least two second common voltage lines, and the at least two second common voltage lines are connected in parallel.

[0016] In the display panel of this application embodiment, a first common voltage line transmits a first common voltage signal to the common electrode of the first display area near the gate driving circuit area, and a second common voltage line transmits a second common voltage signal to the common electrode of the second display area far from the gate driving circuit area. By making the voltage of the first common voltage signal less than the voltage of the second common voltage signal, the difference in effective driving voltage caused by the uneven feedthrough voltage of the first display area and the second display area can be compensated, thereby improving the uniformity of the brightness of the display screen and solving the problem of screen flicker.

[0017] Other features and advantages of this application will be described in detail in the following detailed description section. Attached Figure Description To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] To gain a more complete understanding of this application and its beneficial effects, the following description will be provided in conjunction with the accompanying drawings, wherein the same reference numerals in the following description denote the same parts.

[0019] Figure 1 A schematic diagram of the structure of a first type of display panel provided for an embodiment of this application; Figure 2 An enlarged schematic diagram of the second display area of ​​a first type of display panel provided for an embodiment of this application; Figure 3 A schematic diagram of the film layer structure of a first type of display panel provided for embodiments of this application; Figure 4 A schematic diagram of the voltage of a common electrode in different areas of a first type of display panel provided for embodiments of this application; Figure 5 An enlarged schematic diagram of the second display area in a second type of display panel provided for embodiments of this application; Figure 6 A schematic diagram of the film layer structure of a second type of display panel provided for an embodiment of this application; Figure 7 An enlarged schematic diagram of the second display area in a third type of display panel provided for embodiments of this application; Figure 8 An enlarged schematic diagram of the second display area in a fourth type of display panel provided for embodiments of this application; Figure 9 A schematic diagram of the structure of a fifth display panel provided for an embodiment of this application; Figure 10 A schematic diagram of the voltage of the common electrode in different areas of a fifth type of display panel provided for embodiments of this application; Figure 11 This is a schematic diagram of the structure of a display device provided in an embodiment of this application. Detailed Implementation

[0020] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the protection scope of this application.

[0021] An embodiment of this application provides a display panel having a display area and a gate driving circuit area located on at least one side of the display area. The display area includes a first display area adjacent to the gate driving circuit area and a second display area away from the gate driving circuit area. The display panel includes a common electrode, a first common voltage line, and a second common voltage line. The common electrode is disposed in the first display area and the second display area. The first common voltage line is electrically connected to the common electrode located in the first display area to transmit a first common voltage signal to the common electrode located in the first display area. The second common voltage line is electrically connected to the common electrode located in the second display area to transmit a second common voltage signal to the common electrode located in the second display area. The voltage of the first common voltage signal is less than the voltage of the second common voltage signal.

[0022] In the embodiments of this application, a first common voltage line transmits a first common voltage signal to the common electrode of the first display area near the gate driving circuit area, and a second common voltage line transmits a second common voltage signal to the common electrode of the second display area far from the gate driving circuit area. By making the voltage of the first common voltage signal less than the voltage of the second common voltage signal, the difference in effective driving voltage caused by the uneven feedthrough voltage of the first display area and the second display area can be compensated, so that the effective driving voltage of the first display area and the second display area are consistent, and the amplitude of the effective driving voltage of the sub-pixel in the positive and negative frames is symmetrical. In this way, the brightness of the sub-pixel is the same in the positive and negative frames, thereby improving the uniformity of the brightness of the display screen and solving the problem of screen flicker.

[0023] Combination Figure 1 As shown, Figure 1This is a schematic diagram of the structure of a first type of display panel provided in an embodiment of this application. The display panel 100 has a display area AA and a non-display area NA disposed around the display area. The display area AA is the area used to display images, and multiple sub-pixels and pixel driving circuits for driving the sub-pixels to emit light may be provided within the display area AA. The non-display area NA is the area used to place peripheral circuits and wiring. The peripheral circuits may include, but are not limited to, gate driving circuits, electrostatic discharge protection circuits, multiplexing circuits, etc.

[0024] In some embodiments, the non-display area NA includes at least one gate driving circuit region GOA, which is disposed on at least one side of the display area AA.

[0025] In some embodiments, such as Figure 1 As shown, the non-display area NA includes two gate drive circuit regions GOA, which are respectively located on both sides of the display area AA in the first direction X. The display panel includes two gate drive circuits (not shown in the figure), each gate drive circuit being located in a corresponding gate drive circuit region GOA. Each gate drive circuit may include multiple cascaded gate drive circuit units, which are used to output gate signals to the corresponding pixel row through scan lines under the control of timing signals.

[0026] The display area AA includes two first display areas AA1 and one second display area AA2. The two first display areas AA1 are respectively located close to the corresponding gate drive circuit area GOA. The second display area AA2 is located between the two first display areas AA1. The first display areas AA1 and the second display area AA2 belong to different parts of the display area AA. The images displayed by the first display areas AA1 and the second display area AA2 can be seamlessly connected.

[0027] In some embodiments, such as Figure 2 and Figure 3 As shown, Figure 2 An enlarged schematic diagram of the second display area of ​​a first type of display panel provided for embodiments of this application. Figure 3 This is a schematic diagram of the film layer structure of a first display panel provided in an embodiment of this application. The display panel includes a common electrode 181, which is disposed in a first display area AA1 and a second display area AA2. A first common voltage line 141 is electrically connected to the common electrode 181 located in the first display area AA1 to transmit a first common voltage signal to the common electrode 181 located in the first display area AA1. A second common voltage line 161 is electrically connected to the common electrode 181 located in the second display area AA2 to transmit a second common voltage signal to the common electrode 181 located in the second display area AA2. The voltage of the first common voltage signal is less than the voltage of the second common voltage signal.

[0028] In this embodiment, by making the voltage of the first common voltage signal less than the voltage of the second common voltage signal, the difference in effective driving voltage caused by the uneven feedthrough voltage of the first display area and the second display area can be compensated, so that the effective driving voltage of the first display area and the second display area are consistent, and the amplitude of the effective driving voltage of the sub-pixel in the positive and negative frames is symmetrical. In this way, the brightness of the sub-pixel in the positive and negative frames can be the same, thereby improving the uniformity of the brightness of the display screen and solving the problem of screen flicker.

[0029] In some embodiments, such as Figure 3 As shown, the display panel includes an array substrate, a counter substrate disposed opposite to the array substrate, and a liquid crystal layer located between the array substrate and the counter substrate. The array substrate includes a first substrate 10 and a buffer layer 11, an active layer 12, a gate insulating layer 13, a gate layer 14, a first interlayer insulating layer 15, a first source-drain layer 16, a planarization layer 17, a first electrode layer 18, a passivation layer 19, and a second electrode layer 20 stacked sequentially on the first substrate 10. The first electrode layer 18 includes a common electrode 181, and the second electrode layer 20 includes a plurality of pixel electrodes 201 arranged in an array.

[0030] It should be noted that, Figure 3 This illustration only shows one type of film layer structure of the array substrate in the display panel and does not represent the film layer structure of the array substrate in actual applications. It also does not show the opposing substrate and liquid crystal layer of the display panel. In actual applications, the array substrate, opposing substrate, and liquid crystal layer can be replaced with known film layer structures of the array substrate, opposing substrate, and liquid crystal layer to achieve the same or similar functions; no restrictions are imposed here.

[0031] In some embodiments, the voltage on the common electrode of the first display area AA1 is less than the voltage on the common electrode of the second display area AA2.

[0032] Combination Figure 4 As shown, Figure 4This is a voltage diagram of the common electrode in different areas of a first type of display panel provided in an embodiment of this application. The common electrode located in the first display area AA1 is electrically connected to the common electrode located in the second display area AA2. Since the voltage of the first common voltage signal is less than the voltage of the second common voltage signal, the voltage on the common electrode in the first display area AA1 is less than the voltage on the common electrode in the second display area AA2. The common electrode itself has resistance, and the current will flow from the high voltage side to the low voltage side on the plane of the common electrode. A continuous voltage drop will be generated along the path of the current flow, so that the voltage Vcom on the common electrode decreases in the direction from the second display area AA2 to the first display area AA1. This can compensate for the difference in effective driving voltage caused by the uneven feedthrough voltage Vfd of the first and second display areas, so that the effective driving voltage of the first and second display areas is consistent, and the amplitude of the effective driving voltage of the sub-pixel in the positive and negative frames is symmetrical. This can make the brightness of the sub-pixel the same in the positive and negative frames, thereby improving the uniformity of the brightness of the display screen and solving the problem of screen flicker.

[0033] In some embodiments, the common electrode 181 is disposed on the entire surface of the first display area AA1 and the second display area AA2. The common electrode of the first display area AA1 and the common electrode of the second display area AA2 can be regarded as different parts of the whole transparent conductive electrode.

[0034] In some embodiments, such as Figure 2 As shown, the display panel includes multiple rows and columns of sub-pixels P arranged along a first direction X and a second direction Y. The first direction X is different from the second direction Y and is perpendicular to the thickness direction of the display panel. Multiple sub-pixels P of the same color are arranged in the same column at intervals along the second direction Y, and multiple sub-pixels P of different colors are arranged in the same row at intervals along the first direction X.

[0035] like Figure 2 As shown, a first common voltage line 141 extends along a first direction X and is disposed between two adjacent rows of sub-pixels, and a second common voltage line 161 extends along a second direction Y and is disposed between two adjacent columns of sub-pixels P. The first common voltage line 141 and the second common voltage line 161 are disposed in different film layers. For example, the first common voltage line 141 is located in the gate layer 14, and the second common voltage line 161 is located in the source-drain layer 16. The orthographic projections of the first common voltage line 141 and the second common voltage line 161 on the reference plane intersect each other, but are not connected to each other.

[0036] In some embodiments, the display panel includes a plurality of data lines 162, each data line 162 extending along a second direction Y and disposed between two adjacent columns of sub-pixels, each data line being electrically connected to two adjacent columns of sub-pixels, and a second common voltage line 161 and data lines 162 being disposed between different adjacent columns of sub-pixels.

[0037] like Figure 2 As shown, each data line 162 in the display panel is electrically connected to a sub-pixel in two adjacent columns of sub-pixels. Some adjacent columns of sub-pixels do not have a data line 162 between them. A second common voltage line 161 is located between these adjacent columns of sub-pixels where no data line 162 is provided. This allows for the addition of a second common voltage line 161 to transmit a second common voltage signal to the common electrode 181 in the second display area AA2 while maintaining the same aperture ratio. This improves the uniformity of the display brightness and solves the problem of screen flicker.

[0038] In some embodiments, the second common voltage line 161 and the data line 162 are disposed on the same layer and are made of the same material.

[0039] like Figure 2 and Figure 3 As shown, the first source-drain layer 16 includes a second common voltage line 161 and a data line 162. The second common voltage line 161 can be formed simultaneously using the manufacturing process of the first source-drain layer 16. This avoids affecting the aperture ratio and also avoids increasing the film structure and related process of the display panel.

[0040] In some embodiments, the display panel includes at least two second common voltage lines 161, which are arranged at intervals along a first direction X and disposed between different adjacent columns of sub-pixels, and the at least two second common voltage lines 161 are connected in parallel.

[0041] like Figure 2 As shown, the display panel includes two second common voltage lines 161. The two second common voltage lines 161 are arranged at intervals along the first direction X and are disposed between different adjacent columns of sub-pixels. The first ends of the two second common voltage lines 161 are connected through a first connecting part 143, and the second ends of the two second common voltage lines 162 are connected through a second connecting part 144 to connect the two second common voltage lines 161 in parallel, thereby reducing the voltage drop generated by the second common voltage signal during transmission.

[0042] In some embodiments, such as Figure 2 and Figure 3 As shown, the first connection portion 143 and the second connection portion 144 are disposed on the same layer as the gate layer and are made of the same material as the gate layer. At least two second common voltage lines 161 are connected in parallel using the gate layer. This avoids short-circuiting between the second common voltage line 161 and the data line 162.

[0043] Combination Figure 5 and Figure 6 As shown, Figure 5 An enlarged schematic diagram of the second display area in a second type of display panel provided for an embodiment of this application. Figure 6 A schematic diagram of the film layer structure of a second type of display panel provided in an embodiment of this application, the structure of which is similar to... Figures 1 to 3 The film layer structure of the first type of display panel shown is roughly the same, the difference being that the second common voltage line 161 and data line 162 are located between the same two adjacent columns of sub-pixels.

[0044] The display panel includes multiple data lines 162, each data line 162 being positioned between two adjacent columns of sub-pixels and electrically connected to a corresponding column of sub-pixels. In the second display area AA2, each second common voltage line 161 and its corresponding data line 162 are positioned between the same two adjacent columns of sub-pixels. The second common voltage line 161 and the data line 162 are arranged in different layers. The orthographic projection of the second common voltage line 161 onto the reference plane overlaps with the orthographic projection of the data line 162 onto the reference plane. The reference plane is parallel to the light-emitting surface of the display panel. This improves the uniformity of brightness of the displayed image and solves the problem of screen flickering while maintaining the aperture ratio of the display panel.

[0045] In some embodiments, such as Figure 6 As shown, the display panel includes a second interlayer insulating layer 21 and a second source-drain layer 22. The second interlayer insulating layer 21 is disposed on the first source-drain layer 16, and the second source-drain layer 22 is disposed on the second interlayer insulating layer 21. A planarization layer 17, a first electrode layer 18, a passivation layer 19, and a second electrode layer 20 are sequentially stacked on the second source-drain layer 22.

[0046] In some embodiments, such as Figure 5 and Figure 6 As shown, the first source-drain layer 16 includes a data line 162, and the second source-drain layer 22 includes a second common voltage line 161.

[0047] Combination Figure 7 As shown, Figure 7 An enlarged schematic diagram of the second display area in a third type of display panel provided in an embodiment of this application, the structure of which is similar to... Figures 1 to 3 The film layer structure of the first type of display panel shown is roughly the same, the difference being that the orthographic projection of the second common voltage line 161 on the reference plane partially overlaps with the orthographic projection of the pixel electrode on the reference plane.

[0048] The display panel includes multiple data lines 162, each data line 162 being disposed between two adjacent columns of sub-pixels and electrically connected to a corresponding column of sub-pixels. In the second display area AA2, a second common voltage line 161 extends along the second direction Y and is disposed in the middle of a corresponding column of sub-pixels. Each sub-pixel P includes a pixel electrode 201. The orthographic projection of the second common voltage line 161 on the reference plane overlaps with the orthographic projection of the pixel electrode 201 of the sub-pixel P on the reference plane, so as to utilize the area where the sub-pixel P is located to arrange the second common voltage line 161, thereby improving the uniformity of the display brightness and solving the problem of screen flicker.

[0049] In some embodiments, the display panel includes a black matrix, which may be disposed on an array substrate or an opposing substrate. The black matrix includes a light-shielding portion, the orthographic projection of which on a reference plane covers the orthographic projection of the second common voltage line on the reference plane, so as to use the light-shielding portion to block the second common voltage line and prevent the second common voltage line from reflecting ambient light, thereby reducing the reflectivity of the display panel.

[0050] In some embodiments, the second common voltage line 161 and the data line 162 are disposed on the same layer and are made of the same material.

[0051] Combination Figure 3 and Figure 7 As shown, the first source-drain layer 16 includes a second common voltage line 161 and a data line 162. The second common voltage line 161 can be formed simultaneously using the manufacturing process of the first source-drain layer 16. This avoids affecting the aperture ratio and also avoids increasing the film structure and related process of the display panel.

[0052] Combination Figure 8 As shown, Figure 8 An enlarged schematic diagram of the second display area in a fourth type of display panel provided in an embodiment of this application, the structure of which is similar to... Figure 7 The film layer structure of the third type of display panel shown is roughly the same, the difference being that: multiple sub-pixels P of the same color are arranged in the same row at intervals along the first direction X, and multiple sub-pixels P of different colors are arranged in the same column at alternating intervals along the second direction Y.

[0053] Multiple sub-pixels P include a first sub-pixel P1, a second sub-pixel P2, and a third sub-pixel P3, each emitting a different color. For example, the first sub-pixel P1 emits red light, the second sub-pixel P2 emits blue light, and the third sub-pixel P3 emits green light. Multiple first sub-pixels P1 are arranged at intervals along a first direction X in the same row, multiple second sub-pixels P2 are arranged at intervals along the first direction X in the same row, and multiple third sub-pixels P3 are arranged at intervals along the first direction X in the same row. The first sub-pixels P1, second sub-pixels P2, and third sub-pixels P3 are alternately arranged along a second direction Y in the same column.

[0054] The display panel includes multiple scan lines 142, each scan line 142 is disposed between two adjacent rows of sub-pixels, and each scan line 142 is electrically connected to the corresponding row of sub-pixels.

[0055] The sub-pixel P includes a pixel electrode 201. The orthographic projection of the second common voltage line 161 on the reference plane partially overlaps with the orthographic projection of the pixel electrode 201 on the reference plane, so as to utilize the area where the sub-pixel P is located to arrange the second common voltage line 161, thereby improving the uniformity of the brightness of the display screen and solving the problem of screen flicker.

[0056] In some embodiments, the pixel electrode 201 includes a first main electrode extending along a first direction X and a second main electrode extending along a second direction Y (not shown in the figure). The first main electrode and the second main electrode are cross-connected to define a plurality of domain regions. Each domain region is provided with a branch electrode electrically connected to the first main electrode and the second main electrode. Each sub-pixel may have 4 domain regions or 8 domain regions, etc.

[0057] In some embodiments, the orthographic projection of the second common voltage line 161 on the reference plane partially overlaps with the orthographic projection of the second main electrode on the reference plane. Since the area where the second main electrode is located is the low-light-efficiency area of ​​the sub-pixel, the second main electrode can be used to shield the second common voltage line 161, preventing the second common voltage line 161 from reflecting ambient light. This can improve the uniformity of the brightness of the display screen and solve the problem of screen flicker without affecting the reflectivity of the display panel.

[0058] Combination Figure 9 and Figure 10 As shown, Figure 9 A schematic diagram of the structure of a fifth type of display panel provided in an embodiment of this application. Figure 10 A voltage diagram of the common electrode in different areas of a fifth type of display panel provided in the embodiments of this application, the structure of which is similar to... Figures 1 to 3The structure of the first type of display panel shown is roughly the same, the difference being that: the non-display area NA includes a gate driving circuit area GOA, which is located on one side of the display area AA; the display panel includes a gate driving circuit located in the gate driving circuit area GOA; the display area AA includes a first display area AA1 and a second display area AA2; the first display area AA1 is located closer to the gate driving circuit area GOA, and the second display area AA2 is located on the side of the first display area AA1 away from the gate driving circuit area GOA.

[0059] In this embodiment, the voltage of the first common voltage signal is set with the optimal common voltage of the first display area AA1, and the voltage of the second common voltage signal is set with the optimal common voltage of the second display area AA2. The voltage Vcom on the common electrode decreases in the direction from the second display area AA2 to the first display area AA1. This can compensate for the difference in effective driving voltage caused by the uneven feedthrough voltage Vfd between the first and second display areas, so that the effective driving voltage of the first and second display areas is consistent, and the amplitude of the effective driving voltage of the sub-pixel in the positive and negative frames is symmetrical. This can make the brightness of the sub-pixel the same in the positive and negative frames, thereby improving the uniformity of the display brightness and solving the problem of screen flicker.

[0060] Based on the display panel provided in the above embodiments of this application, embodiments of this application provide a display device, combined with... Figure 11 As shown, Figure 11 The diagram below shows the structure of a display device provided in an embodiment of this application. The display device 1000 includes a display panel 100 and a housing 200. The display panel 100 is disposed on the housing 200. The display panel 100 can be any of the display panels provided in the above embodiments to achieve the same or similar functions in the display device provided in the embodiment of this application.

[0061] The beneficial effects of the embodiments of this application are as follows: The embodiments of this application provide a display panel having a display area and a gate driving circuit area located on at least one side of the display area. The display area includes a first display area adjacent to the gate driving circuit area and a second display area away from the gate driving circuit area. The display panel includes a common electrode, a first common voltage line and a second common voltage line. The common electrode is disposed in the first display area and the second display area. The first common voltage line is electrically connected to the common electrode located in the first display area to transmit a first common voltage signal to the common electrode located in the first display area. By making the voltage of the first common voltage signal less than the voltage of the second common voltage signal, the difference in effective driving voltage caused by the uneven feedthrough voltage of the first display area and the second display area can be compensated, so that the effective driving voltage of the first display area and the second display area are consistent, and the amplitude of the effective driving voltage of the sub-pixel in the positive and negative frames is symmetrical. In this way, the brightness of the sub-pixel in the positive and negative frames can be the same, thereby improving the uniformity of the brightness of the display screen and solving the problem of screen flicker.

[0062] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0063] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0064] The embodiments, implementation methods, and related technical features of this application can be combined and substituted for each other without conflict.

[0065] The above are merely preferred embodiments of this application and are not intended to limit this application in any way. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of this application without departing from the scope of the technical solution of this application shall still fall within the scope of the technical solution of this application.

Claims

1. A display panel, characterized in that, The display panel includes a display area and a gate driving circuit area located on at least one side of the display area, the display area comprising a first display area adjacent to the gate driving circuit area and a second display area distant from the gate driving circuit area, the display panel comprising: A common electrode is disposed in the first display area and the second display area; A first common voltage line is electrically connected to the common electrode located in the first display area to transmit a first common voltage signal to the common electrode located in the first display area; The second common voltage line is electrically connected to the common electrode located in the second display area to transmit a second common voltage signal to the common electrode located in the second display area; Wherein, the voltage of the first common voltage signal is less than the voltage of the second common voltage signal.

2. The display panel as described in claim 1, characterized in that, The voltage on the common electrode located in the first display area is less than the voltage on the common electrode located in the second display area.

3. The display panel as described in claim 1, characterized in that, The display panel includes multiple rows and columns of sub-pixels arranged along a first direction and a second direction, wherein the first direction is different from the second direction and is perpendicular to the thickness direction of the display panel; The first common voltage line extends along a first direction and is disposed between two adjacent rows of sub-pixels, and the second common voltage line extends along a second direction and is disposed between two adjacent columns of sub-pixels.

4. The display panel as described in claim 3, characterized in that, The display panel includes multiple data lines, which extend along the second direction and are disposed between two adjacent columns of sub-pixels, and are electrically connected to the two adjacent columns of sub-pixels; The second common voltage line and the data line are respectively disposed between two adjacent columns of the sub-pixels.

5. The display panel as described in claim 4, characterized in that, The second common voltage line is disposed on the same layer as the data line and is made of the same material.

6. The display panel as described in claim 3, characterized in that, The display panel includes multiple data lines, and the second common voltage line and the data lines are arranged between two adjacent columns of the sub-pixels.

7. The display panel as described in claim 6, characterized in that, The second common voltage line and the data line are disposed on different layers. The orthographic projection of the second common voltage line on the reference plane overlaps with the orthographic projection of the data line on the reference plane. The reference plane is parallel to the light-emitting surface of the display panel.

8. The display panel as described in claim 1, characterized in that, The display panel includes multiple rows and columns of sub-pixels arranged along a first direction and a second direction, and each sub-pixel includes a pixel electrode. The orthographic projection of the second common voltage line onto the reference plane partially overlaps with the orthographic projection of the pixel electrode onto the reference plane.

9. The display panel as described in claim 8, characterized in that, The display panel includes multiple data lines, which extend along the second direction and are disposed between two adjacent columns of sub-pixels; The second common voltage line is disposed on the same layer as the data line and is made of the same material.

10. The display panel as claimed in any one of claims 1 to 9, characterized in that, The display panel includes at least two second common voltage lines, and the at least two second common voltage lines are connected in parallel.

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