A direct current relay
Patent Information
- Application Number
- CN202522260866.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-27
- Publication Date
- 2026-09-25
- Estimated Expiration
- 2035-10-27
AI Technical Summary
[0002]继电器是直流电路中常用的电气开关器件,结构简单而又成本低廉,而在继电器闭合或断开过程中,由于触点瞬态通断,很容易产生较大的浪涌电流,形成电弧,导致触点表面氧化、熔化甚至烧蚀,降低继电器的使用寿命和可靠性,尤其在直流负载较大或是感性负载场合,这种电弧现象更为明显,传统的续流二极管或缓冲电阻难以消除触点损耗,导致直流继电器寿命缩短
1.本申请结构简单,用两个场效应管来对继电器开闭时产生的电流进行分流,从而保护继电器触点,减少触点闭合以及分离时大电流导致的拉弧,从而延长继电器的使用寿命。
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Figure CN224803848U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of relay technology, specifically to a DC relay. Background Technology
[0002] Relays are commonly used electrical switching devices in DC circuits. They are simple in structure and inexpensive. However, during the closing or opening of a relay, the transient switching of contacts can easily generate a large surge current, forming an electric arc. This can lead to oxidation, melting, or even burning of the contact surface, reducing the lifespan and reliability of the relay. This arcing phenomenon is more pronounced, especially in applications with large DC loads or inductive loads. Traditional freewheeling diodes or buffer resistors are insufficient to eliminate contact losses, resulting in a shortened lifespan of the DC relay. Summary of the Invention
[0003] The purpose of this invention is to provide a reasonably designed DC relay that addresses the defects and shortcomings of the existing technology, thereby solving the aforementioned deficiencies.
[0004] To achieve the above objectives, the present invention adopts the following technical solution: it includes a relay body, with node A leading out from the lower end of the contacts inside the relay body, and positive and negative lines connected to the power supply are respectively provided inside the relay, and a high-side buffer mechanism and a low-side buffer mechanism are respectively provided behind A.
[0005] Preferably, the high-side buffer mechanism includes a high-side field-effect transistor (FET), with the drain (D) of the high-side FET connected to the anode (A), the gate (G) connected to the anode (A) via capacitor two, and the gate (G) also connected to the positive terminal line via resistor four. Resistor four is also connected in parallel with diode two, and the anode of diode two is connected to the gate (G) of the high-side FET. The source (S) of the high-side FET is connected to the positive terminal line.
[0006] Preferably, the low-side buffer mechanism includes a low-side field-effect transistor (FET), with the drain (D) of the FET connected to the anode (A), the gate (G) connected to the anode (A) via a capacitor, the source (S) of the FET connected to the negative terminal, a resistor connected between the gate (G) and the negative terminal, and a diode connected in parallel with the resistor, with the anode of the diode connected to the negative terminal line.
[0007] Preferably, the high-side field-effect transistor is an N-MOSFET and the low-side field-effect transistor is a P-MOSFET.
[0008] Preferably, a resistor is connected in series between the gate (G) of the low-side field-effect transistor and capacitor one, and a resistor is connected in series between the gate (G) of the high-side field-effect transistor and capacitor two.
[0009] Preferably, both diode one and diode two are Zener diodes.
[0010] The beneficial effects of this utility model after adopting the above structure are: 1. This application has a simple structure and uses two field-effect transistors to shunt the current generated when the relay is opened and closed, thereby protecting the relay contacts, reducing arcing caused by large currents when the contacts are closed and opened, and thus extending the service life of the relay.
[0011] 2. In this application, a field-effect transistor is used, and a coupling capacitor is used to couple node A to the gate. The field-effect transistor is used to shunt the current, and after the capacitor discharges, the gate is pulled back to the default voltage, thus forming an automatic shutdown.
[0012] 3. This application uses two field-effect transistors (FETs) for high-side and low-side control respectively, ensuring that the relay can provide protection for both high-side and low-side control. When one FET is turned on, the other FET remains off, making it suitable for different circuit topologies.
[0013] 4. This application places a Zener diode between the gate and source of the field-effect transistor, which can clamp the peak value of Vgs, prevent gate breakdown or reverse bias damage, and ensure the safety of the field-effect transistor. Attached Figure Description
[0014] Figure 1 This is a schematic diagram of the present invention.
[0015] Explanation of reference numerals in the attached figures: 1. Resistor 1; 2. Resistor 2; 3. Resistor 3; 4. Resistor 4; 5. Capacitor 1; 6. Capacitor 2; 7. Low-side MOSFET; 8. High-side MOSFET; 9. Diode 1; 10. Diode 2. Detailed Implementation
[0016] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.
[0017] It includes the relay body, including the housing, control lines, coil, and contacts (this part of the structure is common, so it is omitted in the figure). The lower end of the contacts inside the relay body leads out to node A, that is, A is located between the relay and the load device. The relay also has positive and negative lines connected to the power supply. A high-side buffer mechanism and a low-side buffer mechanism are respectively provided behind A. The high-side buffer mechanism includes a high-side field-effect transistor 8. The drain (D) of the high-side field-effect transistor 8 is connected to the anode (A), and the gate (G) is connected to the anode (A) through capacitor 6. The gate (G) is also connected to the positive terminal line through resistor 4. Resistor 4 is also connected in parallel with diode 10. The anode of diode 10 is connected to the gate (G) of the high-side field-effect transistor 8. The source (S) of the high-side field-effect transistor 8 is connected to the positive terminal line. The low-side buffer mechanism includes a low-side field-effect transistor 7. The drain of the low-side field-effect transistor 7 is connected to the anode (A), and the gate (G) is connected to the anode (A) through capacitor 5. The source (S) of the low-side field-effect transistor 7 is connected to the negative terminal. A resistor 2 is connected between the gate and the negative terminal. A diode 9 is connected in parallel with the resistor 2. The anode of the diode 9 is connected to the negative terminal line. Both diodes 9 and 10 are Zener diodes. The high-side field-effect transistor 8 is an N-MOSFET, and the low-side field-effect transistor 7 is a P-MOSFET; A resistor 1 is connected in series between the gate of the low-side field-effect transistor 7 and the capacitor 5, and a resistor 3 is connected in series between the gate of the high-side field-effect transistor 8 and the capacitor 6.
[0018] Two sets of field-effect transistors (FETs) respectively implement low-side and high-side control. When the relay is in low-side control, node A is rapidly pulled to ground the instant the relay closes, forming a relative voltage. Capacitor 5 couples A to the gate (G) of low-side FET 7, forming an instantaneous Vgs. Low-side FET 7 then conducts. At this time, some current flows from point A through low-side FET 7 to the negative terminal, reducing the current surge at the relay contacts and thus avoiding large arcs, extending the relay's lifespan. The response speed of the FET can reach nanosecond to microsecond levels, compared to the millisecond-level action time of the relay. It can conduct before the relay contacts are fully closed, forming a current shunt. Then, the capacitor discharges rapidly, and the gate quickly returns to its default potential through the resistor. Low-side FET 7 then automatically turns off, and the current is entirely carried by the relay. During this process, high-side FET 8 remains off because Vgs is not met. Similarly, when used for high-side control, the relay closing will quickly pull node A to the positive terminal. The Vgs of the high-side MOSFET 8 will exceed the threshold voltage for a short time. Therefore, the high-side MOSFET 8 will turn on, allowing the positive current to flow from the high-side MOSFET 8 to the load, thereby reducing the instantaneous current surge at the relay contacts until the capacitor discharges and the high-side MOSFET 8 automatically turns off. During this process, the low-side MOSFET 7 also remains off. Both MOSFETs have Zener diodes connected to their gates (G) to prevent reverse polarity or small-amplitude polarity reversals. Taking the low-side MOSFET 7 as an example, when G is lower than S, diode 9 conducts, pulling G back to approximately S-Vf, thus preventing the gate from being broken down by negative voltage. Similarly, in the high-side MOSFET 8, when G is higher than S, diode 10 conducts, clamping the gate to near S+Vf, thus avoiding a large positive Vgs.
[0019] The installation, connection, or setting methods of the components not detailed above are all common mechanical methods, and the specific structure, model, and coefficient indicators of all their components are their own technologies. As long as they can achieve their beneficial effects, they can be implemented, so they will not be elaborated further.
[0020] It should be understood that the above-described specific embodiments of this utility model are merely illustrative or explanatory of the principles of this utility model and do not constitute a limitation thereof. Therefore, any modifications, equivalent substitutions, improvements, etc., made without departing from the spirit and scope of this utility model should be included within the protection scope of this utility model. Furthermore, the appended claims are intended to cover all variations and modifications falling within the scope and boundaries of the appended claims, or equivalent forms of such scope and boundaries.
Claims
1. A DC relay comprising a relay body, characterized in that: The lower end of the internal contact of the relay body leads out to node A. The relay also has positive and negative lines connected to the power supply. A high-side buffer mechanism and a low-side buffer mechanism are respectively provided behind A. The high-side buffer mechanism includes a high-side field-effect transistor (8). The drain (D) of the high-side field-effect transistor (8) is connected to the anode (A), and the gate (G) is connected to the anode (A) through capacitor 2 (6). The gate (G) is also connected to the positive terminal line through resistor 4 (4). Resistor 4 (4) is also connected in parallel with diode 2 (10). The anode of diode 2 (10) is connected to the gate (G) of the high-side field-effect transistor (8). The source (S) of the high-side field-effect transistor (8) is connected to the positive terminal line. The low-side buffer mechanism includes a low-side field-effect transistor (7), the drain (D) of the low-side field-effect transistor (7) is connected to the anode (A), the gate (G) is connected to the anode (A) through a capacitor (5), the source (S) of the low-side field-effect transistor (7) is connected to the negative terminal, a resistor (2) is connected between the gate (G) and the negative terminal, and a diode (9) is connected in parallel with the resistor (2), and the anode of the diode (9) is connected to the negative terminal line.
2. A DC relay according to claim 1, characterized in that: The high-side field-effect transistor (8) is an N-MOSFET, and the low-side field-effect transistor (7) is a P-MOSFET.
3. A DC relay according to claim 1, characterized in that: A resistor is connected in series between the gate of the low-side field-effect transistor (7) and the capacitor (5), and a resistor is connected in series between the gate of the high-side field-effect transistor (8) and the capacitor (6).
4. A DC relay according to claim 1, characterized in that: Diode 1 (9) and Diode 2 (10) are both Zener diodes.