Intelligent fusion terminal's timely response action system

Abstract

The utility model belongs to the technical field of intelligent feeder terminal, disclose a kind of timely response action system of intelligent fusion terminal. The system includes the first field effect transistor integrated on cut-off module PCB circuit board, there is the first protection circuit between the gate G of first field effect transistor and drain S;The bias voltage of the gate G of first field effect transistor is provided by the voltage division of first patch resistor and third patch resistor, while the current flowing into gate G is limited;There is the second protection circuit between the gate G of second field effect transistor and drain S;The appropriate bias voltage of the gate G of second field effect transistor is provided by the voltage division of fourth patch resistor and second patch resistor, while the current flowing into gate G is limited. The utility model MOSFET replaces combination brake relay, and action speed and stability can be effectively improved.

Description

Technical Field

[0001] This utility model belongs to the field of intelligent feeder terminal technology, and in particular relates to an intelligent fusion terminal timely response action system. Background Technology

[0002] To improve equipment selection standards, strengthen the quality control system, enhance the durability of distribution network equipment, and highlight the core qualities of good equipment, this design adheres to the principles of safety, reliability, robustness, standardization, and interchangeability. To meet the needs of interchangeability in different regions and improve the ease of operation and maintenance of intelligent feeder terminals (FTUs), these core devices in distribution network automation systems are primarily used to monitor and control feeder switches (such as pole-mounted circuit breakers and load switches) to achieve fault identification, isolation, and restoration of power supply to non-faulty areas. Their technological development has evolved from traditional mechanical switches to intelligent terminals; modern FTUs integrate telemetry, remote signaling, and remote control ("three-remote") functions.

[0003] Traditional FTUs use relays to control opening and closing, which has the following disadvantages: (1) slow opening and closing speed; (2) after long-term use, the contacts are prone to oxidation and wear, resulting in poor contact or adhesion, affecting the reliability of opening and closing; (3) high procurement cost.

[0004] Based on the above analysis, the problems and defects of the existing technology are as follows: the opening and closing speed of the existing intelligent feeder terminal is slow, and the electric contacts are prone to aging and wear after long-term use, resulting in poor contact or adhesion, which affects the reliability of opening and closing, and the procurement cost is high. Utility Model Content

[0005] To overcome the problems existing in related technologies, the present invention discloses an intelligent converged terminal timely response action system, specifically relating to an intelligent converged terminal timely response action system, and particularly relating to a standardized FTU feeder terminal.

[0006] The technical solution is as follows: a timely response action system for an intelligent fusion terminal, the system includes a cutting module PCB circuit board, on which a first field-effect transistor is integrated, and a first protection circuit is added between the gate G and the drain S of the first field-effect transistor; a bias voltage for the gate G of the first field-effect transistor is provided by voltage division through a first surface mount resistor and a third surface mount resistor, while limiting the current flowing into the gate G. The PCB circuit board of the cutting module also integrates a second field-effect transistor, and a second protection circuit is added between the gate G and the drain S of the second field-effect transistor. A suitable bias voltage is provided for the gate G of the second field-effect transistor by voltage division of the fourth and second surface mount resistors, while limiting the current flowing into the gate G.

[0007] Furthermore, the 24V voltage enters from the drain S of the first field-effect transistor, flows out through the source D of the first field-effect transistor, and flows to the load closing coil.

[0008] The first field-effect transistor is controlled by an FTU optocoupler. When the optocoupler is turned on, it pulls down the gate G potential of the first field-effect transistor, making the source D and drain S conduct. When the optocoupler is turned off, the gate G recovery circuit is disconnected.

[0009] The PCB circuit board has multiple first vias, each of which is used to insert a target.

[0010] The 24V voltage enters from the drain S of the second field-effect transistor, flows out through the source D of the second field-effect transistor, and flows to the load trip coil.

[0011] The second field-effect transistor is controlled by an FTU optocoupler. When the optocoupler is turned on, it pulls down the gate G potential of the second field-effect transistor, making the source D and drain S conduct. When the optocoupler is turned off, the gate G recovery circuit is disconnected.

[0012] The PCB circuit board has multiple second vias, each of which is used to insert a target.

[0013] Combining all the above technical solutions, the beneficial effects of this utility model are: miniaturization, simple operation, and quick and easy replacement. The mechanical contact action speed of the replacement closing / opening relay (SM-S-124DM116A 250VAC) proposed in this utility model is relatively slow (typically on the order of thirty milliseconds) during the closing and opening process, affecting control and system stability. Therefore, without interfering with normal short-circuit operation, using an NCE P-channel enhancement-mode power MOSFET (NCE01P30K) to replace the closing / opening relay can effectively improve the action speed and stability. Attached Figure Description

[0014] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure; Figure 1 This is a circuit diagram of the timely response action system of the intelligent fusion terminal provided in this embodiment of the utility model; Figure 2 This is a schematic diagram of the timely response action system of the intelligent fusion terminal provided in this embodiment of the utility model; In the diagram: I. Cut-off module PCB circuit board; II. First MOSFET; III. First protection circuit; IV. First surface mount resistor; V. Third surface mount resistor; VI. First via; a. Second MOSFET; b. Second protection circuit; c. Fourth surface mount resistor; d. Second surface mount resistor; e. Second via. Detailed Implementation

[0015] To make the above-mentioned objectives, features, and advantages of this utility model more apparent and understandable, the specific embodiments of this utility model are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a full understanding of this utility model. However, this utility model can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this utility model. Therefore, this utility model is not limited to the specific embodiments disclosed below.

[0016] Example 1, such as Figure 1 , Figure 2 As shown, a timely response action system for an intelligent converged terminal, The device includes a cutting module PCB circuit board I (26mm*29mm), on which a first field-effect transistor II (Q1) is integrated. This first field-effect transistor is an NCE P-channel enhancement-mode power MOSFET (NCE01P30K). The 24V voltage enters from the drain S of the first field-effect transistor II, flows out through the source D of the first field-effect transistor II, and flows to the load closing coil (HZ+). The first field-effect transistor II is controlled by an FTU optocoupler. When the optocoupler is on, it pulls down the gate (G) potential of the first field-effect transistor II, making the source (D) and drain (S) conduct. When the optocoupler is off, the gate (G) recovery circuit is disconnected.

[0017] A first protection circuit III is added between the gate G and the drain S to clamp the first field-effect transistor II for overvoltage protection. The first protection circuit III is a bidirectional diode D1 (SMF 6.5CA).

[0018] A suitable bias voltage is provided for the gate G of the first MOSFET II by a voltage divider consisting of the first surface mount resistor IV (R1, 55K) and the third surface mount resistor V (R3, 20K, 1W), while limiting the current flowing into the gate G.

[0019] The PCB circuit board I has multiple first vias VI, each of which is used to insert a guide; a 4*2.54mm guide (A254UP-ZD04P) is used.

[0020] The PCB circuit board I of the cut-off module also integrates a second field-effect transistor a (Q2), which adopts an NCE P-channel enhancement-mode power MOSFET (NCE01P30K); the 24V voltage enters from the drain S of the second field-effect transistor a, flows out through the source D of the second field-effect transistor a, and flows to the load trip coil (FZ+). The second field-effect transistor a is controlled by an FTU optocoupler. When the optocoupler is on, it pulls down the gate G potential of the second field-effect transistor a, causing the source D and drain S to conduct. When the optocoupler is off, the gate G recovery circuit is disconnected.

[0021] A second protection circuit b is added between the gate G and the drain S to clamp the overvoltage protection of the second field-effect transistor a. The second protection circuit b is a bidirectional diode D2 (SMF 6.5CA).

[0022] A suitable bias voltage is provided for the gate G of the second MOSFET a by voltage division using the fourth surface mount resistor c (R4, 55K) and the second surface mount resistor d (R2, 20K, 1W), while limiting the current flowing into the gate G.

[0023] The PCB circuit board I has multiple second vias e, each second via e is used to insert a guide, which adopts a 4*2.54mm guide (A254UP-ZD04P).

[0024] For example, the first surface mount resistor IV and the fourth surface mount resistor c (55K) are soldered to positions R1 and R4 respectively (e.g., 1, Figure 2 ).

[0025] Solder the second surface mount resistor d and the third surface mount resistor V (2512 20K 1W) to positions R2 and R3.

[0026] The NCE P-channel enhancement-mode power MOSFET (NCE01P30K) is soldered to positions Q1 and Q2 (e.g., Figure 1 , Figure 2 ).

[0027] The first protection circuit III and the second protection circuit b, which use bidirectional diodes (SMF6.5CA), are soldered at positions D1 and D2, respectively. Figure 1 , Figure 2 ).

[0028] Weld the 4*2.54mm guide pin to multiple via locations (e.g.) Figure 2 ); The component list is shown in Table 1. Table 1 Component List 1 NCE P-channel enhancement-mode power MOSFET NCE01P30K TO-252-2L 2 2 Chip resistors 55K 0805 100K 125mW ±1% 2 3 Chip resistors 2512 20K 1W 2512 1K 1W ±1% 2 4 bidirectional diode SMF6.5CA SOD-123FL 2 5 Cut module circuit board 26mm*29mm 1 6 4*2.54mm guideline A254UP-ZD04P Plug-in: P=4*2.54mm 4 Working principle:

[0029] (1) A 24V voltage enters from the drain (S) of the field-effect transistor (NCE01P30K), flows out through the source (D) of the field-effect transistor (NCE01P30K), and flows to the load opening and closing coil. The field-effect transistor (NCE01P30K) is controlled by an FTU optocoupler. When the optocoupler is turned on, it pulls down the gate (G) potential of the field-effect transistor (NCE01P30K) to turn on DS. When the optocoupler is turned off, the gate (G) recovery circuit is disconnected.

[0030] (2) In order to protect the field-effect transistor, a protection circuit SMF 6.5CA is added to the GS level for clamping voltage overvoltage protection.

[0031] (3) Provide a suitable bias voltage for the gate (G) of the field-effect transistor (NCE01P30K) by dividing the voltage between the surface mount resistor (55K) and the surface mount resistor (20K), while limiting the current flowing into the gate (G).

[0032] (4) When the chip resistor (55K) divides the voltage, it reduces the voltage at the gate (G) terminal of the field-effect transistor (NCE01P30K) to 6.5V to prevent the bidirectional diode (SMF6.5CA) from being damaged due to excessive voltage.

[0033] When the optocoupler is disconnected, the surface mount resistor (55K) acts as a voltage booster, pulling the gate-source voltage of the MOSFET to the same potential.

[0034] Specifically, the 24V voltage enters from the drain S of the second field-effect transistor a, flows out through the source D of the second field-effect transistor a, and flows to the load trip coil (FZ+). The second field-effect transistor a is controlled by an FTU optocoupler. When the optocoupler is on, it pulls down the gate G potential of the second field-effect transistor a, causing the source D and drain S to conduct. When the optocoupler is off, the gate G recovery circuit is disconnected.

[0035] A second protection circuit b is added between the gate G and the drain S to clamp the overvoltage protection of the second field-effect transistor a. The second protection circuit b is a bidirectional diode D2 (SMF 6.5CA).

[0036] A suitable bias voltage is provided for the gate G of the second MOSFET a by voltage division using the fourth surface mount resistor c (R4, 55K) and the second surface mount resistor d (R2, 20K, 1W), while limiting the current flowing into the gate G.

[0037] The PCB circuit board I has multiple second vias e, each second via e is used to insert a guide, which adopts a 4*2.54mm guide (A254UP-ZD04P).

[0038] As can be seen from the above embodiments, the present invention is simple to process, low in cost, and can reduce the defect rate of finished products; Simple to manufacture and highly interchangeable. Utilizes common components, featuring a simple circuit and clear wiring; fast assembly and disassembly. Resistant to aging and wear over long-term use, effectively preventing poor contact or adhesion.

[0039] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0040] The above description is only a preferred embodiment of the present utility model, but the protection scope of the present utility model is not limited thereto. Any modifications, equivalent substitutions and improvements made by those skilled in the art within the scope of the technology disclosed in the present utility model, within the spirit and principles of the present utility model, should be included within the protection scope of the present utility model.

Claims

1. A timely response action system for an intelligent fusion terminal, characterized in that, The system includes a cutting module PCB circuit board (I), on which a first field-effect transistor (II) is integrated. A first protection circuit (III) is added between the gate G and the drain S of the first field-effect transistor (II). A bias voltage for the gate G of the first field-effect transistor (II) is provided by a voltage divider between a first surface mount resistor (IV) and a third surface mount resistor (V), while limiting the current flowing into the gate G. The PCB circuit board (I) of the cutting module also integrates a second field-effect transistor (a), and a second protection circuit (b) is added between the gate G and the drain S of the second field-effect transistor (a). A suitable bias voltage is provided to the gate G of the second field-effect transistor (a) by voltage division of the fourth surface mount resistor (c) and the second surface mount resistor (d), while limiting the current flowing into the gate G.

2. The timely response action system of the intelligent fusion terminal according to claim 1, characterized in that, The 24V voltage enters from the drain S of the first field-effect transistor (II), flows out through the source D of the first field-effect transistor (II), and flows to the load closing coil.

3. The timely response action system of the intelligent fusion terminal according to claim 1, characterized in that, The first field-effect transistor (II) is controlled by an FTU optocoupler. When the optocoupler is turned on, it pulls down the gate G potential of the first field-effect transistor (II) to make the source D and drain S conduct. When the optocoupler is turned off, the gate G recovery circuit is turned off.

4. The timely response action system of the intelligent fusion terminal according to claim 1, characterized in that, The PCB circuit board (I) has multiple first vias (VI), each first via (VI) being used for inserting a target.

5. The timely response action system of the intelligent fusion terminal according to claim 1, characterized in that, The 24V voltage enters from the drain S of the second field-effect transistor (a), flows out through the source D of the second field-effect transistor (a), and flows to the load trip coil.

6. The timely response action system of the intelligent fusion terminal according to claim 1, characterized in that, The second field-effect transistor (a) is controlled by an FTU optocoupler. When the optocoupler is turned on, it pulls down the gate G potential of the second field-effect transistor (a) to make the source D and drain S conduct. When the optocoupler is turned off, the gate G recovery circuit is disconnected.

7. The timely response action system of the intelligent fusion terminal according to claim 1, characterized in that, The PCB circuit board (I) has multiple second vias (e), each second via (e) being used for inserting a target.

Images