An ultra-wideband bias tee

CN224804915UActive Publication Date: 2026-09-25南京鼎仪电子科技有限公司
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Patent Information

Application Number
CN202522181895.X
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-10-15
Publication Date
2026-09-25
Estimated Expiration
2035-10-15

AI Technical Summary

Technical Problem

而现有的宽带隔直电容的耐压值一般都在15V左右,没法满足很多需要提供24V和36V的需求,又因同尺寸下,电容耐压越高,介质越厚、容值越低,耐压与带宽存在矛盾无法为低频测试提供稳定偏置

Benefits of technology

[0014]有益效果:本发明提供的超宽带偏置器通过双电容的结构设计,低频段靠陶瓷电容‘短路’RF,高频段靠结构电容‘续接’RF;两只电容对直流都呈开路,于是直流被强制挤向电感支路,实现>200 mA 馈电;而硅胶把结构电容的击穿电压从 240 V 提到 1 kV 以上,因此,“双电容”宽频隔直结构在同一几何节点内同时解决“宽带-耐压-大电流”三大瓶颈,使偏置器实现超宽的频率范围(100KHz~67GHz)、能通过更高的电流(大于200mA)、能通过更高的电压(大于40V),且体积、重量与常规 30 GHz 产品相当,为毫米波通信、相控阵与测试仪器提供即插即用的超宽带馈电解决方案。

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Abstract

The application provides an ultra-wideband bias tee, which comprises a double-capacitance structure, and the double-capacitance structure comprises: a center conductor, the center conductor comprises an inner conductor and an outer conductor which are coaxially nested to form a structure capacitance, and the inner conductor and the outer conductor are internally provided with a containing hole; and a ceramic capacitor which is arranged in the containing hole and is connected in parallel with the structure capacitance, the ceramic capacitor and the outer conductor are welded by soldering, and the ceramic capacitor and the inner conductor are bonded by conductive glue. The application simultaneously solves three bottlenecks of a wide band, high voltage resistance and large current in the same geometric node through the double-capacitance wide-band direct-current isolation structure, so that the bias tee can realize an ultra-wide frequency range, pass through higher current and pass through higher voltage, and the volume and weight of the bias tee are equivalent to those of a conventional 30 GHz product, thereby providing a plug-and-play ultra-wideband feeding solution for millimeter wave communication, phased array and test instruments.
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Description

Technical Field

[0001] This invention belongs to the field of microwave device design technology, and specifically relates to an ultra-wideband bias device. Background Technology

[0002] In RF / microwave systems and measuring instruments, the bias-tee plays a crucial role in simultaneously transmitting RF and DC signals over a single cable. It provides DC bias to active devices such as low-noise amplifiers, lasers, and antennas via the RF+DC port, while RF signals are transmitted and received without obstruction at the same port. With the rapid expansion of applications such as 5G / 6G, civilian radar, high-speed optical communication, and electronic countermeasures into millimeter-wave frequencies, system operating frequencies now cover 100 kHz–67 GHz, and remote active modules generally require 24 V–36 V, ≥200 mA DC power. However, existing broadband DC blocking capacitors typically have a withstand voltage of around 15 V, which cannot meet the demands of many systems requiring 24 V and 36 V. Furthermore, for capacitors of the same size, higher withstand voltage results in thicker dielectric and lower capacitance, creating a conflict between withstand voltage and bandwidth, making it impossible to provide stable bias for low-frequency testing. Summary of the Invention

[0003] To address the shortcomings of existing technologies, the present invention aims to provide an ultra-wideband bias device with a wide frequency range, high current handling capability, and high voltage withstand capability.

[0004] To achieve the above objectives, the present invention adopts the following technical solution:

[0005] An ultra-wideband biaser includes a dual-capacitor structure, the dual-capacitor structure comprising:

[0006] A central conductor, comprising an inner conductor and an outer conductor nested coaxially at both ends to form a structural capacitor, wherein an accommodating hole is provided inside the inner conductor and the outer conductor;

[0007] A ceramic capacitor is disposed within the accommodating hole and connected in parallel with the structural capacitor. The ceramic capacitor is soldered to the outer conductor and bonded to the inner conductor with conductive adhesive.

[0008] A further limitation of this technical solution is that the biaser further includes a high-frequency inductor, one end of which is bonded to the center conductor and the other end is connected to the DC port, and the coil of the high-frequency inductor is wound in a conical shape on the magnetic core.

[0009] Furthermore, a glue injection port communicating with the receiving hole is longitudinally provided on one side of the inner conductor, and an overflow port communicating with the receiving hole is longitudinally provided on the other side.

[0010] Furthermore, epoxy resin is disposed in the receiving hole to fill the gaps around the ceramic capacitor.

[0011] Furthermore, an insulating ring is provided at the end connection between the inner conductor and the outer conductor.

[0012] Furthermore, the gap between the inner conductor and the outer conductor is 0.06 mm–0.10 mm.

[0013] Furthermore, the rated voltage of the ceramic capacitor is 50V.

[0014] Beneficial Effects: The ultra-wideband biaser provided by this invention utilizes a dual-capacitor structure design. In the low-frequency band, a ceramic capacitor 'short-circuits' the RF, while in the high-frequency band, a structural capacitor 'connects' the RF. Both capacitors are open-circuited to DC, thus forcing DC to the inductor branch, achieving a feed rate >200 mA. Furthermore, the silicone increases the breakdown voltage of the structural capacitor from 240 V to over 1 kV. Therefore, the "dual-capacitor" wideband DC blocking structure simultaneously solves the three major bottlenecks of "wideband, withstand voltage, and high current" within the same geometric node. This enables the biaser to achieve an ultra-wide frequency range (100 kHz to 67 GHz), handle higher currents (greater than 200 mA), and handle higher voltages (greater than 40 V), while maintaining a size and weight comparable to conventional 30 GHz products. This provides a plug-and-play ultra-wideband feeding solution for millimeter-wave communication, phased arrays, and test instruments. Attached Figure Description

[0015] Figure 1 A circuit diagram of an ultra-wideband biaser provided by the present invention;

[0016] Figure 2 This is a schematic diagram of the structure of an ultra-wideband biaser provided by the present invention;

[0017] Figure 3 A schematic diagram of the dual-capacitor structure of an ultra-wideband biaser provided by the present invention;

[0018] Figure 4 A simulation diagram of the structural capacitor of an ultra-wideband biaser provided by the present invention;

[0019] Figure 5 A simulation diagram of DC port isolation for an ultra-wideband biaser provided by the present invention;

[0020] Figure 6 The electric field simulation diagram of the structural capacitor of an ultra-wideband biaser provided by the present invention. Detailed Implementation

[0021] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments.

[0022] This embodiment provides an ultra-wideband biaser, the circuit diagram of which is shown below. Figure 1 As shown in the diagram, the structural schematic is as follows: Figure 2 As shown, there are RF+DC ports 1, RF port 6 and DC port 4 located opposite each other. RF+DC ports 1 and RF port 6 use 1.85mm RF connectors, and DC port 4 uses an SMP RF connector.

[0023] The bias circuit also includes a dual-capacitor structure and a high-frequency inductor 3. The dual-capacitor structure includes a center conductor 2 and a ceramic capacitor 5. One end of the high-frequency inductor 3 is bonded to the center conductor 2, and the other end is connected to the DC port 4.

[0024] DC blocking capacitors have a wide passband. However, existing broadband capacitors suffer from high insertion loss and low rated voltage, limiting the application of biasing circuits. This embodiment employs a dual-capacitor structure to address the requirements of wide passband, high voltage, and low insertion loss. A schematic diagram of the dual-capacitor structure is shown below. Figure 3 As shown below, the dual-capacitor structure will be explained in detail:

[0025] The central conductor 2 is connected to the RF+DC port 1 and the RF port 6 at both ends. The central conductor 2 is made of beryllium bronze and gold-plated. It includes an inner conductor A and an outer conductor B, coaxially nested at both ends, forming a structural capacitor. A cavity is drilled in the center of the inner conductor A and the outer conductor B to form a receiving hole for housing the ceramic capacitor 5. The central conductor 2 is a cylinder with dimensions of φ0.8mm*21mm, and the receiving hole in its center has dimensions of φ0.7mm*1mm.

[0026] The inner conductor A has a longitudinally arranged glue inlet 8 communicating with the receiving hole on one side, and a glue overflow outlet 9 communicating with the receiving hole on the other side. An insulating ring 7 is provided at the end connection between the inner conductor A and the outer conductor B to prevent short circuit between the inner conductor A and the outer conductor B. The gap distance between the inner conductor A and the outer conductor B is 0.06 mm–0.10 mm.

[0027] The ceramic capacitor 5 has a rated voltage of 50V and is housed within the receiving hole, connected in parallel with the structural capacitor. The ceramic capacitor is soldered to the outer conductor B, and bonded to the inner conductor A with conductive adhesive. To prevent short circuits and breakage under stress, epoxy resin is placed inside the receiving hole to fill the gaps around the ceramic capacitor 5.

[0028] In the fabrication of the dual-capacitor structure: First, the ceramic capacitor 5 and the outer conductor B are soldered together. Then, the inner conductor A is inserted into the inner conductor A, and conductive adhesive is used to bond the inner conductor A to the ceramic capacitor 5. Epoxy adhesive is injected through the injection port 8 and allowed to overflow from the overflow port 9.

[0029] The high-frequency inductor 3 in this embodiment is described in detail as follows: The high-frequency inductor 3 is made of 0.1mm enameled copper wire, with one end bonded to the center conductor 2. To suppress the high-order harmonics of the inductor coil itself, the coil of the high-frequency inductor 3 is wound in a conical shape on a magnetic core. The magnetic core is a PC40 magnetic core, which is a manganese-zinc ferrite soft magnetic material. Its core parameters include an initial permeability of 2300±25%, a saturation magnetic flux density of 510mT, a Curie temperature of 215-230℃, a coercivity of 14-16A / m, and a density of 4.8g / cm³. The enameled wire is wound on a conical magnetic core with a small-end diameter of 0.2mm, a large-end diameter of 1.4mm, and a height of 6mm.

[0030] The ultra-wideband biaser provided in this embodiment has two RF connectors connected by a central conductor 2. A high-frequency inductor 3 is bonded to the central conductor, and a ceramic capacitor 5 is soldered inside the central conductor 2. All components are housed in a shielded, gold-plated aluminum alloy cavity. The biaser, formed by metal machining, has a compact structure, a wide frequency range, high current handling capability, and high voltage withstand capability. It is primarily responsible for providing a stable DC current to the RF devices through the RF +DC terminal, while the DC blocking capacitor at the RF output terminal is a suitable RF capacitor to block the DC component and ensure smooth RF signal transmission.

[0031] In this embodiment, the structural capacitor formed by the inner conductor A and the outer conductor B needs to address the requirements of high-order harmonics (greater than 70GHz), high withstand voltage (greater than 40V), and low insertion loss (less than 0.5dB). This is achieved by nesting the conductors at both ends. The inner conductor has a diameter of 0.64mm, the outer conductor has a radius of 0.72mm, and the overlapping portion has a length of 0.81mm. Based on estimations, its capacitance value C = εS / d is approximately 0.5pF, which roughly matches the simulation results. The simulation diagram of the structural capacitor is shown below. Figure 4 As shown in the model simulation, its higher-order modes are greater than 70 GHz, and the insertion loss is less than 0.5 dB.

[0032] like Figure 5 and Figure 6 As shown, dielectric breakdown occurs because the dielectric loses its dielectric function instantaneously (10⁻⁷ to 10⁻⁸ s) under a sufficiently high electric field strength. Simulation results show that the maximum field strength in the model is 4.14 * 1e⁶ (V / m). Since the breakdown field strength of air is 3 * 1e⁶ (V / m), which is less than the required field strength for simulation, it limits the operating voltage of the bias capacitor. To improve the withstand voltage of the bias capacitor's structural capacitor, the air gaps in the structural capacitor need to be filled with silicone. The breakdown field strength of silicone is greater than 15 * 1e⁶ (V / m), thus ensuring that the structural capacitor does not break down at a voltage of 40V.

[0033] The foregoing has shown and described the basic principles, main features, and advantages of this utility model. Those skilled in the art should understand that the above embodiments do not limit this utility model in any way, and all technical solutions obtained by equivalent substitution or equivalent transformation fall within the protection scope of this utility model.

Claims

1. An ultra-wideband bias device, characterized in that, Includes a dual-capacitor structure, wherein the dual-capacitor structure comprises: The center conductor (2) includes an inner conductor (A) and an outer conductor (B) nested coaxially at both ends to form a structural capacitor, and the inner conductor (A) and the outer conductor (B) are provided with receiving holes; A ceramic capacitor (5) is disposed in the accommodating hole and connected in parallel with the structural capacitor. The ceramic capacitor (5) is soldered to the outer conductor (B) and bonded to the inner conductor (A) with conductive adhesive.

2. The ultra-wideband bias device according to claim 1, characterized in that, The bias device also includes a high-frequency inductor (3), one end of which is bonded to the center conductor (2) and the other end is connected to the DC port (4). The coil of the high-frequency inductor (3) is wound in a conical shape on the magnetic core.

3. The ultra-wideband biaser according to claim 1, characterized in that, The inner conductor (A) has a glue injection port (8) longitudinally arranged on one side, which communicates with the receiving hole, and an overflow port (9) longitudinally arranged on the other side, which communicates with the receiving hole.

4. The ultra-wideband biaser according to claim 3, characterized in that, Epoxy resin is placed inside the accommodating hole to fill the gaps around the ceramic capacitor (5).

5. The ultra-wideband bias device according to claim 1, characterized in that, An insulating ring (7) is provided at the end connection between the inner conductor (A) and the outer conductor (B).

6. The ultra-wideband biaser according to claim 1, characterized in that, The gap between the inner conductor (A) and the outer conductor (B) is 0.06 mm–0.10 mm.

7. The ultra-wideband biaser according to claim 1, characterized in that, The rated voltage of the ceramic capacitor (5) is 50V.