A silicon carbide power tube driving circuit and chip

Abstract

The utility model discloses a silicon carbide power tube drive circuit and chip belongs to power electronics technical field, including the pulse transformer of isolation, the pulse transformer secondary edge is parallelly connected with miller clamping circuit, precharge circuit, gate overvoltage protection circuit and miller capacitor respectively, and the series connection negative pressure circuit between miller clamping circuit and precharge circuit, the pulse transformer secondary edge same name end is connected with drive resistance, and miller clamping circuit includes N type MOS pipe Q1, capacitor C1 and diode D1, and the capacitor C1 is connected between the grid - drain of MOS pipe Q1, and the one end of drive resistance and capacitor C1 of MOS pipe Q1 is connected, and capacitor C1 and drive resistance constitute RC absorption circuit, and the diode D1 is connected between the grid and source of MOS pipe Q1, and the drain - source of MOS pipe Q1 and the grid - source of driven silicon carbide power tube are parallelly connected. The utility model can effectively solve the high frequency reliable switch problem of silicon carbide power tube.

Description

Technical Field

[0001] This utility model belongs to the field of power electronics technology, specifically relating to a silicon carbide power transistor drive circuit and chip. Background Technology

[0002] The statements herein provide only background information related to this invention and do not necessarily constitute prior art.

[0003] Silicon carbide power transistors (SiC MOSFETs) are widely used in power electronic systems due to their high voltage withstand capability, low on-resistance, and high switching frequency. However, because the gate drive characteristics of SiC MOSFETs differ from those of traditional silicon-based MOSFETs, their high-speed turn-off process is susceptible to the Miller effect, and gate voltage oscillations can lead to parasitic conduction problems. Therefore, optimizing the design of the drive circuit for SiC power transistors to ensure stable and reliable turn-off characteristics has become one of the key technologies.

[0004] Existing silicon carbide power transistor drive circuits struggle to achieve reliable high-frequency switching of silicon carbide power transistors, primarily due to the following problems: (1) Turn-off voltage oscillation: When the silicon carbide power transistor is turned off, the gate voltage oscillates due to the parasitic inductance of the device itself, which may lead to false triggering.

[0005] (2) Miller effect conduction: During high voltage change rate dv / dt switching process, the Miller capacitance will cause current, which is coupled to the gate through the gate-drain capacitance of the silicon carbide power transistor. The gate voltage is falsely triggered, resulting in the device being turned on unexpectedly.

[0006] (3) Complex generation of positive and negative voltages: The multi-channel isolated power supply circuit generates positive and negative voltages driven by silicon carbide power transistors, which is complex and costly. Utility Model Content

[0007] To address the aforementioned problems and defects in the existing technology, this utility model provides a silicon carbide power transistor drive circuit and chip, which can effectively solve the problems of turn-off voltage oscillation, Miller effect conduction, and complex positive and negative voltage generation in SiC power transistor driving, and realize high-frequency reliable switching of silicon carbide power transistors.

[0008] To achieve the above objectives, the present invention adopts the following technical solution: Firstly, this utility model proposes a silicon carbide power transistor drive circuit.

[0009] A silicon carbide power transistor drive circuit includes an isolation pulse transformer, a drive resistor, a negative voltage circuit, a pre-charge circuit, and a Miller clamping circuit. The secondary side of the isolation pulse transformer is connected in parallel with the Miller clamping circuit and the pre-charge circuit, respectively. A negative voltage circuit is connected in series between the Miller clamping circuit and the pre-charge circuit. The secondary side of the isolation pulse transformer is connected to the drive resistor. The Miller clamp circuit includes an N-type MOSFET Q1, a capacitor C1, and a diode D1. A capacitor C1 is connected between the gate and drain of the MOSFET Q1. The drive resistor is connected to the drain of the MOSFET Q1 and one end of the capacitor C1. The capacitor C1 and the drive resistor form an RC snubber circuit. A diode D1 is connected between the gate and source of the MOSFET Q1. The drain-source of the MOSFET Q1 is connected in parallel with the gate-source of the driven silicon carbide power transistor.

[0010] In a further technical solution, the gate of the driven silicon carbide power transistor is connected to the drain of the N-type MOS transistor Q1, and the source of the N-type MOS transistor Q1 is connected to the source of the driven silicon carbide power transistor through a Zener diode.

[0011] In a further technical solution, the gate of the N-type MOSFET Q1 is also connected to the cathode of the diode D1, and the source of the N-type MOSFET Q1 is connected to the anode of the diode D1.

[0012] Through the design of the Miller clamp circuit described above, the N-type MOSFET Q1 is connected in parallel between the gate and source of the main power silicon carbide power transistor. During the turn-off process and the turn-off period of the main power transistor, the MOSFET is turned on, effectively clamping the gate-source voltage in a negative state. In conjunction with the gate-source capacitor, the gate voltage oscillation problem caused by parasitic inductance and Miller effect is effectively suppressed. At the same time, the resistor and capacitor form an RC absorption circuit, which can effectively protect the gate of Q1.

[0013] In a further technical solution, the negative voltage circuit includes a Zener diode ZD1 and a capacitor C2 connected in parallel.

[0014] In a further technical solution, the anode of the Zener diode ZD1 is connected to the anode of the diode D1 and one end of the capacitor C2, and the cathode of the Zener diode ZD1 is connected to the other end of the capacitor C2.

[0015] Through the design of the above negative voltage circuit, a turn-off discharge loop is formed by using MOSFET and negative voltage generation circuit. During the turn-off phase, the gate voltage is pulled down to negative voltage to accelerate turn-off and suppress oscillation, making the circuit stable and reliable.

[0016] In a further technical solution, the pre-charging circuit includes a diode D2 and a resistor R2 connected in series.

[0017] In a further technical solution, the anode of the diode D2 is connected to the driving resistor R1, the cathode of the diode D2 is connected to the resistor R2, and the other end of the resistor R2 is connected to the cathode of the Zener diode ZD1.

[0018] Through the design of the negative voltage and pre-charge circuit described above, a diode and resistor series circuit can be used to complete the driving operation, complete the pre-charge of the instantaneous negative voltage circuit, and ensure the rapid establishment of negative voltage.

[0019] Further technical solutions also include a gate overvoltage protection circuit and a Miller capacitor connected in parallel on the secondary side of the isolation pulse transformer; The gate overvoltage protection circuit includes two transient suppression diodes ZD2 and ZD3, which are combined into a bidirectional transient suppression diode.

[0020] In a further technical solution, the cathode of the transient suppression diode ZD2 is connected to the driving resistor R1, the anode of the transient suppression diode ZD2 is connected to the anode of the transient suppression diode ZD3, and the cathode of the transient suppression diode ZD3 is connected to the cathode of the Zener diode ZD1.

[0021] The above-mentioned gate overvoltage protection circuit design ensures the stability and reliability of the MOSFET gate.

[0022] Secondly, this utility model proposes a chip.

[0023] A chip comprising a silicon carbide power transistor drive circuit as described in the first aspect for driving a high-frequency reliable switch of the silicon carbide power transistor.

[0024] Compared with the prior art, the present invention has the following beneficial effects: This invention proposes a silicon carbide power transistor drive circuit and chip, which can effectively solve the problem of high-frequency reliable switching of silicon carbide power transistors. Specifically, a negative voltage pre-charge circuit is designed, using a diode and resistor series circuit to complete the driving operation, realizing the pre-charging of the instantaneous negative voltage circuit, ensuring the rapid establishment of the negative voltage. The negative voltage establishment time can be less than 10µs, and the negative voltage drop time is more than 500ms, ensuring the stability of the negative voltage during the switching process of the silicon carbide power transistor. By designing a negative voltage turn-off and Miller clamping circuit, a turn-off discharge loop is formed by using a MOSFET and a negative voltage generation circuit. During the turn-off phase, the gate voltage is pulled down to a negative voltage, accelerating the turn-off and suppressing oscillations. The circuit is stable and reliable. The MOSFET is connected in parallel between the gate and source of the main power silicon carbide power transistor. During the turn-off process and the turn-off period of the main power transistor, the MOSFET is turned on, effectively clamping the gate-source voltage to a negative voltage state. With the help of the gate-source capacitor, the problem of mis-turn-on caused by Miller effect and stray inductance oscillation in the existing driving circuit is solved, ensuring stability and reliability. In addition, in the Miller clamping circuit, the driving resistor and capacitor form an RC absorption protection circuit to protect the gate of the N-type MOSFET, prevent overvoltage breakdown, and ensure the stability and reliability of the driving circuit. Attached Figure Description

[0025] The accompanying drawings, which form part of this specification, are used to provide a further understanding of this utility model. The illustrative embodiments of this utility model and their descriptions are used to explain this utility model and do not constitute an improper limitation of this utility model.

[0026] Figure 1 This is a schematic diagram of a typical topology of the silicon carbide power transistor drive circuit proposed in this embodiment; Figure 2 This is the equivalent circuit and current loop diagram for the first stage of operation in the typical topology of this embodiment; Figure 3 This is the equivalent circuit and current loop diagram for the second stage of operation mode under the typical topology in this embodiment; Figure 4 This is the equivalent circuit and current loop diagram for the three-stage operating mode under the typical topology in this embodiment; Figure 5 This is the equivalent circuit and current loop diagram for the fourth stage of the operating mode under the typical topology in this embodiment. Detailed Implementation

[0027] It should be noted that the following detailed descriptions are illustrative and intended to provide further explanation of this application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains.

[0028] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0029] The terms “installation,” “connection,” “linking,” and “fixing” used in this application should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a direct connection, an indirect connection through an intermediate medium, an internal connection between two components, or an interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances, and they should not be construed as limiting this utility model.

[0030] Example 1 like Figure 1As shown, this embodiment discloses a silicon carbide power transistor driving circuit, including an isolation pulse transformer T1, a driving resistor R1, a negative voltage circuit, a pre-charge circuit, a Miller clamping circuit, a gate overvoltage protection circuit, and a Miller capacitor. The secondary side of the isolation pulse transformer T1 is connected in parallel with the Miller clamping circuit, the pre-charge circuit, the gate overvoltage protection circuit, and the Miller capacitor. A negative voltage circuit is connected in series between the Miller clamping circuit and the pre-charge circuit. The same-name terminal of the secondary side of the isolation pulse transformer T1 is connected to one end of the driving resistor R1. The Miller clamping circuit includes an N-type MOSFET Q1, a capacitor C1, and a diode D1. The other end of the driving resistor is connected to the gate of the driven silicon carbide power transistor, the drain of the N-type MOSFET Q1, and one end of the capacitor C1. The other end of the capacitor C1 is connected to the gate of the N-type MOSFET Q1. The capacitor C1 and the driving resistor R1 form an RC absorption circuit to protect the gate of the N-type MOSFET Q1, prevent overvoltage breakdown, and ensure the stability and reliability of the driving circuit.

[0031] Furthermore, the gate of the N-type MOSFET Q1 is connected to the cathode of the diode D1, and the source of the N-type MOSFET Q1 is connected to the anode of the diode D1. The source of the N-type MOSFET Q1 is connected to the source of the driven silicon carbide power transistor via a Zener diode. By designing a capacitor and a transient suppression diode at the gate of the N-type MOSFET Q1, Miller oscillations can be effectively suppressed, ensuring reliability.

[0032] Through the design of the Miller clamp circuit described above, the N-type MOSFET Q1 is connected in parallel between the gate and source of the main power silicon carbide power transistor. During the turn-off process and turn-off period of the main power transistor, the N-type MOSFET Q1 is turned on, effectively clamping the gate-source voltage of the SiC power transistor to a negative voltage state. In conjunction with the gate-source capacitor, the gate voltage oscillation problem caused by parasitic inductance and Miller effect is effectively suppressed. At the same time, considering that the driving voltage of the silicon carbide power transistor is usually +18 / -5V, and the amplitude of the secondary voltage of the pulse transformer is generally around 23V, this will pose an overvoltage risk to the MOSFET gate. By designing a resistor and capacitor to form an RC absorption circuit, the instantaneous overvoltage driving the MOSFET gate can be absorbed, which can effectively protect the gate of the MOSFET, i.e., the N-type MOSFET Q1.

[0033] The aforementioned negative voltage circuit includes a Zener diode ZD1 and a capacitor C2 connected in parallel. The anode of the Zener diode ZD1 is connected to the anode of the diode D1 and one end of the capacitor C2, while the cathode of the Zener diode ZD1 is connected to the other end of the capacitor C2.

[0034] The above design uses a MOSFET and a negative voltage generation circuit to form a turn-off discharge circuit. During the turn-off phase, the gate voltage is pulled down to a negative voltage (such as -5V) to accelerate the turn-off and suppress oscillation, making the circuit stable and reliable.

[0035] The aforementioned pre-charge circuit includes a diode D2 and a resistor R2 connected in series. The anode of the diode D2 is connected to the driving resistor R1, the cathode of the diode D2 is connected to the resistor R2, and the other end of the resistor R2 is connected to the cathode of the Zener diode ZD1.

[0036] Through the design of the negative voltage and pre-charge circuit described above, a diode and resistor series circuit can be used to complete the driving operation, complete the pre-charge of the instantaneous negative voltage circuit, and ensure the rapid establishment of negative voltage.

[0037] The aforementioned gate overvoltage protection circuit includes two transient voltage suppressor diodes, ZD2 and ZD3. These diodes are combined into a single bidirectional transient voltage suppressor diode. The cathode of transient voltage suppressor diode ZD2 is connected to the drive resistor R1, and the anode of ZD2 is connected to the anode of transient voltage suppressor diode ZD3. The cathode of transient voltage suppressor diode ZD3 is connected to the cathode of Zener diode ZD1. This gate overvoltage protection circuit design protects the gate of the silicon carbide power transistor, shielding it from voltage spikes, preventing overvoltage breakdown, and ensuring the normal and reliable operation of the silicon carbide power transistor.

[0038] The silicon carbide power transistor driving circuit proposed in this invention transmits signals and energy through a pulse transformer. When the secondary side of the pulse transformer outputs a high level, the silicon carbide power transistor is turned on; otherwise, it is turned off. The operating mode of this driving circuit is as follows: Working Mode 1 like Figure 2 As shown, the output voltage and current path of the same terminal of the isolation pulse transformer T1 are: isolation pulse transformer T1 → driving resistor R1 → capacitor C1 → isolation pulse transformer T1, and isolation pulse transformer T1 → driving resistor R1 → capacitor C3 → capacitor C2 → diode D1 → isolation pulse transformer T1. During this process, the voltage of capacitors C1, C2, and C3 increases linearly.

[0039] Working Mode 2 like Figure 3 As shown, after the voltage of capacitors C1 and C3 reaches a certain value, diode D2 and resistor R2 in the pre-charging circuit, along with the two transient suppression diodes ZD2 and ZD3 in the gate overvoltage protection circuit, operate to charge the negative voltage circuit C2, thereby quickly establishing a negative voltage. The current path is: isolation pulse transformer T1 → driving resistor R1 → diode D2 → resistor R2 → capacitor C2 → diode D1 → isolation pulse transformer T1, isolation pulse transformer T1 → driving resistor R1 → transient suppression diode ZD2 → transient suppression diode ZD3 → capacitor C2 → diode D1 → transient suppression diode T1.

[0040] Working Mode 3 When the primary side of the isolation pulse transformer T1 is shut off and the inverter freewheeling is turned off, the secondary side of transformer T1 is short-circuited. The voltage of capacitor C3 charges the gate of Q1 through the drive resistor R1 and the isolation pulse transformer T1, causing Q1 to turn on quickly. The current path at this time is: capacitor C3 → drive resistor R1 → isolation pulse transformer T1 → MOSFET Q1 → Zener diode ZD1 → capacitor C3. After Q1 turns on, the voltage across capacitor C1 is negative at the top and positive at the bottom, while the gate voltage of Q1 is positive at the top and negative at the bottom. The voltage across C1 is slightly higher than the gate voltage of Q1, so C1 cannot charge the gate capacitor of Q1.

[0041] Furthermore, such as Figure 4 As shown, after Q1 is turned on, capacitor C3 discharges rapidly through Q1. The current path is capacitor C3 → MOSFET Q1 → Zener diode ZD1 → capacitor C3. At this time, Q1 turns on and quickly completes the discharge of capacitor C3 and the transfer of charge from capacitor C2 to capacitor C3, achieving negative voltage clamping. Through the above process, the gate voltage can be pulled down to a negative voltage (e.g., -5V), making the voltage between the gate and source lower than the turn-on voltage, thereby quickly turning off the main power transistor.

[0042] Working Mode 4 like Figure 5 As shown, the isolation pulse transformer T1 outputs voltage at the opposite terminal, Q1 is turned on, capacitor C2 in the negative voltage circuit discharges to capacitor C3, and the negative voltage is applied to the gate of the main power transistor for Miller clamping to prevent false turn-on. The current path is capacitor C2 → capacitor C3 → MOSFET Q1.

[0043] In the above process, the N-type MOSFET Q1 is connected in parallel between the gate and source of the main power silicon carbide power transistor. During the turn-off process and the turn-off period of the main power transistor, the MOSFET Q1 is turned on, effectively clamping the gate-source voltage in a negative state. In conjunction with the gate-source capacitor, that is, the gate-source capacitance increases at this time, which can reduce the peak of the Miller effect, thereby effectively suppressing the gate voltage oscillation problem caused by parasitic inductance and Miller effect. At the same time, the negative voltage can ensure that the oscillation peak will not cause the power transistor to be mis-turned, and the circuit is stable and reliable. Meanwhile, the resistor and capacitor form an RC absorption circuit, which can effectively protect the gate of the N-type MOSFET Q1 from overvoltage breakdown caused by the peak of leakage inductance of the pulse transformer T1, ensuring the stability and reliability of the drive circuit.

[0044] Based on the above switching process, the pre-charge circuit can quickly establish the negative voltage circuit voltage (within 10µS), while working with the Miller clamping circuit to ensure the reliability of the high-speed switching process of the main power transistor.

[0045] Example 2 This embodiment proposes a chip that includes a silicon carbide power transistor drive circuit as described in Embodiment 1, for driving the high-frequency reliable switching of the silicon carbide power transistor.

[0046] Although the specific embodiments of the present utility model have been described above in conjunction with the accompanying drawings, this is not intended to limit the scope of protection of the present utility model. Those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art without creative effort based on the technical solution of the present utility model are still within the scope of protection of the present utility model.

Claims

1. A silicon carbide power transistor drive circuit, characterized in that, It includes an isolation pulse transformer, a drive resistor, a negative voltage circuit, a pre-charge circuit, and a Miller clamping circuit. The secondary side of the isolation pulse transformer is connected in parallel with the Miller clamping circuit and the pre-charge circuit, respectively. A negative voltage circuit is connected in series between the Miller clamping circuit and the pre-charge circuit. The secondary side of the isolation pulse transformer is connected to the drive resistor. The Miller clamp circuit includes an N-type MOSFET Q1, a capacitor C1, and a diode D1. A capacitor C1 is connected between the gate and drain of the MOSFET Q1. The drive resistor is connected to the drain of the MOSFET Q1 and one end of the capacitor C1. The capacitor C1 and the drive resistor form an RC snubber circuit. A diode D1 is connected between the gate and source of the MOSFET Q1. The drain-source of the MOSFET Q1 is connected in parallel with the gate-source of the driven silicon carbide power transistor.

2. The silicon carbide power transistor drive circuit as described in claim 1, characterized in that, The gate of the driven silicon carbide power transistor is connected to the drain of the N-type MOSFET Q1, and the source of the N-type MOSFET Q1 is connected to the source of the driven silicon carbide power transistor through a Zener diode.

3. The silicon carbide power transistor drive circuit as described in claim 2, characterized in that, The gate of the N-type MOSFET Q1 is also connected to the cathode of the diode D1, and the source of the N-type MOSFET Q1 is connected to the anode of the diode D1.

4. The silicon carbide power transistor drive circuit as described in claim 1, characterized in that, The negative voltage circuit includes a Zener diode ZD1 and a capacitor C2 connected in parallel.

5. The silicon carbide power transistor drive circuit as described in claim 4, characterized in that, The anode of the Zener diode ZD1 is connected to the anode of the diode D1 and one end of the capacitor C2, and the cathode of the Zener diode ZD1 is connected to the other end of the capacitor C2.

6. The silicon carbide power transistor drive circuit as described in claim 1, characterized in that, The pre-charge circuit includes a diode D2 and a resistor R2 connected in series.

7. The silicon carbide power transistor drive circuit as described in claim 6, characterized in that, The anode of diode D2 is connected to driving resistor R1, the cathode of diode D2 is connected to resistor R2, and the other end of resistor R2 is connected to the cathode of Zener diode ZD1.

8. The silicon carbide power transistor drive circuit as described in claim 1, characterized in that, It also includes a gate overvoltage protection circuit and a Miller capacitor connected in parallel to the secondary side of the isolation pulse transformer; The gate overvoltage protection circuit includes two transient suppression diodes ZD2 and ZD3, which are combined into a bidirectional transient suppression diode.

9. The silicon carbide power transistor drive circuit as described in claim 8, characterized in that, The cathode of transient suppression diode ZD2 is connected to the driving resistor R1, the anode of transient suppression diode ZD2 is connected to the anode of transient suppression diode ZD3, and the cathode of transient suppression diode ZD3 is connected to the cathode of Zener diode ZD1.

10. A chip, characterized in that, The chip includes at least one silicon carbide power transistor drive circuit as described in any one of claims 1-9, for driving the high-frequency reliable switch of the silicon carbide power transistor.

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