A radio frequency switch circuit and a radio frequency switch

Abstract

The utility model relates to radio frequency switch technical field discloses a kind of radio frequency switch circuit and radio frequency switch, radio frequency switch circuit includes the radio frequency passage formed by a plurality of MOS tube series connection, the gate of each MOS tube is respectively electrically connected with bias resistance, each bias resistance is electrically connected with input resistance, and switch unit is shunt in input resistance both ends;Switch unit first starts to conduct for first time when the bias voltage received by radio frequency passage carries out level switching, then turns off, and first time is the parasitic capacitance charging completion time of MOS tube or is the parasitic capacitance discharge completion time of MOS tube;The utility model is through the conduction and turn-off time of control switch unit, when radio frequency passage conduction makes switch unit conduction, can accelerate the conduction establishment of radio frequency passage, after conduction establishment is completed, let switch unit turn off, make input resistance access circuit, can guarantee use stability, and when applied in high power occasion, since switch unit is always turned off, there is no risk of signal leakage.

Description

Technical Field

[0001] This utility model relates to the field of radio frequency switch technology, specifically to a radio frequency switch circuit and a radio frequency switch. Background Technology

[0002] The radio frequency (RF) switch circuit is an important part of the RF module. Its core is the RF switch branch, which is usually composed of multiple MOSFETs connected in series.

[0003] A circuit diagram of an existing radio frequency switch is as follows: Figure 1 As shown, in Figure 1 In the circuit, MOSFETs M1, M2, M3, M4, and M5 are connected in series to form the RF path. Due to the parasitic capacitance of the MOSFETs, if no bias resistor is used or the bias resistor value is too small, the gate-source voltage difference of the MOSFETs will not be maintained when the RF signal changes, leading to frequent switching of the MOSFETs. Therefore, a bias resistor with a large resistance is needed to divide the voltage with the MOSFET's parasitic capacitance to ensure the stability of the MOSFET's state. Figure 2 Resistors R1, R2, R3, R4, and R5 are all bias resistors, and resistor R6 is located at the end where resistor R1 is electrically connected, serving as the bias voltage output terminal. for Figure 1 The circuit shown, while using a large bias resistor can ensure the conduction stability of the MOSFET, also causes a significant delay in the transition from the bias voltage output to the MOSFET gate voltage due to the large bias resistor and the RC circuit formed by the MOSFET's parasitic capacitance. This results in a longer RF switch switching time. Therefore... Figure 1 The circuit shown makes it difficult to reduce the switching time of the RF switch while ensuring the stability of RF performance.

[0004] In order to solve Figure 1 The circuit shown has the following shortcomings: Figure 2 The existing RF switch circuit shown has two diodes connected in parallel across resistor R6 to form a bypass circuit; In practical use, when the logic signal at the bias voltage output terminal switches, the voltage across the resistor in the bias circuit will change abruptly. During the switching process, the circuit is generally in a low-power state, much lower than the bias voltage. The diode conducts, which enables the bypass circuit to conduct and bypass the resistor in the bias circuit. The gate of the MOSFET is quickly charged, causing the MOSFET to turn on or off rapidly. After the charging and discharging process is completed, the voltage across the resistor in the bias circuit returns to a stable state, thus continuing to conduct from the bias circuit without affecting the RF performance. for Figure 2The circuit shown is not suitable for high-power applications. As the power increases, the bypass circuit receives the power signal through the resistor. The voltage difference between the bypass structure and the bias voltage will cause the bypass circuit to turn on during normal operation, resulting in RF signal leakage and thus affecting RF performance. Utility Model Content

[0005] In view of the shortcomings of the prior art, the present invention provides a radio frequency switch circuit and a radio frequency switch. The technical problem to be solved is that the existing radio frequency switch circuits are difficult to simultaneously achieve high conduction stability, high switching speed and avoid radio frequency signal leakage.

[0006] To solve the above technical problems, in a first aspect, this utility model provides the following technical solution: a radio frequency switch circuit, including a radio frequency path formed by multiple MOS transistors connected in series, wherein the gate of each MOS transistor is electrically connected to a bias resistor, and the end of each bias resistor not electrically connected to the gate of the corresponding MOS transistor is electrically connected to an input resistor, wherein a switching unit is connected in parallel across the input resistor; the switching unit first turns on for a first time when the control signal received by the radio frequency path performs level switching, and then turns off, wherein the first time is the time for the parasitic capacitance of the MOS transistor to complete charging or the time for the parasitic capacitance of the MOS transistor to complete discharging.

[0007] In one embodiment of the first aspect, the MOS transistor is an NMOS transistor, and the series connection is an electrical connection between the source of the preceding NMOS transistor and the drain of the following NMOS transistor.

[0008] In one embodiment of the first aspect, the radio frequency path comprises five MOSFETs connected in series.

[0009] In one embodiment of the first aspect, the switching unit includes resistor R10-resistor R13 and MOSFET M10-MOSFET M13; One end of resistor R10 and one end of resistor R11 are respectively used to input switch control signals; The other end of resistor R10 is electrically connected to one end of resistor R12; the other end of resistor R12 is electrically connected to the drain of MOS transistor M10, the gate of MOS transistor M10 and the gate of MOS transistor M12 respectively; the source of MOS transistor M10 is electrically connected to the substrate of MOS transistor M12; and the source of MOS transistor M12 is electrically connected to one end of resistor R6. The other end of resistor R11 is electrically connected to one end of resistor R13. The other end of resistor R13 is electrically connected to the drain of MOS transistor M11, the gate of MOS transistor M11, and the gate of MOS transistor M13. The source of MOS transistor M11 is electrically connected to the substrate of MOS transistor M13. The source of MOS transistor M13 is electrically connected to the other end of resistor R6. The drain of MOS transistor M13 is electrically connected to the drain of MOS transistor M12.

[0010] In one embodiment of the first aspect, the MOS transistors M10 and M11 are floating MOS transistors.

[0011] Secondly, this utility model also provides a radio frequency switch, including a power management unit, a voltage regulator unit, a positive charge pump, a negative charge pump, a logic control unit, a circuit switching identification module, an auxiliary switch module, and a radio frequency channel circuit. The radio frequency channel circuit includes two of the above-mentioned radio frequency switch circuits, and the output terminals of the two radio frequency switch circuits are electrically connected. The power management unit provides operating voltage to the logic control unit and the voltage regulator circuit respectively. The voltage regulator circuit is electrically connected to the positive charge pump and the negative charge pump respectively, providing driving voltage to the positive charge pump and the negative charge pump. The positive charge pump and the negative charge pump are electrically connected to the radio frequency channel circuit respectively, providing positive bias voltage and negative bias voltage to the radio frequency channel circuit. The positive bias voltage and the negative bias voltage are used to control the on and off of the MOS transistors in the radio frequency path. The circuit switching identification module is electrically connected to the logic control unit and the voltage regulator circuit, respectively. It receives the logic control signal input from the logic control unit and the output voltage provided by the voltage regulator circuit, and generates an enable signal SW, a control signal RF1, and a control signal RF2 input to the auxiliary switching module based on the logic control signal. The auxiliary switching module generates switch control signals RF1N, RF1P, RF2N, and RF2P based on the enable signal SW, the control signal RF1, and the control signal RF2 to control the conduction and turn-off of the MOS transistors in the two switching units.

[0012] In one embodiment of the second aspect, the enable signal SW is a high-level signal, and the control signals RF1 and RF2 are two opposite signals.

[0013] In one embodiment of the second aspect, the circuit switching identification module includes a MOSFET P1, the source of which is electrically connected to the source of MOSFET P2 for receiving the output voltage provided by the voltage regulator circuit. The gate of MOSFET P1 is electrically connected to the gate of MOSFET N1, the input of inverter INV1, and one input of XOR gate XOR1. The drain of MOSFET P1 is electrically connected to the drain of MOSFET N1, the gate of MOSFET P2, the gate of MOSFET N2, and one end of capacitor C1. The source of MOSFET N1, the other end of capacitor C1, and the source of MOSFET N2 are all electrically connected to the source of MOSFET N2. The circuit is grounded. The drain of MOSFET N2 is electrically connected to the drain of MOSFET P2 and the other input of XOR gate XOR1. The output of XOR gate XOR1 is electrically connected to the two inputs of NAND gate NAND1. The output of NAND gate NAND1 outputs an enable signal SW, which is also electrically connected to one input of AND gate AND1 and one input of AND gate AND2. The output of inverter INV1 is electrically connected to the input of inverter INV2 and the other input of AND gate AND1. The output of inverter INV2 is electrically connected to the other input of AND gate AND2.

[0014] In one embodiment of the second aspect, MOS transistors P1 and P2 are PMOS transistors, and MOS transistors N1 and N2 are NMOS transistors.

[0015] In one embodiment of the second aspect, the two radio frequency switch circuits are a first radio frequency switch circuit and a second radio frequency switch circuit, respectively. The switch control signal RF1N and the switch control signal RF1P are input to the resistors R10 and R11 of the switch unit of the first radio frequency switch circuit, and the switch control signal RF2N and the switch control signal RF2P are input to the resistors R10 and R11 of the switch unit of the second radio frequency switch circuit. When the enable signal SW is high: When the control signal RF1 is high, the level of the switch control signal RF1N is greater than the positive bias voltage, the level of the switch control signal RF1P is low, the level of the switch control signal RF2N is the same as the positive bias voltage, and the level of the switch control signal RF2P is the same as the negative bias voltage. When the control signal RF2 is high, the level of the switch control signal RF2N is greater than the positive bias voltage, the level of the switch control signal RF2P is low, the level of the switch control signal RF1N is the same as the positive bias voltage, and the level of the switch control signal RF1P is the same as the negative bias voltage.

[0016] The advantages of this invention compared to the prior art are as follows: By setting a switching unit on both sides of the input resistor and controlling the on and off times of the switching unit, the switching unit is turned on when the RF path is on, thereby accelerating the establishment of the RF path. After the conduction is established, the switching unit is turned off, allowing the input resistor to be connected to the circuit, thus ensuring the stability of use. Moreover, when applied to high-power applications, since the switching unit is always off, there is no risk of signal leakage. Attached Figure Description

[0017] Figure 1 This is a circuit diagram of an existing radio frequency switch circuit; Figure 2 Here is a circuit diagram for another existing RF switch circuit; Figure 3 This is a circuit diagram of the radio frequency switch circuit in Example 1; Figure 4 This is a circuit diagram of the radio frequency switch in Example 2; Figure 5 This is a circuit diagram of the circuit switching identification module in Embodiment 2; Figure 6 The waveforms of the enable signal SW, control signal RF1, control signal EF2, switch control signal RF1N, switch control signal RF1P, switch control signal RF2N, and switch control signal RF2P in Example 2 are shown in the diagram. Detailed Implementation

[0018] The illustrative embodiments of this application include, but are not limited to, a radio frequency switch circuit and a radio frequency switch.

[0019] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0020] The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The singular forms “a,” “the,” and “the” used in this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any or all possible combinations of one or more of the associated listed items. Words such as “comprising” or “including” mean that the element or object preceding “comprising” or “including” covers the element or object listed following “comprising” or “including” and its equivalents, and does not exclude other elements or objects. Words such as “connected” or “linked” are not limited to physical or mechanical connections and can include electrical connections, whether direct or indirect.

[0021] Example 1 like Figure 3 As shown, this embodiment provides an RF switch circuit, including an RF path formed by five MOS transistors connected in series. The gate of each MOS transistor is electrically connected to a bias resistor. The end of each bias resistor that is not electrically connected to the gate of the corresponding MOS transistor is electrically connected to an input resistor R6. A switch unit 1 is connected in parallel across the input resistor R6. When the bias voltage received by the RF path switches levels, the switch unit 1 first turns on for a first time and then turns off. The first time is either the time when the parasitic capacitance of the MOS transistor is fully charged or the time when the parasitic capacitance of the MOS transistor is fully discharged.

[0022] for Figure 1 The circuit shown has five MOSFETs, namely MOSFET M1, MOSFET M2, MOSFET M3, MOSFET M4 and MOSFET M5. In addition, MOSFETs M1, M2, M3, M4 and M5 are all NMOS transistors, connected in series so that the source of the previous NMOS transistor is electrically connected to the drain of the next NMOS transistor. In some embodiments, the number of MOSFETs connected in series in the RF path can be adjusted according to actual needs. The bias resistors include resistors R1, R2, R3, R4, and R5; Additionally, the level switches from positive to low or from low to high.

[0023] In practical use, the RF switch circuit in this embodiment sets a switch unit 1 on both sides of the input resistor R6 and controls the on and off time of the switch unit 1. When the RF path is on, the switch unit 1 is turned on, which can accelerate the establishment of the RF path. After the conduction is established, the switch unit 1 is turned off, and the input resistor is connected to the circuit, which can ensure the stability of use. Moreover, when applied to high-power applications, since the switch unit 1 is always off, there is no risk of signal leakage.

[0024] Specifically, in this embodiment, in Figure 3 In the middle, the switching unit 1 includes resistors R10 and R13 and MOSFETs M10 and M13; One end of resistor R10 and one end of resistor R11 are used to input switch control signals, respectively. The other end of resistor R10 is electrically connected to one end of resistor R12; the other end of resistor R12 is electrically connected to the drain of MOSFET M10, the gate of MOSFET M10 and the gate of MOSFET M12 respectively; the source of MOSFET M10 is electrically connected to the substrate of MOSFET M12; and the source of MOSFET M12 is electrically connected to one end of resistor R6. The other end of resistor R11 is electrically connected to one end of resistor R13. The other end of resistor R13 is electrically connected to the drain of MOSFET M11, the gate of MOSFET M11, and the gate of MOSFET M13. The source of MOSFET M11 is electrically connected to the substrate of MOSFET M13. The source of MOSFET M13 is electrically connected to the other end of resistor R6. The drain of MOSFET M13 is electrically connected to the drain of MOSFET M12.

[0025] exist Figure 3 In the diagram, MOSFETs M10 and M11 are floating MOSFETs; MOSFETs M10 and M12 are NMOS transistors, while MOSFETs M11 and M13 are PMOS transistors.

[0026] for Figure 3 The reason why switch unit 1 in the diagram uses a series structure of NMOS and PMOS transistors as the switch, instead of using only a single MOS transistor, is as follows: Under steady-state conditions, the control potentials of the NMOS and PMOS transistors are at zero. At this time, the NMOS transistor is off, and as the RF power increases, the source terminal of the PMOS transistor receives a power signal through the resistor, thereby turning on the PMOS transistor. The PMOS and NMOS transistors are in series, and the PMOS transistor remains in a high-impedance state even when the NMOS transistor is turned off, thus shutting down the bypass module and preventing signal leakage as the RF power increases. Example 2 like Figure 4As shown, this embodiment provides a radio frequency switch, including a power management unit, a voltage regulator unit, a positive charge pump, a negative charge pump, a logic control unit, a circuit switching identification module, an auxiliary switch module, and a radio frequency channel circuit. The radio frequency channel circuit includes two radio frequency switch circuits as described in Embodiment 1, and the output terminals of the two radio frequency switch circuits are electrically connected. The power management unit provides operating voltage to the logic control unit and the voltage regulator circuit. The voltage regulator is electrically connected to the positive charge pump and the negative charge pump respectively, providing driving voltage to the positive charge pump and the negative charge pump. The positive charge pump and the negative charge pump are electrically connected to the RF channel circuit respectively, providing positive bias voltage and negative bias voltage to the RF channel circuit. The positive bias voltage and the negative bias voltage are used to control the on and off of the MOSFETs in the RF path. The circuit switching identification module is electrically connected to the logic control unit and the voltage regulator circuit respectively. It receives the logic control signal input from the logic control unit and the output voltage provided by the voltage regulator circuit. Based on the logic control signal, it generates an enable signal SW, a control signal RF1, and a control signal RF2 input to the auxiliary switching module. Based on the enable signal SW, the control signal RF1, and the control signal RF2, the auxiliary switching module generates switch control signals RF1N, RF1P, RF2N, and RF2P to control the conduction and turn-off of the MOSFETs in the two switching units.

[0027] In this embodiment, the enable signal SW is a high-level signal, and the duration of the enable signal SW is the conduction time of the switch unit 1. The control signals RF1 and RF2 are opposite signals. That is, when the control signal RF1 is a high-level signal, the control signal RF2 is a low-level signal, and when the control signal RF1 is a low-level signal, the control signal RF2 is a high-level signal.

[0028] In this embodiment, the circuit of the circuit switching identification module is as follows: Figure 5As shown, the circuit includes a MOSFET P1, whose source is electrically connected to the source of MOSFET P2 to receive the output voltage VP provided by the voltage regulator circuit. The gate of MOSFET P1 is electrically connected to the gate of MOSFET N1, the input of inverter INV1, and one input of XOR gate XOR1 to receive the logic control signal VC sent by the logic control unit. The drain of MOSFET P1 is electrically connected to the drain of MOSFET N1, the gate of MOSFET P2, the gate of MOSFET N2, and one end of capacitor C1. The source of MOSFET N1, the other end of capacitor C1, and MOSFET N2 are all electrically connected to the source of MOSFET N2. The sources of all transistors are grounded. The drain of MOSFET N2 is electrically connected to the drain of MOSFET P2 and the other input of XOR gate XOR1. The output of XOR gate XOR1 is electrically connected to the two inputs of NAND gate NAND1. The output of NAND gate NAND1 outputs an enable signal SW, which is also electrically connected to one input of AND gate AND1 and one input of AND gate AND2. The output of inverter INV1 is electrically connected to the input of inverter INV2 and the other input of AND gate AND1. The output of inverter INV2 is electrically connected to the other input of AND gate AND2.

[0029] In practical use, when the level of the logic control signal VC changes, the circuit switching recognition module recognizes the level change and generates a high-level enable signal SW. The duration of the high level of the enable signal SW can be adjusted by controlling the capacitance of capacitor C1 and the size of the MOSFET. At the same time, the control signals RF1 and RF2 are generated by the enable signal SW through an AND gate, so the duration of the enable signals RF1 and RF2 is the same as that of the enable signal SW.

[0030] Specifically, in this embodiment, MOS transistors P1 and P2 are PMOS transistors, and MOS transistors N1 and N2 are NMOS transistors.

[0031] In this embodiment, the two radio frequency switch circuits are a first radio frequency switch circuit and a second radio frequency switch circuit. The switch control signal RF1N and the switch control signal RF1P are input to the resistors R10 and R11 of the switch unit of the first radio frequency switch circuit, and the switch control signal RF2N and the switch control signal RF2P are input to the resistors R10 and R11 of the switch unit of the second radio frequency switch circuit. The signal waveforms of the switch control signals RF1N, RF1P, RF2N, and RF2P generated by the auxiliary switch module, and the levels of the enable signal SW, control signal RF1, and control signal RF2 are shown in the figure below. Figure 6 As shown, their relationship is as follows: When the enable signal SW is high: When the control signal RF1 is high, the level of the switch control signal RF1N is greater than the positive bias voltage, the level of the switch control signal RF1P is low, the level of the switch control signal RF2N is the same as the positive bias voltage, and the level of the switch control signal RF2P is the same as the negative bias voltage. When the control signal RF2 is high, the level of the switch control signal RF2N is greater than the positive bias voltage, the level of the switch control signal RF2P is low, the level of the switch control signal RF1N is the same as the positive bias voltage, and the level of the switch control signal RF1P is the same as the negative bias voltage. When the enable signal SW is low, the switch control signals RF1N, RF1P, RF2N, RF2P, RF1, and RF2 are all low.

[0032] for Figure 4 In the circuit shown, when the control signal RF1 is high, the potential of the switch control signal RF1N is greater than the positive bias voltage, thereby turning on MOSFETs M10 and M12. The switch control signal RF1P at 0 potential turns on MOSFETs M11 and M13, thereby short-circuiting the input resistor R6. Similarly, the switch control signal RF2N is a positive bias voltage, turning on the NMOS transistor of another switch unit 1, and the switch control signal RF2P is a negative bias voltage, turning on the PMOS transistor of another switch unit 1, making switch unit 1 conduct, thereby accelerating the establishment of the RF path.

[0033] and Figure 2 Compared to the circuit shown, in steady state, because switch 1 remains closed with high impedance, there is no signal leakage as the RF power increases; and since the forward voltage drop of the diode is typically 0.6V, if... Figure 2 The auxiliary switching circuit shown uses a MOSFET with a forward voltage difference that is an order of magnitude smaller than that of a diode. This improves the energy conversion efficiency of the bias voltage transmitted to the RF path, and the switching time is also significantly improved compared to the diode structure as the forward voltage difference decreases.

[0034] Based on the above description and inspired by this utility model, those skilled in the art can make various changes and modifications without departing from the technical concept of this utility model. The technical scope of this utility model is not limited to the contents of the specification, but must be determined according to the scope of the claims.

Claims

1. A radio frequency switching circuit, characterized in that, The system includes an RF path formed by multiple MOSFETs connected in series. The gate of each MOSFET is electrically connected to a bias resistor. The end of each bias resistor that is not electrically connected to the gate of the corresponding MOSFET is electrically connected to an input resistor. A switching unit is connected in parallel across the input resistor. When the bias voltage received by the RF path undergoes level switching, the switching unit first turns on for a first time and then turns off. The first time is either the time when the parasitic capacitance of the MOSFET completes charging or the time when the parasitic capacitance of the MOSFET completes discharging.

2. The radio frequency switching circuit according to claim 1, characterized in that, The MOS transistor is an NMOS transistor, and the series connection is an electrical connection between the source of the preceding NMOS transistor and the drain of the following NMOS transistor.

3. The radio frequency switching circuit according to claim 1, characterized in that, The radio frequency path includes five MOSFETs connected in series.

4. A radio frequency switching circuit according to any one of claims 1-3, characterized in that, The switching unit includes resistors R10 and R13 and MOSFETs M10 and M13. One end of resistor R10 and one end of resistor R11 are respectively used to input switch control signals; The other end of resistor R10 is electrically connected to one end of resistor R12; the other end of resistor R12 is electrically connected to the drain of MOS transistor M10, the gate of MOS transistor M10 and the gate of MOS transistor M12 respectively; the source of MOS transistor M10 is electrically connected to the substrate of MOS transistor M12; and the source of MOS transistor M12 is electrically connected to one end of resistor R6. The other end of resistor R11 is electrically connected to one end of resistor R13. The other end of resistor R13 is electrically connected to the drain of MOS transistor M11, the gate of MOS transistor M11, and the gate of MOS transistor M13. The source of MOS transistor M11 is electrically connected to the substrate of MOS transistor M13. The source of MOS transistor M13 is electrically connected to the other end of resistor R6. The drain of MOS transistor M13 is electrically connected to the drain of MOS transistor M12.

5. The radio frequency switching circuit according to claim 4, characterized in that, The MOS transistors M10 and M11 are floating MOS transistors.

6. A radio frequency switch, characterized in that, It includes a power management unit, a voltage regulator unit, a positive charge pump, a negative charge pump, a logic control unit, a circuit switching identification module, an auxiliary switch module, and a radio frequency channel circuit. The radio frequency channel circuit includes two radio frequency switch circuits as described in claim 3 or 4, and the output terminals of the two radio frequency switch circuits are electrically connected. The power management unit provides operating voltage to the logic control unit and the voltage regulator circuit respectively. The voltage regulator circuit is electrically connected to the positive charge pump and the negative charge pump respectively, providing driving voltage to the positive charge pump and the negative charge pump. The positive charge pump and the negative charge pump are electrically connected to the radio frequency channel circuit respectively, providing positive bias voltage and negative bias voltage to the radio frequency channel circuit. The positive bias voltage and the negative bias voltage are used to control the on and off of the MOS transistors in the radio frequency path. The circuit switching identification module is electrically connected to the logic control unit and the voltage regulator circuit, respectively. It receives the logic control signal input from the logic control unit and the output voltage provided by the voltage regulator circuit, and generates an enable signal SW, a control signal RF1, and a control signal RF2 input to the auxiliary switching module based on the logic control signal. The auxiliary switching module generates switch control signals RF1N, RF1P, RF2N, and RF2P based on the enable signal SW, the control signal RF1, and the control signal RF2 to control the conduction and turn-off of the MOS transistors in the two switching units.

7. A radio frequency switch according to claim 6, characterized in that, The enable signal SW is a high-level signal, and the control signals RF1 and RF2 are two opposite signals.

8. A radio frequency switch according to claim 7, characterized in that, The circuit switching identification module includes a MOSFET P1. The source of MOSFET P1 is electrically connected to the source of MOSFET P2 to receive the output voltage provided by the voltage regulator circuit. The gate of MOSFET P1 is electrically connected to the gate of MOSFET N1, the input of inverter INV1, and one input of XOR gate XOR1. The drain of MOSFET P1 is electrically connected to the drain of MOSFET N1, the gate of MOSFET P2, the gate of MOSFET N2, and one end of capacitor C1. The source of MOSFET N1, the other end of capacitor C1, and the source of MOSFET N2 are all grounded. The drain of N2 is electrically connected to the drain of MOSFET P2 and the other input of XOR gate XOR1. The output of XOR gate XOR1 is electrically connected to the two inputs of NAND gate NAND1. The output of NAND gate NAND1 outputs an enable signal SW, which is also electrically connected to one input of AND gate AND1 and one input of AND gate AND2. The output of inverter INV1 is electrically connected to the input of inverter INV2 and the other input of AND gate AND1. The output of inverter INV2 is electrically connected to the other input of AND gate AND2.

9. A radio frequency switch according to claim 8, characterized in that, The MOS transistors P1 and P2 are PMOS transistors, and the MOS transistors N1 and N2 are NMOS transistors.

10. A radio frequency switch according to claim 8, characterized in that, The two radio frequency switch circuits are a first radio frequency switch circuit and a second radio frequency switch circuit. The switch control signal RF1N and the switch control signal RF1P are input to the resistors R10 and R11 of the switch unit of the first radio frequency switch circuit, and the switch control signal RF2N and the switch control signal RF2P are input to the resistors R10 and R11 of the switch unit of the second radio frequency switch circuit. When the enable signal SW is high: When the control signal RF1 is high, the level of the switch control signal RF1N is greater than the positive bias voltage, the level of the switch control signal RF1P is low, the level of the switch control signal RF2N is the same as the positive bias voltage, and the level of the switch control signal RF2P is the same as the negative bias voltage. When the control signal RF2 is high, the level of the switch control signal RF2N is greater than the positive bias voltage, the level of the switch control signal RF2P is low, the level of the switch control signal RF1N is the same as the positive bias voltage, and the level of the switch control signal RF1P is the same as the negative bias voltage.

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