Integrated multi-physical USB interface digital television control peripheral device

Abstract

The utility model relates to interface technical field provides a kind of integrated multi-physical USB interface digital television control peripheral device, integrated housing;Wherein, integrated housing is equipped with at least one signal receiving module, at least one wireless communication module, at least one data interface, and with signal receiving module, wireless communication module and data interface connection's main control unit;Main control unit includes main CPU, and main CPU is electrically connected with resource allocation circuit and protocol conversion circuit;The output end of resource allocation circuit is electrically connected with protocol conversion circuit, and the input end of resource allocation circuit is electrically connected with signal receiving module and wireless communication module respectively;The input end of protocol conversion circuit is electrically connected with signal receiving module and wireless communication module respectively, and the output end of protocol conversion circuit is electrically connected with data interface input end, and data interface and external host computer data interaction.

Description

Technical Field

[0001] This utility model relates to the field of interface technology, and in particular to a digital TV control peripheral device integrating multiple physical USB interfaces. Background Technology

[0002] In existing technologies, various types of external devices (such as signal receiving devices, wireless communication devices, and data expansion devices) typically need to connect to the host through independent interfaces, resulting in excessive host port usage and high connection complexity. Different types of data (such as external signal data, wireless communication data, and conventional device data) lack a unified transmission management mechanism, which can easily lead to problems such as uneven resource allocation and transmission conflicts. At the same time, the collaborative control between devices largely relies on external software, and the hardware layer lacks autonomous scheduling capabilities, resulting in low response efficiency and poor compatibility. Utility Model Content

[0003] This application proposes a digital TV control peripheral device integrating multiple physical USB interfaces, which aims to achieve unified access to multiple types of data, intelligent resource scheduling and hardware-level collaborative control, reduce host port occupation, and improve data transmission efficiency and device compatibility.

[0004] To achieve the above objectives, this application provides the following technical solution: In a first aspect, this application proposes a digital television control peripheral device integrating multiple physical USB interfaces, comprising: Integrated housing; wherein, The integrated housing contains at least one signal receiving module, at least one wireless communication module, at least one data interface, and a main control unit connected to the signal receiving module, the wireless communication module, and the data interface; The main control unit includes a main CPU, which is electrically connected to a resource allocation circuit and a protocol conversion circuit. The output of the resource allocation circuit is electrically connected to the protocol conversion circuit, and the input of the resource allocation circuit is electrically connected to the signal receiving module and the wireless communication module, respectively. The input terminals of the protocol conversion circuit are electrically connected to the signal receiving module and the wireless communication module, respectively, and the output terminal of the protocol conversion circuit is electrically connected to the input terminal of the data interface, which interacts with the external host.

[0005] In conjunction with the first aspect, the signal receiving module is a DVB tuner module, which is used to receive DVB-C signals or DVB-T signals.

[0006] In conjunction with the first aspect, the wireless communication module includes a radio frequency (RF) chip, an interface chip, and a Bluetooth module, wherein the RF chip and the interface chip are electrically connected to the Bluetooth module; wherein, The radio frequency chip is a TUNER chip; The interface chip is a PHY chip, and the PHY chip is connected to an external network port.

[0007] In conjunction with the first aspect, the resource allocation circuit includes a signal sampling circuit and a bandwidth allocator; wherein, The input terminal of the signal sampling circuit is electrically connected to the signal receiving module and the wireless communication module, and the output terminal of the signal sampling circuit is electrically connected to the bandwidth distributor. The output of the bandwidth distributor is electrically connected to the data interface.

[0008] In conjunction with the first aspect, the protocol conversion circuit includes a protocol conversion chip, and the output terminal of the protocol conversion chip is electrically connected to the data interface.

[0009] In conjunction with the first aspect, the data interface is integrated into at least one interface area of ​​the integrated housing.

[0010] In conjunction with the first aspect, the data interface includes a USB interface, an RF interface, a Type-C interface, and an RJ45 interface; wherein the USB interface integrates a USB hub chip.

[0011] In conjunction with the first aspect, the integrated housing also integrates a power supply module, which is electrically connected to the signal receiving module, the wireless communication module, and the main control unit.

[0012] In conjunction with the first aspect, the integrated housing includes a heat dissipation surface and a signal indication surface; wherein, The heat dissipation surface includes an array of heat dissipation holes; The signal indicator surface is equipped with signal indicator lights.

[0013] The beneficial effects of this application are as follows: This application integrates multiple functional modules into a single housing, reducing the occupation of host ports by external devices and simplifying the connection structure; it dynamically allocates transmission resources through a resource allocation unit to ensure stable transmission of high-priority data (such as real-time signals and low-latency communication data); it converts multiple types of data into a unified data interface protocol through a protocol conversion unit, enabling plug-and-play functionality with external hosts without the need for additional driver support; and the main control unit achieves unified data processing and resource scheduling through a hardware layer, improving device response efficiency and collaborative control capabilities.

[0014] Other features and advantages of this invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of this invention may be realized and obtained by means of the structures particularly pointed out in the written description and the accompanying drawings.

[0015] The technical solution of this utility model will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0016] The accompanying drawings are provided to further understand the present invention and form part of the specification. They are used together with the embodiments of the present invention to explain the present invention and do not constitute a limitation thereof.

[0017] In the attached diagram: Figure 1 This is a schematic diagram of the first component of a digital TV control peripheral device integrating multiple physical USB interfaces in an embodiment of this utility model; Figure 2 This is a schematic diagram of the internal control principle in an embodiment of this utility model; Figure 3 This is a schematic diagram of the integrated shell in an embodiment of the present utility model; Figure 4 This is a schematic diagram of the internal circuit in an embodiment of the present invention; Figure 5 This is a six-view diagram of a digital TV control peripheral device integrating multiple physical USB interfaces, as described in an embodiment of this utility model. Detailed Implementation

[0018] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.

[0019] Example 1: In a first aspect, this application proposes a digital television control peripheral device integrating multiple physical USB interfaces, comprising: Integrated housing 1; wherein, The integrated housing 1 contains at least one signal receiving module 24, at least one wireless communication module 25, at least one data interface 26, and a main control unit 2 connected to the signal receiving module 24, the wireless communication module 25 and the data interface 26. The main control unit 2 includes a main CPU 21, which is electrically connected to a resource allocation circuit 22 and a protocol conversion circuit 23. The output of the resource allocation circuit 22 is electrically connected to the protocol conversion circuit 23, and the input of the resource allocation circuit 22 is electrically connected to the signal receiving module 24 and the wireless communication module 25, respectively. The input terminals of the protocol conversion circuit 23 are electrically connected to the signal receiving module 24 and the wireless communication module 25, respectively. The output terminal of the protocol conversion circuit 23 is electrically connected to the input terminal of the data interface 26, and the data interface 26 interacts with the external host 3.

[0020] In this application, as Figure 3As shown, the integrated housing 1 is a one-piece molded housing structure used to house and protect the internal electronic components.

[0021] In this application, as Figure 1 As shown, the signal receiving module 24 is used to receive infrared, radio frequency, or network signals. Based on the antenna and sensor, the received signals are filtered and demodulated into electrical signals, and can receive various signals, such as remote control signals and broadcast signals.

[0022] In this application, as Figure 1 As shown, the wireless communication module 25 is used for wireless data transmission, which can be Wi-Fi, Bluetooth, or ZigBee; it achieves wireless connection and performs data transmission and reception through radio frequency circuits and protocol stack.

[0023] In this application, as Figure 1 As shown, data interface 26 is used to connect to external host 3, including but not limited to USB Type-C or HDMI; to ensure compatibility with different external hosts 3. External hosts include televisions or computers.

[0024] In this application, as Figure 1 As shown, the main control unit 2 is a central control component, integrated inside the housing, which coordinates the operation of each module. In the embedded system, it manages data flow and power distribution through bus or GPIO interface, and plays a centralized control role.

[0025] In this application, as Figure 1As shown, the resource allocation circuit 22 is connected to the main CPU 21, which is a core processor, preferably an ARM Cortex-M series processor; it is used to execute firmware instructions, process data, and schedule tasks. It controls the resource allocation circuit 22 to allocate resources such as bandwidth and memory through digital signals. It also performs data format conversion through the protocol conversion circuit 23 to achieve dynamic protocol adaptation, enabling interaction between different external hosts 3. The output of the resource allocation circuit 22 is electrically connected to the protocol conversion circuit 23, used to output the resource-allocated data to the protocol conversion circuit 23. By cascading the circuits, it ensures that the data flow directly enters the protocol conversion stage after resource allocation, reducing intermediate steps and lowering signal loss and latency. The input of the resource allocation circuit 22 is electrically connected to the signal receiving module 24 / wireless communication module 25 for parallel processing in the presence of multiple signal sources. The input of the protocol conversion circuit 23 is also electrically connected to the signal receiving module 24 / wireless communication module 25 for fast data conversion. The protocol conversion circuit 23 uniformly formats data from different protocols, shortening the conversion path, improving real-time performance, and integrating heterogeneous networks. The output of the protocol conversion circuit 23 is electrically connected to the input of the data interface 26, which ensures that the output level matches the voltage of the structure, guaranteeing correct data transmission and preventing bit errors. The data interface 26 interacts with the external host 3, enabling bidirectional communication and data exchange via interrupt or polling mechanisms. It offers plug-and-play functionality, enhancing user convenience.

[0026] In actual implementation: The integrated housing 1 is made of ABS material by injection molding or of metal material by molding. Signal receiving module 24 integrates a TV tuner module; The wireless communication module 25 integrates a Bluetooth 5.2 module; Data interface 26 includes: USB-A interface, USB-C interface, RF interface, Type-C interface, and RJ45 interface, used for data transmission and device power supply; the resource allocation circuit 22 receives TS stream data from the tuner and wireless data from the Bluetooth module at its input, and after bandwidth scheduling, transmits it to the protocol conversion circuit 23, which converts it into USB protocol data and then interacts with the external host 3 through the USB-C interface. The digital TV signal (DVB-C, DVB-T, etc.) input by the tuner outputs a TS stream to the CPU for processing. The CPU outputs Ethernet data or USB data, and simultaneously receives and processes Bluetooth signals, thereby enabling synchronous data interaction between the TV and the external interactive device.

[0027] Example 2: Figure 1 As shown, in one type of signal receiving module 24, there is a DVB tuner module, which is used to receive DVB-C or DVB-T signals. Figure 2 As shown, Figure 2 A schematic diagram showing the specific components of the main control unit 2 of this application that are connected to the tuner for interaction.

[0028] In this application, the DVB tuner module is a tuner hardware component conforming to digital video broadcasting standards, used for receiving and demodulating digital television signals. The DVB tuner is based on the superheterodyne reception principle, down-converting the radio frequency signal to an intermediate frequency signal via a tuner, and then converting it to a baseband signal via a demodulator. It employs QAM (Quadrature Amplitude Modulation) or COFDM (Coded Orthogonal Frequency Division Multiplexing) demodulation technology. The DVB-C signal is specifically designed for cable television network environments, efficiently processing high-bitrate MPEG transport streams, and offering a 3-5 dB improvement in signal-to-noise ratio compared to general-purpose modules in wired environments. The DVB-T signal is compatible with terrestrial digital television broadcasting standards, supports UHF band reception, and performs excellently in mobile reception and complex urban environments. Compared to analog receiver modules, it significantly improves resistance to multipath interference and supports single-frequency network applications. It effectively overcomes multipath interference and frequency-selective fading. The Bluetooth module is electrically connected to the main CPU21 via a UART interface, and the control signals of the radio frequency chip and the encoding chip are processed and relayed by the Bluetooth module. The interface chip uses a gigabit Ethernet PHY chip, which is connected to the main CPU through the MII interface and externally connected to an RJ45 network port 263.

[0029] Example 3: As Figure 1 As shown, the wireless communication module 25 includes a radio frequency chip, an interface chip, and a Bluetooth module, with the radio frequency chip and interface chip electrically connected to the Bluetooth module; wherein, The radio frequency chip is a TUNER chip; The interface chip is a PHY chip, and the PHY chip is connected to an external network port.

[0030] In this application, the radio frequency (RF) chip is an integrated circuit component specifically designed to process radio frequency signals, responsible for signal modulation, demodulation, and amplification; the interface chip is an integrated circuit responsible for conversion between different protocols and electrical standards, used for protocol conversion. The Bluetooth module expands the device's application scenarios, providing a low-power wireless connectivity solution. The PHY chip implements OSI physical layer functions, including encoding / decoding, clock recovery, signal driving, and link detection, ensuring physical layer compatibility and stability of network communication. Through an external network port, i.e., through a standard interface such as RJ45, connecting to a wired network, the PHY chip handles the transmission and reception of Ethernet signals, providing a backup connection to the wired network, enhancing communication reliability, and ensuring connection stability when wireless signals are weak. Figure 4 As shown, Figure 4 This is a schematic diagram of the internal circuit connecting the wireless communication module 25 and the main CPU 21 in this application. Example 4: Figure 1As shown, the resource allocation circuit 22 includes a signal sampling circuit and a bandwidth distributor; wherein, the input terminal of the signal sampling circuit is electrically connected to the signal receiving module 24 and the wireless communication module 25, and the output terminal of the signal sampling circuit is electrically connected to the bandwidth distributor; the output terminal of the bandwidth distributor is electrically connected to the data interface.

[0031] In this application, the bandwidth allocator is a digital logic circuit that dynamically allocates communication bandwidth resources. Under the control of the main CPU 21, it dynamically adjusts the data transmission bandwidth ratio according to the priority and real-time requirements of each signal source to avoid a single signal source occupying too many resources and causing other signals to be blocked. The signal sampling circuit is an electronic circuit that is specifically designed to periodically collect and quantize the input signal. When connected to digital television and external devices, it uses a sample-and-hold circuit and an ADC to discretize the continuous signal at a fixed frequency to prevent aliasing distortion and achieve accurate conversion of analog signals to digital signals.

[0032] The input terminal of the signal sampling circuit is electrically connected to the signal receiving module 24 and the wireless communication module 25. It receives the raw signal from the signal receiving module 24 and connects it through an impedance matching circuit to ensure signal integrity, reduce reflection and attenuation, guarantee the accuracy and real-time performance of the sampled data, and reduce errors introduced by intermediate links. Simultaneously, it receives the output signal from the wireless communication module, establishes a parallel input channel, and samples and processes signals from different sources separately to improve processing efficiency. Finally, the bandwidth allocation result directly controls the data transmission of the data interface. By adjusting the transmission rate and timing of the data interface through control signals, dynamic bandwidth allocation is achieved. The signal sampling circuit uses a dual-channel operational amplifier and a 12-bit ADC to sample the TS stream signal output by the DVB tuner and the I / Q signal of the Bluetooth module in real time. The bandwidth allocator uses an FPGA chip and divides the USB bus bandwidth into three paths through time-division multiplexing logic. After allocation, the sampled data is transmitted to the protocol conversion circuit through the LVDS interface.

[0033] Example 5: Figure 1 As shown, the protocol conversion circuit 23 includes a protocol conversion chip, and the output terminal of the protocol conversion chip is electrically connected to the data interface 26.

[0034] In this application, the protocol conversion circuit 23 is a dedicated protocol conversion integrated circuit chip, rather than a discrete component or software. The protocol conversion chip integrates hardware logic circuits, using a state machine and dedicated processing unit to convert data formats, timing, and electrical standards between different communication protocols, such as converting the USB protocol to UART, I2C, or other device-specific protocols. Compared to software protocol conversion, hardware chips offer faster processing speeds and lower latency; compared to discrete component solutions, they offer higher integration, better reliability, and lower power consumption, providing deterministic protocol conversion performance. The output signal of the protocol conversion chip, after protocol processing, is directly connected to the input of the data interface. By establishing a direct signal path, intermediate conversion steps are reduced, signal integrity issues are mitigated, and the reliability and real-time performance of data transmission are improved.

[0035] For example, the protocol conversion circuit 23 integrates a protocol conversion chip. The input end is connected to the FPGA of the resource allocation circuit through the PCIe interface to receive TS stream data and Bluetooth HCI data. The internal hardware logic converts the two types of data into a Bulk transmission format that conforms to the USB 3.0 protocol. The output end interacts with the external host through the USB-C interface physical layer chip.

[0036] Example 6: As Figure 3 As shown, the data interface 26 is integrated into at least one interface area 4 of the integrated housing 1.

[0037] In this application, the data interface 26 is deployed in a specific area on the housing designed specifically for setting up the interface. The interface area 4 is not unique. The data interface 26 is combined with the housing structure by means of clips, screws, or welding to improve stability. For example, the interface area 4 adopts a stepped layout, with an RJ45 network port (supporting PD power supply) at the top and a USB port on the side. All interfaces are electrically connected to the protocol conversion circuit of the main control unit through internal ribbon cables. The edge of the interface area is provided with a dustproof rubber plug.

[0038] Example 7: As Figure 3 and Figure 5 As shown, data interface 26 includes a USB interface, an RF interface, a Type-C interface, and an RJ45 interface; among them, the USB interface integrates a USB hub chip.

[0039] In this application, the data interface 26 includes a USB interface, based on the USB protocol stack, and achieves full-duplex communication through differential signal lines (D+ / D-) to enable device expansion. The heat dissipation surface 10 has heat dissipation holes 101 and an RF interface. The RF interface 263 connects to an RF cable to transmit high-frequency signals and receive RF signals such as television signals and antenna signals. The front view surface 14 of the housing has a Category 6 Ethernet port 262 and a Type-C interface 261. This provides a stable and reliable wired network connection, ensuring network connectivity when wireless signals are weak, and supports higher power charging and multiple data transmission protocols. The USB interface integrates a USB hub chip to enable USB port expansion. On the integrated housing 1, the signal indicator surface 13 has a signal indicator light 131. The left side 15 and right side 11 of the housing are symmetrical and have no gaps. The rear view surface 12 of the housing also has some heat dissipation holes. All interfaces comply with USB-IF and IEEE 802.3 standards and support hot-swapping.

[0040] Example 8: As Figure 3 As shown, the integrated housing 1 also houses a power supply module, which is electrically connected to the signal receiving module 24, the wireless communication module 25, and the main control unit 2. The power supply module is a general-purpose power supply component, integrating AC-DC or DC-DC power circuitry within the device to convert and distribute the operating voltage required by the internal modules from the external power input. The output voltage (e.g., 3.3V, 5V) of the power supply module is transmitted to the power input terminal of the signal receiving module via power wiring.

[0041] Example 9: As Figure 3 As shown, the integrated housing 1 includes a heat dissipation surface 10 and a signal indication surface 13; wherein, The heat dissipation surface 10 includes an array of heat dissipation holes 101; The signal indicator surface 13 is equipped with a signal indicator light 131.

[0042] In this application, the heat dissipation surface 10 is a specific surface area on the housing designed specifically for heat dissipation. By increasing the surface area and optimizing the heat conduction path, it utilizes the principles of thermal convection and thermal radiation to quickly dissipate the heat generated by the internal electronic components to the external environment. The signal indicator surface 13 is a dedicated area on the housing for displaying the device's operating status. The signal indicator light 131 centrally manages the status indication function, improving the user experience and facilitating quick identification of the device's operating status. The heat dissipation holes 101 are based on fluid mechanics principles, forming effective air convection channels through an array of holes. The signal indicator light 131 is used to display the operating status and provide feedback on abnormalities.

[0043] For example, the integrated housing 1 includes a heat dissipation surface 10 (back side) and a signal indication surface 13 (front side). The heat dissipation surface 10 is designed with an array of circular heat dissipation holes, which dissipate heat through natural convection; The signal indicator surface 13 is located above the interface area and has at least one LED indicator, or multiple LEDs. For example, a red power indicator, a green TV signal indicator, and a blue Bluetooth status indicator. The LEDs are packaged in 0805 packages and their on / off state is controlled by the GPIO pins of the main control unit.

[0044] Obviously, those skilled in the art can make various modifications and variations to this utility model without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this utility model and their equivalents, this utility model also intends to include these modifications and variations.

Claims

1. A digital TV control peripheral device integrating multiple physical USB interfaces, characterized in that, include: Integrated housing (1); wherein, The integrated housing (1) contains at least one signal receiving module (24), at least one wireless communication module (25), at least one data interface (26), and a main control unit (2) connected to the signal receiving module (24), the wireless communication module (25) and the data interface (26). The main control unit (2) includes a main CPU (21), which is electrically connected to a resource allocation circuit (22) and a protocol conversion circuit (23); The output of the resource allocation circuit (22) is electrically connected to the protocol conversion circuit (23), and the input of the resource allocation circuit (22) is electrically connected to the signal receiving module (24) and the wireless communication module (25), respectively. The input terminal of the protocol conversion circuit (23) is electrically connected to the signal receiving module (24) and the wireless communication module (25) respectively. The output terminal of the protocol conversion circuit (23) is electrically connected to the input terminal of the data interface (26). The data interface (26) interacts with the external host (3).

2. The integrated multi-physical USB interface digital TV control peripheral device as described in claim 1, characterized in that, The signal receiving module (24) is a DVB tuner module, which is used to receive DVB-C signals or DVB-T signals.

3. The integrated multi-physical USB interface digital TV control peripheral device as described in claim 1, characterized in that, The wireless communication module (25) includes a radio frequency chip, an interface chip, and a Bluetooth module, wherein the radio frequency chip and the interface chip are electrically connected to the Bluetooth module; wherein, The radio frequency chip is a TUNER chip; The interface chip is a PHY chip, and the PHY chip is connected to an external network port.

4. The integrated multi-physical USB interface digital TV control peripheral device as described in claim 1, characterized in that, The resource allocation circuit (22) includes a signal sampling circuit and a bandwidth allocator; wherein, The input terminal of the signal sampling circuit is electrically connected to the signal receiving module (24) and the wireless communication module (25), and the output terminal of the signal sampling circuit is electrically connected to the bandwidth distributor. The output of the bandwidth distributor is electrically connected to the data interface.

5. The integrated multi-physical USB interface digital TV control peripheral device as described in claim 1, characterized in that, The protocol conversion circuit (23) includes a protocol conversion chip, and the output of the protocol conversion chip is electrically connected to the data interface (26).

6. The integrated multi-physical USB interface digital TV control peripheral device as described in claim 1, characterized in that, The data interface (26) is integrated into at least one interface area (4) of the integrated housing (1).

7. The integrated multi-physical USB interface digital TV control peripheral device as described in claim 1, characterized in that, The data interface (26) includes a USB interface, an RF interface, a Type-C interface, and an RJ45 interface; among which, The USB interface integrates a USB hub chip.

8. The integrated multi-physical USB interface digital TV control peripheral device as described in claim 1, characterized in that, The integrated housing (1) also integrates a power supply module, which is electrically connected to the signal receiving module, the wireless communication module and the main control unit.

9. The integrated multi-physical USB interface digital TV control peripheral device as described in claim 1, characterized in that, The integrated housing (1) includes a heat dissipation surface (10) and a signal indicating surface (13); wherein, The heat dissipation surface (10) includes an array of heat dissipation holes (101). The signal indicator surface (13) is equipped with a signal indicator light (131).

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