Power amplifier based on matching within a generic package envelope

Abstract

The utility model discloses a kind of power amplifiers based on general type package tube shell inner matching, including package tube shell, power amplifier die and inner matching circuit, the package tube shell includes a device package metal base, a device package frame, and the plurality of pins extended from the device package frame side wall, the plurality of pins are divided into the first pin group and the second pin group with non-standard impedance characteristics, the first pin group is the auxiliary pin of package tube shell, and the second pin group is the input and output pin of package tube shell, the power amplifier die is fixed in device package metal base, the first pin group is used as radio frequency signal channel, and the second pin group is used as direct current feed channel;Inner matching circuit is used to match the input and output impedance of power amplifier die, and compensate the non-standard impedance characteristics of the first pin group. Inner matching of power amplifier is realized using general type ceramic package tube shell, which greatly improves the multiplexing and economy of packaging.

Description

Technical Field

[0001] This utility model belongs to the field of power amplifier technology, and specifically relates to a power amplifier based on in-cell matching of a general-purpose package. Background Technology

[0002] Radio frequency (RF) microwave power amplifiers are core components in RF systems such as wireless communication systems, radar systems, and electronic countermeasures equipment. Their main function is to amplify the power of RF signals. To improve device performance and simplify application circuits for end users, the industry typically employs internal matching technology. This technology integrates an active die and matching circuitry within the device package, bringing the input / output port impedance of the device close to standard values ​​(e.g., 50 ohms).

[0003] In existing technologies, internally matched power amplifier devices mostly employ customized packaging. To ensure signal transmission quality, the RF input / output pins of these dedicated packages typically require special design to ensure their characteristic impedance is close to a standard value (e.g., 50 ohms). However, this customized approach has inherent drawbacks such as poor versatility, long development cycles, and high manufacturing costs.

[0004] In contrast, there are numerous general-purpose packages available on the market for externally matched or pre-matched devices. These packages are inexpensive and readily available. In the conventional use of these packages, RF signals are transmitted through their designated standard input / output pins, while auxiliary pins such as V-pins are used only for non-RF main path functions such as connecting bypass capacitors. However, because their designated standard input / output pins are not designed with strict 50-ohm impedance control, resulting in significant impedance mismatch, it is generally recognized by those skilled in the art that these general-purpose packages, in their conventional use, cannot be directly used to develop fully internally matched devices requiring standard impedance ports.

[0005] Therefore, how to overcome existing technological bottlenecks and achieve high-performance internal matching functions using low-cost general-purpose packaging is a technical problem that urgently needs to be solved in this field. Utility Model Content

[0006] To address the aforementioned technical problems, the present invention aims to provide a power amplifier based on internal matching in a universal package. This power amplifier utilizes a universal ceramic package to achieve internal matching, thereby overcoming the limitations of existing internal matching devices, such as poor package versatility and high cost, as well as the technical bias that universal packages cannot be used for internal matching devices. This significantly improves the reusability and economy of the package.

[0007] To address these problems in the prior art, the technical solution provided by this utility model is as follows: A power amplifier based on in-package matching of a general-purpose package includes a package, a power amplifier die, and an internal matching circuit. The package includes a device package metal base, a device package frame, and a plurality of pins extending from the sidewall of the device package frame. The plurality of pins are divided into a first pin group and a second pin group with non-standard impedance characteristics. The first pin group is an auxiliary pin of the package, and the second pin group is an input and output pin of the package. The power amplifier die is fixed to the device package metal base. The internal matching circuit includes an input matching circuit and an output matching circuit. The internal matching circuit is fixed inside the package and electrically interconnected with the input and output terminals of the power amplifier die through bonding leads. The first pin group serves as a radio frequency signal channel, and is respectively connected to the radio frequency signal input terminal and the radio frequency signal output terminal of the internal matching circuit; The second pin group serves as a DC power supply channel, and is connected to the gate bias port and drain bias port of the power amplifier die, respectively; The internal matching circuit is used to match the input and output impedance of the power amplifier die. The internal matching circuit is also used to compensate for the non-standard impedance characteristics of the first pin group and transform the non-standard impedance port of the first pin group into a standard impedance RF port.

[0008] In a preferred embodiment, the first pin group is disposed at both ends of the package housing, the second pin group is disposed on both sides of the package housing, and the pin area of ​​the second pin group is larger than the pin area of ​​the first pin group.

[0009] In a preferred embodiment, the internal matching circuit comprises a lumped parameter network and / or a distributed parameter network composed of one or more passive components.

[0010] In a preferred embodiment, the input matching circuit of the internal matching circuit includes a cascaded first π-shaped lumped parameter network and a first distributed parameter network. The first π-shaped lumped parameter network includes three inductors connected in series. The connection points of two adjacent inductors are each connected to a grounding capacitor. The other end of the first inductor is connected to the input terminal of the power amplifier die, and the other end of the third inductor is connected to the first distributed parameter network. The first distributed parameter network includes multiple microstrip transmission lines connected in series.

[0011] In a preferred embodiment, the output matching circuit of the internal matching circuit includes a cascaded second π-shaped lumped parameter network and a second distributed parameter network. The second π-shaped lumped parameter network includes three inductors connected in series. The connection points of two adjacent inductors are each connected to a grounding capacitor. The other end of the first inductor is connected to the output terminal of the power amplifier die, and the other end of the third inductor is connected to the second distributed parameter network. The second distributed parameter network includes multiple microstrip transmission lines connected in series.

[0012] In a preferred embodiment, the distributed parameter network is connected to the input DC blocking capacitor, and the other end of the input DC blocking capacitor is connected to the first pin group via bonding leads.

[0013] In a preferred embodiment, the distributed parameter network is connected to the output DC blocking capacitor, and the other end of the output DC blocking capacitor is connected to the first pin group via bonding leads.

[0014] In a preferred embodiment, the connection point between the first inductor and the second inductor is further connected to the first inductor, the resistor, and the second inductor connected in series. The second inductor is connected to the gate bias port of the second pin group, and a grounding capacitor is connected to the connection point between the resistor and the second inductor.

[0015] In the preferred embodiment, the connection point between the first inductor and the second inductor is also connected to a third inductor and a fourth inductor connected in series. The fourth inductor is connected to the drain bias port of the second pin group, and a grounding capacitor is connected to the connection point between the third inductor and the fourth inductor.

[0016] In a preferred embodiment, the substrate for fabricating the microstrip transmission line in the distributed parameter network is a 99.6% alumina ceramic plate or a semiconductor material used in integrated passive device processes.

[0017] Compared with existing solutions, the advantages of this utility model are: 1. Improved packaging versatility and cost-effectiveness: This utility model breaks through the technical barrier that internal matching functions must use expensive custom packaging, so that low-cost, standardized general-purpose packaging can be used for both external and internal matching devices, greatly improving the reusability and economy of packaging.

[0018] 2. Shortened R&D cycle: Since various mature general-purpose ceramic packaging shells on the market can be directly selected, there is no need for customized packaging design and mold opening, which greatly shortens the product development and launch cycle.

[0019] 3. Simplified application difficulty: The input / output impedance of the device can be directly matched to 50 ohms through internal matching, which improves the consistency of the product. Users do not need complicated external matching and debugging, thus lowering the application threshold. Attached Figure Description

[0020] The present invention will be further described below with reference to the accompanying drawings and embodiments: Figure 1 This is a schematic diagram of the overall structure of a power amplifier based on in-cell matching in a general-purpose package. Figure 2 This is a schematic diagram of the open-case structure of a power amplifier based on a universal packaged internal matching. Figure 3 This is a top view of the open-cover structure of a power amplifier based on a universal packaged in-cell matching. Figure 4 This is a circuit schematic of a power amplifier based on a universal packaged in-cell matching. Detailed Implementation

[0021] The above solution will be further described below with reference to specific embodiments. It should be understood that these embodiments are for illustrating the present invention and are not intended to limit the scope of the present invention. The implementation conditions used in the embodiments can be further adjusted according to the conditions of specific manufacturers, and the implementation conditions not specified are usually the conditions in conventional experiments.

[0022] Example

[0023] like Figure 1 As shown, a power amplifier based on in-package matching of a general-purpose package includes a package, a power amplifier die 6, and an internal matching circuit. The package includes a device package metal base 4, a device package frame 5, and a plurality of pins extending from the sidewall of the device package frame 5. The plurality of pins are divided into a first pin group 1 and a second pin group 2 with non-standard impedance characteristics. The first pin group 1 is an auxiliary pin of the package, and the second pin group 2 is an input and output pin of the package. The power amplifier die 6 is fixed to the device package metal base 4. The internal matching circuit includes an input matching circuit 7 and an output matching circuit 8. The internal matching circuit is fixed inside the package and is electrically interconnected with the input and output terminals of the power amplifier die 6 through bonding leads 9. The first pin group 1 is used as a radio frequency signal channel, and is connected to the radio frequency signal input terminal and the radio frequency signal output terminal of the internal matching circuit respectively; The second pin group 2 is used as a DC power supply channel and is connected to the gate bias port and drain bias port of the power amplifier die 6, respectively. The internal matching circuit is used to match the input and output impedance of the power amplifier die 6. The internal matching circuit is also used to compensate for the non-standard impedance characteristics of the first pin group 1, and to transform the non-standard impedance port of the first pin group 1 into a standard impedance RF port.

[0024] Specifically, such as Figure 2 , 3 As shown, the first pin group 1 is located at both ends of the package shell, and the second pin group 2 is located on both sides of the package shell. The pin area of ​​the second pin group 2 is larger than the pin area of ​​the first pin group 1.

[0025] The first pin group 1 (e.g., V-shaped pins) of a general-purpose package is conventionally used as an auxiliary pin to connect bypass capacitors to improve the linearity of the power amplifier. The second pin group 2 is the input / output pin in conventional operation, used for RF signal input and amplified signal output. Therefore, the pin area of ​​the second pin group 2 is larger than that of the first pin group 1. The second pin group 2 has a larger parasitic capacitance and is often used in externally matched or pre-matched devices, requiring an external matching circuit to raise the overall device impedance to the standard impedance.

[0026] It should be noted that all pins (1, 2) of this general-purpose package are non-standard impedance pins.

[0027] The core technical solution of this embodiment lies in the coordinated design of pin functions and internal circuits, thereby subverting the conventional usage of this general-purpose package.

[0028] 1. RF Signal Path and Impedance Compensation: The external RF signal is fed in through the first pin group 1. This solution innovatively transforms the first pin group 1, which is usually a V-shaped pin and only used as an auxiliary connection in the original package, into the main RF channel. To this end, the input matching circuit 7 and the output matching circuit 8 of the power amplifier's matching circuit are designed not only to match the input / output impedance of the power amplifier die 6, but also to compensate for and transform the non-standard impedance characteristics of the first pin group 1 itself, ultimately transforming the port impedance of the entire device to a standard 50-ohm impedance.

[0029] Specifically, to achieve the aforementioned impedance transformation and compensation functions, the input matching circuit 7 and output matching circuit 8 within the power amplifier's matching circuit are typically composed of a lumped parameter network or a distributed parameter network, or a combination of both, consisting of one or more passive components. The inductor can be formed by bonding leads (gold wires). The input matching circuit 7 and output matching circuit 8 are equipped with multiple metal pads 10 for electrical connections. The capacitors can be silicon-based MOS capacitors (moscap), GaAs MIM capacitors, or various other types such as multilayer ceramic chip capacitors (MLCC). The microstrip circuit portion of the distributed parameter network can be fabricated on a 99.6% alumina (Al2O3) ceramic substrate or on a GaAs substrate (semiconductor material) using integrated passive device (IPD) technology.

[0030] like Figure 4 The diagram shown is an exemplary, but not limiting, schematic representation of the internal matching circuit of this invention. The circuit comprises an input matching circuit, an output matching circuit, and a corresponding DC power supply network.

[0031] The input matching circuit of the internal matching circuit includes a cascaded first π-shaped lumped parameter network and a first distributed parameter network. The first π-shaped lumped parameter network includes three inductors connected in series (L1, L2, L3). The connection points of two adjacent inductors (L1 and L2, L2 and L3) are all connected to grounding capacitors (C1, C2). The other end of the first inductor L1 is connected to the input terminal of the power amplifier die 6, and the other end of the third inductor L3 is connected to the first distributed parameter network. The first distributed parameter network includes multiple microstrip transmission lines (TL1, TL2, TL3) connected in series.

[0032] The output matching circuit of the internal matching circuit includes a cascaded second π-shaped lumped parameter network and a second distributed parameter network. This hybrid network works together to boost the output impedance of the GaN power amplifier die 6 to the standard impedance over the required full frequency band.

[0033] Specifically, the second π-shaped lumped parameter network includes three inductors connected in series (L7, L8, L9). The connection points of two adjacent inductors (L7 and L8, L8 and L9) are all connected to grounding capacitors (C5, C6). The other end of the first inductor L7 is connected to the output terminal of the power amplifier die 6, and the other end of the third inductor L9 is connected to the second distributed parameter network. The second distributed parameter network includes multiple microstrip transmission lines (TL4, TL5, TL6) connected in series.

[0034] It should be noted that not all pins are shown in the power amplifier die 6; only the input and output terminals are shown here as an example for functional description.

[0035] In one embodiment, a distributed parameter network is connected to the input DC blocking capacitor C3, and the other end of the input DC blocking capacitor C3 is connected to the first pin group 1 via a bonding lead 9. L6 represents the inductance of the bonding lead (gold wire) connecting the input pin.

[0036] In one embodiment, a distributed parameter network is connected to the output DC blocking capacitor C7, and the other end of the output DC blocking capacitor C7 is connected to the first pin group 1 through a bonding lead 9. L10 is an inductor representing the bonding lead (gold wire) connecting the output pin.

[0037] In one embodiment, the connection point between the first inductor L1 and the second inductor L2 is also connected to a first inductor L4, a resistor R1, and a second inductor L5 connected in series. The second inductor L5 is connected to the gate bias port Vgs of the second pin group 2, and a grounding capacitor C4 is connected to the connection point between the resistor R1 and the second inductor L5. L4, R1, C4, and L5 together constitute the input gate feed network, which is used to provide a bias voltage Vgs to the gate of the amplifier die.

[0038] In one embodiment, the connection point of the first inductor L7 and the second inductor L8 is also connected to a third inductor L11 and a fourth inductor L12 connected in series. The fourth inductor L12 is connected to the gate bias port Vds of the second pin group 2. A grounding capacitor C8 is connected to the connection point of the third inductor L11 and the fourth inductor L12. L11, C8, and L12 together constitute the output drain feed network, which is used to provide a bias voltage Vds to the drain of the amplifier die.

[0039] It should be noted that equivalent functionality can also be achieved using L-shaped, T-shaped, or other more complex network topologies.

[0040] 2. DC Power Supply Path: Corresponding to the RF path described above, this solution redefines the RF I / O port (pin group 2) that was conventionally used in the original package but could not be used for internal matching due to impedance mismatch as a DC power supply channel. Figure 4 The power supply network shown provides bias voltages for the gate and drain of die 6.

[0041] Preferably, the material of the power amplifier die 6 is not limited to GaNHEMT, but can also be a die made of other semiconductor materials such as LDMOS and GaAs. It is fixed using gold-tin (AuSn) eutectic bonding. The internal matching circuits (7, 8) are fabricated on a 99.6% alumina ceramic substrate.

[0042] Part or all of the internal matching circuits (7, 8) can be implemented using integrated passive device (IPD) technology to reduce size.

[0043] The material for the encapsulation shell is not limited to ceramic; it can also be a plastic package shell.

[0044] The physical form of the first pin group 1 is not limited to V-shaped pins; the number and specific shape of its pins can be adjusted according to design requirements.

[0045] It should be understood that the specific embodiments described above are merely illustrative or explanatory of the principles of this utility model and do not constitute a limitation thereof. Therefore, any modifications, equivalent substitutions, improvements, etc., made without departing from the spirit and scope of this utility model should be included within its protection scope. Furthermore, the appended claims are intended to cover all variations and modifications falling within the scope and boundaries of the appended claims, or equivalent forms of such scope and boundaries.

Claims

1. A power amplifier based on in-cell matching in a universal package, comprising a package, a power amplifier die, and an in-cell matching circuit, characterized in that, The package includes a device package metal base, a device package frame, and a plurality of pins extending from the sidewall of the device package frame. The plurality of pins are divided into a first pin group and a second pin group with non-standard impedance characteristics. The first pin group is an auxiliary pin of the package, and the second pin group is an input and output pin of the package. The power amplifier die is fixed to the device package metal base. The internal matching circuit includes an input matching circuit and an output matching circuit. The internal matching circuit is fixed inside the package and is electrically interconnected with the input and output terminals of the power amplifier die through bonding leads. The first pin group serves as a radio frequency signal channel, and is respectively connected to the radio frequency signal input terminal and the radio frequency signal output terminal of the internal matching circuit; The second pin group serves as a DC power supply channel, and is connected to the gate bias port and drain bias port of the power amplifier die, respectively; The internal matching circuit is used to match the input and output impedance of the power amplifier die. The internal matching circuit is also used to compensate for the non-standard impedance characteristics of the first pin group and transform the non-standard impedance port of the first pin group into a standard impedance RF port.

2. The power amplifier based on in-cell matching in a universal package as described in claim 1, characterized in that, The first pin group is disposed at both ends of the package housing, and the second pin group is disposed on both sides of the package housing. The pin area of ​​the second pin group is larger than the pin area of ​​the first pin group.

3. The power amplifier based on in-cell matching in a universal package as described in claim 1, characterized in that, The internal matching circuit includes a lumped parameter network and / or a distributed parameter network composed of one or more passive components.

4. The power amplifier based on in-cell matching in a universal package as described in claim 3, characterized in that, The input matching circuit of the internal matching circuit includes a cascaded first π-shaped lumped parameter network and a first distributed parameter network. The first π-shaped lumped parameter network includes three inductors connected in series. The connection points of two adjacent inductors are connected to grounding capacitors. The other end of the first inductor is connected to the input terminal of the power amplifier die, and the other end of the third inductor is connected to the first distributed parameter network. The first distributed parameter network includes multiple microstrip transmission lines connected in series.

5. The power amplifier based on in-cell matching in a universal package as described in claim 3, characterized in that, The output matching circuit of the internal matching circuit includes a cascaded second π-shaped lumped parameter network and a second distributed parameter network. The second π-shaped lumped parameter network includes three inductors connected in series. The connection points of two adjacent inductors are connected to grounding capacitors. The other end of the first inductor is connected to the output terminal of the power amplifier die, and the other end of the third inductor is connected to the second distributed parameter network. The second distributed parameter network includes multiple microstrip transmission lines connected in series.

6. The power amplifier based on in-cell matching in a universal package as described in claim 4, characterized in that, The distributed parameter network is connected to the input DC blocking capacitor, and the other end of the input DC blocking capacitor is connected to the first pin group through bonding leads.

7. The power amplifier based on in-cell matching in a universal package as described in claim 5, characterized in that, The distributed parameter network is connected to the output DC blocking capacitor, and the other end of the output DC blocking capacitor is connected to the first pin group through bonding leads.

8. The power amplifier based on in-cell matching in a universal package as described in claim 4, characterized in that, The connection point between the first inductor and the second inductor is also connected to the first inductor, the resistor, and the second inductor in series. The second inductor is connected to the gate bias port of the second pin group, and the connection point between the resistor and the second inductor is connected to a grounding capacitor.

9. The power amplifier based on in-cell matching in a universal package as described in claim 5, characterized in that, The connection point between the first and second inductors is also connected to the third and fourth inductors, which are connected in series. The fourth inductor is connected to the drain bias port of the second pin group, and a grounding capacitor is connected to the connection point between the third and fourth inductors.

10. The power amplifier based on in-cell matching in a universal package according to claim 4 or 5, characterized in that, The substrate for fabricating the microstrip transmission lines in the distributed parameter network is a 99.6% alumina ceramic plate or a semiconductor material used in integrated passive device technology.

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