Display panel with reduced capacitive effects

Abstract

The utility model discloses an embodiment provides a kind of display panel of reducing capacitance effect, including substrate substrate layer, first metal layer, first insulating layer, second metal layer, second insulating layer and transparent conductive layer that are sequentially laminated;The second metal layer includes multiple mutually parallel metal lines, and the metal line of adjacent two The metal line is interconnected.This embodiment is by the metal wiring of second metal layer is interconnected to form mesh structure, reaches elimination capacitance effect, to reduce display anomaly.

Description

Technical Field

[0001] This utility model relates to the field of display technology, and in particular to a display panel that reduces capacitance effect. Background Technology

[0002] Display panels rely on TFTs (Thin-Film Transistors) to transmit signals and display images. The peripheral oblique wiring area serves as the signal channel between the external driving chip and the internal pixels. A second metal layer needs to be added on top of this as a pad. By controlling the thickness of the second metal layer, its height is matched with the upper inner film layer, balancing structural compatibility and circuit performance. However, when a short circuit occurs in the metal traces of the second metal layer, parasitic capacitance will form between the second metal layer, the lower first metal layer, and the first insulating layer. This capacitance effect will interfere with the accurate voltage signal transmitted by the first metal layer, causing abnormalities such as image ghosting, color distortion, and black screen. Utility Model Content

[0003] Therefore, in order to overcome at least some of the defects and deficiencies in the prior art, this utility model provides a display panel with reduced capacitance effect, which can reduce capacitance effect and reduce display abnormalities.

[0004] Specifically, the present invention provides a substrate layer, a first metal layer, a first insulating layer, a second metal layer, a second insulating layer, and a transparent conductive layer that are stacked sequentially; the second metal layer includes multiple parallel metal lines, and adjacent metal lines are interconnected.

[0005] In an embodiment of this utility model, the second metal layer includes metal connecting lines, which connect two adjacent metal lines, and there are multiple metal connecting lines between two adjacent metal lines, with the multiple metal connecting lines spaced apart.

[0006] In embodiments of this invention, the distance between any two adjacent metal connecting lines is equal.

[0007] In an embodiment of this utility model, the metal wire includes a first metal wire, a second metal wire, a third metal wire, a fourth metal wire, and a fifth metal wire that are sequentially adjacent to each other; the metal connecting wire includes a first segment, a second segment, a third segment, and a fourth segment; the first segment connects the first metal wire and the second metal wire, the second segment connects the second metal wire and the third metal wire, the third segment connects the third metal wire and the fourth metal wire, and the fourth segment connects the fourth metal wire and the fifth metal wire; wherein the first segment and the second segment are staggered, the second segment and the third segment are staggered, and the third segment and the fourth segment are staggered.

[0008] In an embodiment of this utility model, the first line segment and the third line segment are aligned in a direction perpendicular to the metal wire, and the second line segment and the fourth line segment are aligned in a direction perpendicular to the metal wire.

[0009] In an embodiment of this utility model, a plurality of first line segments divide the first metal wire and the second metal wire into several first conductive segments, and a plurality of second line segments divide the second metal wire and the third metal wire into several second conductive segments, wherein the number of first conductive segments is equal to the number of second conductive segments.

[0010] In an embodiment of this utility model, the width of the metal wire is equal to the width of the metal connecting wire.

[0011] In embodiments of this utility model, the distance between any two adjacent metal connecting lines is 100μm to 200μm.

[0012] In an embodiment of this invention, the distance between adjacent metal wires is 5.5 μm to 6.5 μm.

[0013] In an embodiment of this utility model, the width of the metal wire is 6.5μm to 7.5μm.

[0014] As can be seen from the above, the technical features of this utility model can have one or more of the following beneficial effects: By interconnecting the metal lines of the second metal layer to form a mesh structure, the entire mesh structure enhances the uniformity of the second metal layer, and the parasitic capacitance of each region of the second metal layer is infinitely close to that of the first metal layer, thereby eliminating the capacitance effect. Attached Figure Description

[0015] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 A schematic diagram of the structure of a display panel for reducing capacitance effect provided in an embodiment of this utility model; Figure 2 for Figure 1 Schematic diagram of the membrane structure in region B; Figure 3 for Figure 1 A schematic diagram showing the connection positions of the metal connecting wires and the metal wires in the middle section; Figure 4A schematic diagram of a conventional design provided for an embodiment of this utility model; Figure 5 for Figure 4 Schematic diagram of the membrane structure in region A; Figure 6 This is a schematic diagram of another embodiment of the second metal layer provided by this utility model. Figure 7 for Figure 6 Schematic diagram of the membrane structure in region D; Figure 8 for Figure 4 A schematic diagram of the membrane structure in region C.

[0017] [Explanation of Key Figure Markings] 1: Display panel with reduced capacitance effect; 10: First metal layer; 20: First insulating layer; 30: Second metal layer; 301: Metal connecting line; 3011: First line segment; 3012: Second line segment; 3013: Third line segment; 3014: Fourth line segment; 302: Metal line; 3021: First metal line; 3022: Second metal line; 3023: Third metal line; 3024: Fourth metal line; 3025: Fifth metal line; 303: Metal segment. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. Based on the embodiments described in this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.

[0019] In this embodiment of the invention, the use of terms such as "first" and "second" is for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features.

[0020] Reference Figure 1 , Figure 2 and Figure 3 As shown, in this embodiment of the present invention, a display panel 1 for reducing capacitance effect includes a substrate layer, a first metal layer 10, a first insulating layer 20, a second metal layer 30, a second insulating layer, and a transparent conductive layer stacked sequentially. The second metal layer 30 includes multiple parallel metal lines 302, with adjacent metal lines 302 interconnected.

[0021] For example, the substrate layer is plain glass; the first metal layer 10 is a Cu (copper) metal layer, used to form the gate of the TFT and serve as the scan line of the circuit; the first insulating layer 20 is an insulating SiNx (silicon nitride) layer, mainly to prevent short circuits caused by contact between metal layers, and to form ohmic contacts to drive the circuit; the second metal layer 30 is an Al (aluminum) metal layer, forming the source of the TFT and serving as the data line of the circuit; the second insulating layer is a SiNx (silicon nitride) insulating layer, mainly to prevent short circuits caused by contact between metals; the transparent conductive layer is a transparent conductive material, mainly used to form the drain, and can control the rotation of the liquid crystal after energization.

[0022] Reference Figure 4 and Figure 5 As shown, this structure is a current design of the second metal layer 30. Compared with the display panel 1 for reducing capacitance effect provided in this embodiment of the present invention, it can be seen that... (Refer to...) Figure 1 and Figure 2 As shown, by connecting the metal lines 302 of the second metal layer 30 to form a mesh structure, the entire mesh structure enhances the uniformity of the second metal layer 30, and the parasitic capacitance formed by each region of the second metal layer 30 and the first metal layer 10 is infinitely close, so as to eliminate the capacitance effect.

[0023] Reference Figure 1 and Figure 3 As shown, in an embodiment of this utility model, the second metal layer 30 includes metal connecting lines 301. The metal connecting lines 301 connect two adjacent metal lines 302, and multiple metal connecting lines 301 are spaced apart between two adjacent metal lines 302. The multiple metal connecting lines 301 connect the metal lines 302 into a mesh structure, ensuring that the second metal layer 30 maintains a uniform overall potential and avoiding potential differences.

[0024] In embodiments of this invention, the distance between any two adjacent metal connecting lines 301 is equal. The equal spacing between adjacent metal connecting lines 301 ensures that the mesh cells of the mesh structure are of uniform size, resulting in a uniform distribution of the electrical parameters of the second metal layer 30, thus guaranteeing consistent signal transmission efficiency and anti-interference capability across all regions.

[0025] Reference Figure 1 and Figure 3As shown, in an embodiment of this utility model, the metal wire 302 includes a first metal wire 3021, a second metal wire 3022, a third metal wire 3023, a fourth metal wire 3024, and a fifth metal wire 3025 that are sequentially adjacent to each other; the metal connecting wire 301 includes a first segment 3011, a second segment 3012, a third segment 3013, and a fourth segment 3014; the first segment 3011 connects the first metal wire 3021 and the second metal wire 3022, the second segment 3012 connects the second metal wire 3022 and the third metal wire 3023, the third segment 3013 connects the third metal wire 3023 and the fourth metal wire 3024, and the fourth segment 3014 connects the fourth metal wire 3024 and the fifth metal wire 3025. The first line segment 3011 and the second line segment 3012 are staggered, the second line segment 3012 and the third line segment 3013 are staggered, and the third line segment 3013 and the fourth line segment 3014 are staggered.

[0026] Specifically, the metal connecting lines 301 are staggered so that the connection points of adjacent metal connecting lines 301 along the direction perpendicular to the metal line 302 do not overlap, thereby avoiding the concentration of current in the same longitudinal position, reducing the risk of local resistance increase, and ensuring smooth signal transmission.

[0027] Reference Figure 1 and Figure 3 As shown in the embodiment of this utility model, the first line segment 3011 and the third line segment 3013 are aligned along a direction perpendicular to the metal line 302, and the second line segment 3012 and the fourth line segment 3014 are aligned along a direction perpendicular to the metal line 302. By adding regular alignment while maintaining the misalignment of the metal connecting lines 301, the current distribution path between the metal lines 302 is balanced, avoiding local current overload and enhancing the stability of electrical performance. At the same time, it simplifies the mask design and optimizes process feasibility.

[0028] In embodiments of this invention, multiple first line segments 3011 divide the first metal line 3021 and the second metal line 3022 into several first conductive segments, and multiple second line segments 3012 divide the second metal line 3022 and the third metal line 3023 into several second conductive segments. The number of first conductive segments is equal to the number of second conductive segments. Each metal line 302 is divided into the same number of conductive segments to ensure uniform resistance distribution and balanced current distribution, thereby avoiding delays and distortions caused by local differences in signal transmission and ensuring signal stability throughout the entire area.

[0029] In an embodiment of this utility model, the width of the metal wire 302 is equal to the width of the metal connecting wire 301. Since the metal wire 302 and the metal connecting wire 301 have the same width, there are no abrupt changes in width at the connection point. This prevents current congestion and impedance abrupt changes during current flow, avoiding signal attenuation caused by increased local resistance.

[0030] In embodiments of this invention, the distance between any two adjacent metal connection lines 301 is 100μm to 200μm. This range falls within the spacing range that can be stably achieved by conventional photolithography processes in the electronics manufacturing field, ensuring pattern accuracy without the need for special high-precision equipment. Exemplarily, provided the manufacturing process allows, the distance between two adjacent metal connection lines 301 can be shortened as much as possible. Shortening the spacing results in a denser distribution of the metal connection lines 301, richer conductive paths in the mesh structure, and more balanced current distribution among the metal lines 302, reducing signal attenuation caused by excessively long paths.

[0031] In embodiments of this invention, the distance between adjacent metal lines 302 is 5.5μm to 6.5μm. This spacing increases line density, supports high-resolution displays, and is compatible with conventional photolithography etching processes, ensuring high production yield.

[0032] In this embodiment of the invention, the width of the metal line 302 is 6.5μm to 7.5μm. This width provides a sufficient conductive cross-section, reduces resistance during current transmission, avoids localized heating and signal attenuation due to excessively narrow line width, and ensures stable transmission of electrical signals in the second metal layer 30. Simultaneously, it is compatible with conventional photolithography etching processes, allowing for precise forming and minimizing the risk of over-etching or residue issues.

[0033] Reference Figure 4 , Figure 6 , Figure 7 and Figure 8 As shown, in another embodiment, the metal line 302 of the second metal layer 30 is broken into several metal segments 303, and the several metal segments 303 are independent. The potential abnormality caused by the short circuit is confined to the metal segment 303. The parasitic capacitance formed by the metal segment 303 and the first metal layer 10 is extremely small and the interference intensity is weak. The first metal layer 10 can ignore its weak interference to reduce the capacitance effect.

[0034] Furthermore, it is understood that the foregoing embodiments are merely illustrative examples of this utility model. Provided that the technical features do not conflict, the structure is not contradictory, and the purpose of this utility model is not violated, the technical solutions of the various embodiments can be arbitrarily combined and used.

[0035] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model, and not to limit it. Although this utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this utility model.

Claims

1. A display panel (1) with reduced capacitance effect, characterized in that, It includes a substrate layer, a first metal layer (10), a first insulating layer (20), a second metal layer (30), a second insulating layer and a transparent conductive layer, which are stacked in sequence. The second metal layer (30) includes multiple parallel metal lines (302), and two adjacent metal lines (302) are interconnected; wherein, the second metal layer (30) includes metal connecting lines (301), the metal connecting lines (301) connect two adjacent metal lines (302), and there are multiple metal connecting lines (301) between two adjacent metal lines (302), and the multiple metal connecting lines (301) are spaced apart.

2. The display panel (1) for reducing capacitance effect according to claim 1, characterized in that, The distance between any two adjacent metal connecting lines (301) is equal.

3. The display panel (1) for reducing capacitance effect according to claim 1, characterized in that, The metal wire (302) includes a first metal wire (3021), a second metal wire (3022), a third metal wire (3023), a fourth metal wire (3024), and a fifth metal wire (3025) that are sequentially adjacent to each other; the metal connecting wire (301) includes a first segment (3011), a second segment (3012), a third segment (3013), and a fourth segment (3014); the first segment (3011) connects the first metal wire (3021) and the second metal wire (3022), the second segment (3012) connects the second metal wire (3022) and the third metal wire (3023), the third segment (3013) connects the third metal wire (3023) and the fourth metal wire (3024), and the fourth segment (3014) connects the fourth metal wire (3024) and the fifth metal wire (3025); The first line segment (3011) and the second line segment (3012) are staggered, the second line segment (3012) and the third line segment (3013) are staggered, and the third line segment (3013) and the fourth line segment (3014) are staggered.

4. The display panel (1) with reduced capacitance effect according to claim 3, characterized in that, The first line segment (3011) and the third line segment (3013) are aligned in a direction perpendicular to the metal line (302), and the second line segment (3012) and the fourth line segment (3014) are aligned in a direction perpendicular to the metal line (302).

5. The display panel (1) with reduced capacitance effect according to claim 3, characterized in that, Multiple first line segments (3011) divide the first metal wire (3021) and the second metal wire (3022) into several first conductive segments, and multiple second line segments (3012) divide the second metal wire (3022) and the third metal wire (3023) into several second conductive segments, wherein the number of first conductive segments is equal to the number of second conductive segments.

6. The display panel (1) for reducing capacitance effect according to claim 1, characterized in that, The width of the metal wire (302) is equal to the width of the metal connecting wire (301).

7. The display panel (1) with reduced capacitance effect according to claim 2, characterized in that, The distance between any two adjacent metal connecting lines (301) is 100μm to 200μm.

8. The display panel (1) for reducing capacitance effect according to claim 1, characterized in that, The distance between adjacent metal lines (302) is 5.5 μm to 6.5 μm.

9. The display panel (1) for reducing capacitance effect according to claim 6, characterized in that, The width of the metal wire (302) is 6.5μm~7.5μm.

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