Chip carrier with tamperproof shield
Patent Information
- Application Number
- CN202522169592.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-14
- Publication Date
- 2026-09-25
- Estimated Expiration
- 2035-10-14
AI Technical Summary
电磁干扰不仅影响芯片自身工作稳定性，还会对周围电子元件造成干扰，同时也容易受到外界电磁环境的影响
该具有防干扰屏蔽层的芯片载板，通过多层屏蔽设计实现强效防干扰，基材层上下的铜箔材质第一、二屏蔽层，搭配内壁第三屏蔽层，且三者均与导电通孔电连接，形成全方位屏蔽体系，可有效隔绝外部电磁干扰，保障芯片信号传输稳定，避免数据传输误差。基材采用铝基PCB材料，结合背面散热通孔与导热凸起，显著提升散热效率，防止芯片因高温受损，延长使用寿命。背面导电胶与导电柱优化导电性能，确保电路连接可靠；两侧吊耳与上表面安装板便于载板快速定位安装，提升装配效率；表面保护层则增强载板抗磨损、抗腐蚀能力，整体结构兼顾抗干扰、散热、易安装与耐用性，适配高精度芯片工作需求，提升设备运行稳定性。
Smart Images
Figure CN224805449U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of semiconductor packaging technology, specifically to a chip carrier board with an anti-interference shielding layer. Background Technology
[0002] As integrated circuits develop towards higher density, higher frequency, and miniaturization, the electromagnetic interference (EMI) problem generated during chip operation is becoming increasingly prominent. EMI not only affects the operational stability of the chip itself but also interferes with surrounding electronic components and is susceptible to the influence of the external electromagnetic environment.
[0003] Traditional chip carrier board structures with anti-interference shielding layers are relatively simple and have poor conductivity. Moreover, they usually use a single shielding layer structure, which often only covers a local area of the chip, resulting in poor shielding effect. Therefore, those skilled in the art have provided chip carrier boards with anti-interference shielding layers to solve the problems mentioned in the background art. Utility Model Content
[0004] The purpose of this invention is to provide a chip carrier board with an anti-interference shielding layer to solve the problems mentioned in the background art.
[0005] To achieve the above objectives, this utility model provides the following technical solution: A chip carrier board with an anti-interference shielding layer includes a chip carrier board body. Two sets of conductive through holes are opened on the front side of the chip carrier board body. A substrate layer is fixedly installed on the inner wall of the chip carrier board body. A first shielding layer is fixedly installed on the upper surface of the substrate layer. A second shielding layer is fixedly installed on the bottom surface of the substrate layer. A third shielding layer is fixedly installed on the inner wall of the chip carrier board body.
[0006] As a further improvement of this utility model: two lifting lugs are fixedly connected to the left side and the right side of the chip carrier board body, and a round hole is opened on the front of both sets of lifting lugs.
[0007] As a further improvement of this utility model: two sets of conductive adhesive are connected to the back of the chip carrier body, and conductive posts are connected to the back of both sets of conductive adhesive.
[0008] As a further improvement of this utility model: the upper surface of the first shielding layer is provided with an insulating layer, and the back of the chip carrier board body is provided with heat dissipation through holes arranged at equal intervals.
[0009] As a further improvement of this utility model: both the first shielding layer and the second shielding layer are made of copper foil material, and the back of the chip carrier board body is fixedly connected with thermally conductive protrusions arranged at equal intervals.
[0010] As a further improvement of this utility model: two mounting plates are fixedly installed on the upper surface of the chip carrier board body, and the substrate layer is made of aluminum-based PCB material.
[0011] As a further improvement of this utility model: a protective layer is fixedly installed on the upper surface of the chip carrier board body, and a circuit layer is fixedly installed on the inner wall of the chip carrier board body.
[0012] As a further improvement of this utility model: a protective layer is fixedly installed on the upper surface of the chip carrier board body, and a circuit layer is fixedly installed on the inner wall of the chip carrier board body.
[0013] Compared with the prior art, the beneficial effects of this utility model are: This chip carrier board with an anti-interference shielding layer achieves strong anti-interference through a multi-layer shielding design. The first and second shielding layers, made of copper foil on the top and bottom of the substrate layer, combined with the third shielding layer on the inner wall, are all electrically connected to conductive vias, forming a comprehensive shielding system. This effectively isolates external electromagnetic interference, ensuring stable chip signal transmission and avoiding data transmission errors. The substrate uses aluminum-based PCB material, combined with heat dissipation vias and thermal protrusions on the back, significantly improving heat dissipation efficiency, preventing chip damage due to high temperatures, and extending service life. Conductive adhesive and conductive pillars on the back optimize conductivity, ensuring reliable circuit connections. Side lugs and a top mounting plate facilitate quick positioning and installation of the carrier board, improving assembly efficiency. The surface protective layer enhances the carrier board's wear and corrosion resistance. The overall structure balances anti-interference, heat dissipation, ease of installation, and durability, adapting to the working requirements of high-precision chips and improving equipment operational stability. Attached Figure Description
[0014] Figure 1 A three-dimensional structural diagram of a chip carrier board with an anti-interference shielding layer; Figure 2 Rear view of a chip carrier board with an anti-interference shielding layer; Figure 3 A side cross-sectional view of a chip carrier board with an anti-interference shielding layer; Figure 4 A side view of a chip carrier board with an anti-interference shielding layer; Figure 5 For chip carriers with anti-interference shielding layers Figure 3 A magnified schematic diagram of the local structure at point A.
[0015] In the diagram: 1. Chip carrier board body; 2. Conductive via; 3. Substrate layer; 4. Second shielding layer; 5. First shielding layer; 6. Third shielding layer; 7. Conductive adhesive; 8. Conductive pillar; 9. Lifting lug; 10. Round hole; 11. Heat dissipation via; 12. Thermally conductive protrusion; 13. Mounting plate; 14. Protective layer; 15. Conductive silver paste layer. Detailed Implementation
[0016] Please see Figures 1-5 In this embodiment of the invention, the chip carrier board with an anti-interference shielding layer includes a chip carrier board body 1. Two sets of conductive vias 2 are formed on the front side of the chip carrier board body 1. A substrate layer 3 is fixedly installed on the inner wall of the chip carrier board body 1. A first shielding layer 5 is fixedly installed on the upper surface of the substrate layer 3, a second shielding layer 4 is fixedly installed on the bottom surface of the substrate layer 3, and a third shielding layer 6 is fixedly installed on the inner wall of the chip carrier board body 1. Because the conductive vias 2 are electrically connected to the first, second, and third shielding layers, they can efficiently discharge residual electromagnetic interference that is not completely isolated by the three shielding layers, preventing interference signals from accumulating inside the carrier board, further improving the anti-interference effect, and ensuring the stability of internal circuit signal transmission. The second shielding layer 4 is made of copper foil and is attached to the bottom surface of the substrate layer 3. It can effectively block external electromagnetic interference from below the carrier board, forming a synergistic protection with the first and third shielding layers, filling the gap in anti-interference below, perfecting the all-round shielding system, and reducing the impact of interference on chip signals.
[0017] Two lifting lugs 9 are fixedly connected to both the left and right sides of the chip carrier board body 1. Each set of lifting lugs 9 has a circular hole 10 on its front side. Two sets of conductive adhesive 7 are connected to the back of the chip carrier board body 1, and conductive posts 8 are connected to the back of each set of conductive adhesive 7. An insulating layer is provided on the upper surface of the first shielding layer 5. The back of the chip carrier board body 1 has equidistantly arranged heat dissipation holes 11. The conductive adhesive 7 is attached to the back of the chip carrier board body 1, allowing for close contact between the chip and the conductive posts 8, reducing contact resistance, improving the transmission efficiency of electrical signals and current, preventing signal attenuation or power failure due to poor contact, and ensuring the continuity of power and signal transmission. The heat dissipation holes 11, arranged equidistantly on the back of the chip carrier board body 1, form air circulation channels, allowing heat generated inside the carrier board to be directly dissipated into the outside air through the holes, accelerating heat dissipation and relieving internal temperature pressure.
[0018] The first shielding layer 5 and the second shielding layer 4 are both made of copper foil. Equally spaced thermally conductive protrusions 12 are fixedly connected to the back of the chip carrier board body 1. Two mounting plates 13 are fixedly installed on the upper surface of the chip carrier board body 1. The substrate layer 3 is made of aluminum-based PCB material. A protective layer 14 is fixedly installed on the upper surface of the chip carrier board body 1. A circuit layer is fixedly installed on the inner wall of the chip carrier board body 1. A conductive silver paste layer 15 is fixedly installed on the back of the chip carrier board body 1. The first shielding layer 5, the second shielding layer 4, and the third shielding layer 6 are all electrically connected to the conductive vias 2. The thermally conductive protrusions 12 are fixed to the back of the chip carrier board body 1, which expands the contact area between the carrier board and the air, increases the heat dissipation surface area, and allows heat to be transferred to the air more quickly. Combined with the heat dissipation vias 11, this forms a dual heat dissipation structure, further improving heat dissipation efficiency and protecting the chip from high-temperature damage. The mounting plates 13 are installed on the upper surface of the chip carrier board body 1 and can serve as a precise docking reference between the carrier board and other equipment components. This helps staff quickly calibrate the carrier board's installation position, reduces installation errors, ensures the carrier board works collaboratively with surrounding components, and improves the overall equipment assembly accuracy. The protective layer 14 covers the upper surface of the chip carrier board body 1, which can isolate external dust, moisture, oil and other impurities, while resisting minor wear and scratches during daily use, preventing the core circuits and components of the carrier board from being corroded by the outside world, and extending the service life of the carrier board.
[0019] The working principle of this invention is as follows: The chip carrier board body 1 serves as the core framework, providing a foundation for the installation and support of all components. Its internal substrate layer 3 uses aluminum-based PCB material, which not only provides structural stability but also possesses excellent thermal conductivity. When external electromagnetic interference exists, the first shielding layer 5 on the upper surface of the substrate layer 3, the second shielding layer 4 on the bottom surface, and the third shielding layer 6 on the inner wall of the chip carrier board body 1 form an all-around protective barrier, blocking most interference signals. Residual interference that is not completely isolated is discharged through conductive vias 2, which are electrically connected to all three shielding layers, preventing interference with the normal operation of internal circuitry. Electrical signals and currents generated during chip operation are transmitted to conductive posts 8 via the conductive adhesive 7 on the back of the chip carrier board body 1. The conductive posts 8 then connect to external circuitry, achieving stable signal and power transmission. The conductive silver paste layer 15 on the back further reduces contact resistance and enhances conductivity reliability. Meanwhile, the heat generated by the chip is conducted to the back of the chip carrier board 1 through the substrate layer 3. Part of the heat is dissipated directly into the air through the heat dissipation holes 11, while the other part is expanded through the heat-conducting protrusions 12 to increase the heat dissipation area, accelerate heat dissipation, and prevent high temperature from affecting chip performance. During the installation phase, the staff can use the lifting lugs 9 on the left and right sides of the chip carrier board 1 to initially fix it with fasteners through the round holes 10, and then use the mounting plate 13 on the upper surface to complete the precise positioning, improving assembly efficiency. The protective layer 14 on the upper surface of the chip carrier board 1 can isolate external wear, dust, and corrosive substances, ensuring the long-term stable operation of the carrier board.
[0020] The above description is merely a preferred embodiment of this utility model, but the scope of protection of this utility model is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the technical scope disclosed in this utility model, based on the technical solution and inventive concept of this utility model, should be included within the scope of protection of this utility model. It is obvious to those skilled in the art that this utility model is not limited to the details of the above exemplary embodiments, and that it can be implemented in other specific forms without departing from the spirit or basic characteristics of this utility model. Therefore, the embodiments should be considered exemplary and non-limiting in all respects. The scope of this utility model is defined by the appended claims rather than the foregoing description, and therefore all variations falling within the meaning and scope of equivalent elements of the claims are intended to be included within this utility model. No reference numerals in the claims should be construed as limiting the scope of the claims.
Claims
1. A chip carrier board with an anti-interference shielding layer, characterized in that, The chip carrier board body (1) has two sets of conductive through holes (2) on its front side, a substrate layer (3) is fixedly installed on the inner wall of the chip carrier board body (1), a first shielding layer (5) is fixedly installed on the upper surface of the substrate layer (3), a second shielding layer (4) is fixedly installed on the bottom surface of the substrate layer (3), and a third shielding layer (6) is fixedly installed on the inner wall of the chip carrier board body (1).
2. The chip carrier board with an anti-interference shielding layer according to claim 1, characterized in that, Two lifting lugs (9) are fixedly connected to the left side and the right side of the chip carrier body (1), and round holes (10) are opened on the front of both sets of lifting lugs (9).
3. The chip carrier board with an anti-interference shielding layer according to claim 1, characterized in that, The back of the chip carrier board body (1) is connected to two sets of conductive adhesive (7), and the back of each set of conductive adhesive (7) is connected to a conductive post (8).
4. The chip carrier board with an anti-interference shielding layer according to claim 1, characterized in that, An insulating layer is provided on the upper surface of the first shielding layer (5), and heat dissipation through holes (11) are arranged at equal intervals on the back side of the chip carrier body (1).
5. The chip carrier board with an anti-interference shielding layer according to claim 1, characterized in that, The first shielding layer (5) and the second shielding layer (4) are both made of copper foil material, and the back of the chip carrier body (1) is fixedly connected with thermally conductive protrusions (12) arranged at equal intervals.
6. The chip carrier board with an anti-interference shielding layer according to claim 1, characterized in that, Two mounting plates (13) are fixedly installed on the upper surface of the chip carrier board body (1), and the substrate layer (3) is made of aluminum-based PCB material.
7. The chip carrier board with an anti-interference shielding layer according to claim 1, characterized in that, A protective layer (14) is fixedly installed on the upper surface of the chip carrier body (1), and a circuit layer is fixedly installed on the inner wall of the chip carrier body (1).
8. The chip carrier board with an anti-interference shielding layer according to claim 1, characterized in that, A conductive silver paste layer (15) is fixedly installed on the back of the chip carrier board body (1), and the first shielding layer (5), the second shielding layer (4) and the third shielding layer (6) are all electrically connected to the conductive through hole (2).