Electronic paper screen module

Abstract

The utility model discloses a kind of electronic paper screen module, belong to display technical field.Electronic paper screen module includes: substrate;Array layer, set to one side of substrate, including display area and non-display area;Non-display area is provided with mutually non-overlapping light-transmitting region and circuit layout area, and gate drive circuit is set in circuit layout area;Light shielding layer, set to one side of gate drive circuit away from substrate, cover circuit layout area;Electronic paper diaphragm, set to one side of array layer away from substrate, cover display area;Protective film, set to one side of electronic paper diaphragm away from substrate, cover electronic paper diaphragm, light-transmitting region and circuit layout area;Circuit board, at least part is set to one side of substrate away from array layer;Indicator light, set on circuit board, located one side of substrate away from array layer, corresponding light-transmitting region is set.The utility model is favorable to realize the narrow frame and low cost of electronic paper screen module.

Description

Technical Field

[0001] This utility model relates to the field of display technology, and in particular to an electronic paper screen module. Background Technology

[0002] Electronic paper screens are displays made using electrophoretic display technology. They achieve image display by applying driving voltages to each pixel through control circuitry on a TFT (Thin Film Transistor) substrate. Due to their numerous advantages, including low power consumption, wide viewing angles, high contrast, and eye-friendliness, electronic paper screens are increasingly widely used in many fields such as electronic price tags, e-books, flashcards, and shelf labels.

[0003] Electronic paper screens use driver chips to drive and control the TFT substrate. Depending on the driving method, electronic paper screens can be divided into two types: AIO (All-in-One) and GIP (Gate in Panel). In the AIO type, the gate drive and source drive are located on the same driver chip; in the GIP type, the gate drive circuit (also called the GIP circuit) used to implement the gate drive is integrated on the TFT substrate, using a GIP type driver chip and a GIP type TFT substrate. Because the gate drive circuit is integrated on the GIP type TFT substrate, the driver chip only needs to provide dozens of GIP signals to the gate drive circuit, instead of providing gate signals to hundreds or thousands of gate lines. Therefore, compared with the AIO type, the GIP type driver chip is smaller and cheaper, enabling lower-cost driving. As a result, GIP type electronic paper screens are gradually gaining attention.

[0004] To achieve functions such as status display and location reminders, related technologies often incorporate indicator lights on the circuit board of the electronic paper screen module for flashing alerts. However, the TFTs in the gate drive circuit are highly sensitive to external light. Therefore, related technologies typically use black sealing adhesive to shield the gate drive circuit from light, resulting in GIP-type electronic paper screen modules being completely opaque within the TFT substrate area. Consequently, to allow efficient light transmission, the indicator lights must be placed outside the TFT substrate area, leading to a larger circuit board size. This not only increases the bezel size of the electronic paper screen module but also raises the cost of the circuit board.

[0005] Therefore, for GIP-type electronic paper screen modules, how to achieve narrow bezels and low cost while meeting the light-shielding requirements of the gate drive circuit has become an urgent problem to be solved. Utility Model Content

[0006] This invention provides an electronic paper screen module that, while meeting the light-shielding requirements of the gate drive circuit, allows the indicator lights to be placed within the array layer, which is beneficial for achieving a narrow bezel and low cost for the electronic paper screen module.

[0007] This utility model embodiment provides an electronic paper screen module, including:

[0008] substrate;

[0009] An array layer is disposed on one side of the substrate; the array layer includes a display area and a non-display area surrounding the display area; wherein, a pixel array is disposed in the display area; the non-display area is provided with non-overlapping light-transmitting areas and circuit layout areas, and a gate driving circuit for driving the pixel array is disposed in the circuit layout area.

[0010] A light-shielding layer is disposed on the side of the gate driving circuit away from the substrate, covering the circuit layout area;

[0011] An electronic paper film is disposed on the side of the array layer away from the substrate, covering the display area;

[0012] A protective film is disposed on the side of the electronic paper film away from the substrate, and covers the electronic paper film, the light-transmitting area and the circuit layout area;

[0013] A circuit board; the circuit board is at least partially disposed on the side of the substrate away from the array layer;

[0014] An indicator light is disposed on the circuit board, located on the side of the substrate away from the array layer, and corresponding to the light-transmitting area. The light emitted by the indicator light passes through the substrate, the light-transmitting area, and the protective film and exits the electronic paper screen module.

[0015] Optionally, the electronic paper screen module further includes: an edge sealing structure disposed around the electronic paper film and filling the gap between the protective film and the array layer;

[0016] The edge sealing structure includes a first sub-edge sealing structure and a second sub-edge sealing structure; the first sub-edge sealing structure covers the circuit layout area, the first sub-edge sealing structure is an opaque structure, and the first sub-edge sealing structure serves as the light-shielding layer; the second sub-edge sealing structure covers the light-transmitting area, and the second sub-edge sealing structure is a transparent structure or a semi-transparent structure.

[0017] Optionally, the gate driving circuit includes a plurality of transistors; the array layer includes: a first metal layer, a first insulating layer, an active layer and a second metal layer arranged sequentially in a direction away from the substrate; wherein, the gate of each transistor is formed in the first metal layer, the channel region, source region and drain region of each transistor are formed in the active layer, and the source and drain of each transistor are formed in the second metal layer.

[0018] The light-shielding layer is located in the array layer and is disposed on the side of the second metal layer away from the substrate.

[0019] Optionally, the light-shielding layer is a black matrix layer;

[0020] or,

[0021] The light-shielding layer is a third metal layer, and the array layer further includes a second insulating layer disposed between the second metal layer and the third metal layer.

[0022] Optionally, the light-shielding layer is attached to the side of the protective film closest to the substrate;

[0023] Alternatively, the light-shielding layer may be attached to the side of the protective film away from the substrate;

[0024] Alternatively, the light-shielding layer may be embedded inside the protective film.

[0025] Optionally, the electronic paper screen module further includes: an edge sealing structure disposed around the electronic paper film and filling the gap between the protective film and the array layer; wherein the edge sealing structure is a transparent structure.

[0026] Optionally, the circuit board includes a PCB board, and the electronic paper screen module further includes a first flexible circuit board;

[0027] The PCB board is connected to the array layer via the first flexible circuit board; the first flexible circuit board is bent so that the PCB board is located on the side of the substrate away from the array layer; the indicator light is disposed on the PCB board;

[0028] or,

[0029] The circuit board includes: a second flexible circuit board; the second flexible circuit board includes a bent portion and a straight portion connected to each other; one end of the bent portion away from the straight portion is connected to the array layer, the bent portion is bent such that the straight portion is located on the side of the substrate away from the array layer; the indicator light is disposed on the straight portion.

[0030] Optionally, the circuit board has a receiving hole at a position corresponding to the light-transmitting area, and the indicator light is disposed in the receiving hole.

[0031] Optionally, the non-display area includes a first non-display sub-area and a second non-display sub-area disposed opposite to each other along a first direction, and a third non-display sub-area and a fourth non-display sub-area disposed opposite to each other along a second direction, wherein the first direction is perpendicular to the second direction;

[0032] The array layer further includes multiple gate lines extending along the first direction and arranged along the second direction; the circuit layout area is disposed in the first non-display sub-region and / or the second non-display sub-region; the gate driving circuit is connected to the pixel array through each of the gate lines;

[0033] The light-transmitting area is located in the third or fourth non-display sub-area.

[0034] Optionally, the array layer further includes multiple source lines extending along the second direction and arranged along the first direction; the electronic paper screen module further includes a driver chip connected to the pixel array through each of the source lines;

[0035] The driving chip is connected to the array layer in the third non-display sub-region; the light-transmitting area is disposed in the third non-display sub-region.

[0036] The technical solution of this utility model embodiment involves setting a light-transmitting area at any position within the range of the protective film's edge, the electronic paper film's edge, and the gate driving circuit's edge (or circuit layout area) in the array layer. A light-shielding layer is only set for the circuit layout area, and the indicator lights are positioned corresponding to the light-transmitting area. Since the light-shielding layer does not obstruct the light-transmitting area, the indicator lights can be reliably positioned within the array layer by utilizing the transparent protective film and the light-transmitting area. Furthermore, the light-transmitting area in this utility model embodiment effectively utilizes the remaining area within the protective film's range where no display area or gate driving circuit is located. It does not require increasing the size of the protective film, nor the size of the non-display area, nor any adjustment to the structure of the electronic paper film and protective film. Therefore, through the coordinated design of the light-shielding layer and the light-transmitting area, this embodiment can place the indicator lights within the array layer while ensuring the light-shielding effect on the gate driving circuit and preventing it from being affected by external light. This allows the circuit board size to remain within the array layer's range, providing favorable conditions for reducing the circuit board size and facilitating the achievement of narrow bezels and low cost for the electronic paper screen module.

[0037] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this utility model, nor is it intended to limit the scope of this utility model. Other features of this utility model will become readily apparent from the following description. Attached Figure Description

[0038] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0039] Figure 1 This is a planar schematic diagram of a TFT substrate in related technologies;

[0040] Figure 2 This is a front view of an electronic paper screen module in related technologies;

[0041] Figure 3 This is a schematic diagram of the back of an electronic paper screen module in related technologies;

[0042] Figure 4 It is along Figure 2 A schematic diagram of the cross-section of line A-A';

[0043] Figure 5 It is along Figure 2 A schematic diagram of the cross-section between B and B';

[0044] Figure 6 This is a front view of an electronic paper screen module provided in an embodiment of the present invention;

[0045] Figure 7 This is a schematic diagram of the back of an electronic paper screen module provided in an embodiment of this utility model;

[0046] Figure 8 It is along Figure 6 A schematic diagram of the cross-section between C and C';

[0047] Figure 9 It is along Figure 6 A schematic diagram of the cross-section of line D-D';

[0048] Figure 10 This is a cross-sectional schematic diagram of an electronic paper screen module provided in an embodiment of the present invention;

[0049] Figure 11 This is a planar schematic diagram of an electronic paper screen module provided in an embodiment of this utility model;

[0050] Figure 12 This is a schematic diagram of a sealing area provided in an embodiment of the present utility model;

[0051] Figure 13 This is a schematic diagram of an edge-sealing structure provided in an embodiment of this utility model;

[0052] Figure 14 This is a planar schematic diagram of an array layer provided in an embodiment of the present invention;

[0053] Figure 15 This is a cross-sectional schematic diagram of a TFT substrate provided in an embodiment of the present invention;

[0054] Figure 16 This is a cross-sectional schematic diagram of another TFT substrate provided in an embodiment of the present invention;

[0055] Figure 17 This is a cross-sectional schematic diagram of another TFT substrate provided in this embodiment of the present invention;

[0056] Figure 18 This is a cross-sectional schematic diagram of another TFT substrate provided in this embodiment of the present invention;

[0057] Figure 19 This is a front view of another electronic paper screen module provided in this embodiment of the present invention;

[0058] Figure 20 This is a schematic diagram of the back of another electronic paper screen module provided in this embodiment of the present invention;

[0059] Figure 21 It is along Figure 19 A schematic diagram of the cross-section between E and E';

[0060] Figure 22 It is along Figure 19 A schematic diagram of the cross-section between F and F';

[0061] Figure 23 This is a schematic diagram showing the placement of a light-shielding layer according to an embodiment of the present invention;

[0062] Figure 24 This is a front view of another electronic paper screen module provided in this utility model embodiment;

[0063] Figure 25 This is a schematic diagram of the back of another electronic paper screen module provided in this embodiment of the present invention;

[0064] Figure 26 It is along Figure 24 A schematic diagram of the cross-section of G-G';

[0065] Figure 27 It is along Figure 24 A schematic diagram of the cross-section between H and H'. Detailed Implementation

[0066] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of the present invention.

[0067] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this utility model are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the utility model described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion.

[0068] To facilitate explanation, the basic structure of GIP-type electronic paper screen modules in related technologies and the causes of the technical problems mentioned in the background technology will be explained first, and then the solutions of this utility model embodiment to solve the technical problems will be explained in detail.

[0069] Figure 1 This is a planar schematic diagram of a TFT substrate in related technologies. For ease of explanation, Figure 1 This only lists the parts related to the pixel's gate and source drivers. See also Figure 1The TFT substrate 100 includes a display area AA and a non-display area NAA surrounding the display area AA. The display area AA contains a pixel array (not shown in the figure) consisting of N rows × M columns of pixels, where N and M are both positive integers, and is driven by multiple gate lines LG (also called gate traces) and multiple source lines LS (also called source traces). The source lines LS are connected to the source output pad of the driver chip 20 through the fan-out line LF (also called fan-out trace) below the display area AA, thereby realizing the driving and control of the source lines LS. Gate driving circuits 10 (also called GIP circuits) can be provided on both the left and right sides of the display area AA. The output terminals of the gate driving circuits 10 are connected to each gate line LG in sequence, thereby realizing the driving and control of the gate lines LG; and the gate driving circuits 10 are connected to the GIP output pad of the driver chip 20 through the GIP trace LT, thereby realizing the driving and control of the gate driving circuits 10 by the driver chip 20. For example, the TFT substrate 100 has a first pad 11 for soldering the driver chip 10 and a second pad 12 for soldering the circuit board below the display area AA. The driver chip 10 is soldered to the TFT substrate 100 through the first pad 11. The above describes the basic structure of the TFT substrate 100 in a GIP-type electronic paper screen module in related technologies. The basic structure and driving principle of the TFT substrate 100 in the electronic paper screen module provided in this embodiment are also as described above, and will not be repeated hereafter.

[0070] In related technologies, the gate drive circuit 10 is covered by a transparent insulating dielectric layer, without any other light-shielding layer for light protection. Specifically, Figure 2 This is a front view of an electronic paper screen module in related technologies; Figure 3 This is a schematic diagram of the back of an electronic paper screen module in related technologies; Figure 4 It is along Figure 2 A schematic diagram of the cross-section of line A-A'; Figure 5 It is along Figure 2 A schematic diagram of the cross-section between B and B'; Figure 2 For ease of demonstration, the various film layers above the TFT substrate 100 have been made transparent. See [link / reference] Figures 2-5 The electronic paper screen module includes a TFT substrate 100, an electronic paper film FPL (or front plane laminate) and a protective film PS (protection sheet) stacked together, and the circuit board may include an FPC board 301 and a PCB board 302.

[0071] Specifically, in the TFT substrate 100, a pixel array and gate driving circuit 10 are formed on a glass or PI (polyimide) substrate through processes such as coating, exposure, development, and etching. The display area AA is disposed on the TFT substrate 100 and consists of N rows × M columns of pixels. A border area may also be disposed on the TFT substrate 100, specifically a ring-shaped area of ​​a certain width outside the display area AA, used to distinguish the display area AA from the non-display area NAA. The width of the border area is, for example, a few tenths of a millimeter. The gate driving circuit 10 is disposed on the TFT substrate 100, located in the non-display area NAA, typically on at least one of the left and right sides of the display area AA. Specifically, it is located on the left and right sides of the display area AA, outside the edge of the electronic paper film FPL, and inside the edge of the TFT substrate 100, used to drive and control the gate lines LG of the display area AA.

[0072] The electronic paper film (FPL) is used to display the image actually seen by the human eye. The FPL is bonded above the TFT substrate 100. The FPL may include an electronic ink layer and a common electrode layer sequentially spaced away from the TFT substrate 100. Each pixel in the TFT substrate 100 includes a pixel electrode. An electric field is formed between the pixel electrode and the common electrode to drive the electronic ink layer to display the image. To achieve good reflectivity, black particles, white particles, and other colored particles are densely distributed in the electronic ink layer, which makes the FPL opaque.

[0073] The electronic paper screen module may also include at least one electrical connection point 60, such as an Ag adhesive dot. The electrical connection point 60 is located between the TFT substrate 100 and the electronic paper film FPL, connecting the VCOM electrode on the TFT substrate 100 and the common electrode (also called the VCOM ITO electrode) on the electronic paper film FPL. The VCOM electrode is a power supply electrode located on the TFT substrate 100 in the non-display area NAA. The common electrode can be connected to the VCOM electrode via the electrical connection point 60, and thus connected to the driver chip 20. The Ag adhesive is primarily composed of conductive silver paste, exhibiting a silvery-white metallic luster and being opaque.

[0074] The protective film PS is bonded above the electronic paper film FPL. It is larger than the electronic paper film FPL and its edges wrap around the FPL, serving to protect the FPL and isolate it from moisture. The protective film PS can be composed of various colorless and transparent functional films with good light transmittance.

[0075] The electronic paper screen module also includes an edge sealing structure 51, which is coated around the edges of the protective film PS to fill the gap between the protective film PS and the TFT substrate 100, further isolating moisture. In order to achieve light shielding for the gate driving circuit 10 on the TFT substrate 100, the edge sealing structure 51 in the GIP-type electronic paper screen module of the related technology is a black edge sealing adhesive, and therefore is opaque.

[0076] Regarding the circuit board portion, FPC board 301 can be... Figure 1 The second pad 12 shown is soldered to the TFT substrate 100 and electrically connected to the driver chip 20. The PCB board 302 is connected to the driver chip 20 through the FPC board 301. The PCB board is a printed circuit board and also serves as the external control circuit for the electronic paper screen, providing power, control timing, and data signals to the electronic paper screen.

[0077] The driver chip 20 receives signals transmitted from the external control circuit through the FPC board 301 and converts the signals into voltage and timing to drive the electronic paper screen refresh. The driver chip 20 is fabricated on a silicon wafer and is therefore opaque.

[0078] The FPC board 301 is a flexible circuit board used to connect the PCB board 302 and the electronic paper screen to enable signal transmission between the external control circuit and the electronic paper screen. The portion of the FPC board 301 soldered onto the TFT substrate 100 has dense metal traces, and the FPC board 301 is covered with white silicone as a protective adhesive 52, thus making it opaque. Specifically, the protective adhesive 52 is located in the lower border area of ​​the TFT substrate 100 to protect the traces on the TFT substrate 100, the driver chip 20, and the FPC board 301.

[0079] The indicator light 40 can be an LED, i.e., a light-emitting diode, and is set on the PCB board 302 to realize functions such as screen status display and position reminder. Since the area corresponding to the TFT substrate 100 in the existing electronic paper screen module is opaque, in related technologies, the indicator light 40 needs to be set outside the area of ​​the TFT substrate 100.

[0080] like Figure 5 As shown in the cross-sectional view along B-B', the gate driving circuit 10 is disposed on the left and right sides of the TFT substrate 100, outside the edge of the electronic paper film FPL, and inside the edge of the protective film PS. A sealing structure 51 made of black sealing adhesive is disposed above the gate driving circuit 10, which serves to shield the gate driving circuit 10 from light. Figure 4As shown in the cross-sectional view along A-A', since the electronic paper film FPL, electrical connection point 60, sealing structure 51, protective adhesive 52, etc., are all opaque within the TFT substrate 100, the indicator light 40 needs to be placed outside the TFT substrate 100. This requires the vertical dimension of the PCB board 302 to exceed the TFT substrate 100. Figure 4 The hollow arrow indicates the light emission direction of indicator light 40, which is not obstructed by TFT substrate 100.

[0081] In summary, the GIP-type electronic paper screen module in the related technology places the indicator light 40 on the PCB board 302 to achieve the flashing reminder function. However, in order to shield the gate driving circuit 10 on the TFT substrate 100 from light, black edge sealing adhesive is required, resulting in the GIP-type electronic paper screen module being opaque within the TFT substrate 100. Therefore, in order to allow light to pass through efficiently, the indicator light 40 needs to be placed outside the TFT substrate 100, resulting in a larger PCB board 302. This not only increases the bezel size of the electronic paper screen module but also increases the cost of the PCB board 302.

[0082] To address the aforementioned technical problems, this utility model provides an electronic paper screen module that allows indicator lights to be placed within the range of the TFT substrate, thereby reducing the size of the circuit board and consequently reducing the bezel size and cost of the electronic paper screen module.

[0083] Figure 6 This is a front view of an electronic paper screen module provided in an embodiment of the present invention; Figure 7 This is a schematic diagram of the back of an electronic paper screen module provided in an embodiment of this utility model; Figure 8 It is along Figure 6 A schematic diagram of the cross-section between C and C'; Figure 9 It is along Figure 6 A schematic diagram of the cross-section of line D-D'. See also... Figures 6-9 The electronic paper screen module includes: a substrate 101, an array layer 102, a light-shielding layer 90, an electronic paper film FPL, a protective film PS, a circuit board 30, and an indicator light 40.

[0084] The array layer 102 is disposed on one side (e.g., above) of the substrate 101; the array layer 102 and the substrate 101 are stacked to form the TFT substrate 100. The array layer 102 includes a display area AA and a non-display area NAA surrounding the display area AA; wherein, a pixel array (not shown in the figure) is disposed in the display area AA; the non-display area NAA is disposed with non-overlapping light-transmitting areas 13 and circuit layout areas 14, and a gate driving circuit 10 for driving the pixel array is disposed in the circuit layout area 14. A light-shielding layer 90 is disposed on the side of the gate driving circuit 10 away from the substrate 101, and the light-shielding layer 90 covers the circuit layout area 14; it is understood that the light-shielding layer 90 does not cover the light-transmitting area 13. An electronic paper film FPL is disposed on the side of the array layer 102 away from the substrate 101 (e.g., above), and the electronic paper film FPL covers the display area AA; it is understood that the electronic paper film FPL does not cover the light-transmitting area 13 and the circuit layout area 14. A protective film PS is disposed on the side of the electronic paper film FPL away from the substrate 101 (e.g., above), and covers the electronic paper film FPL, the light-transmitting area 13, and the circuit layout area 14. A circuit board 30 is at least partially disposed on the side of the substrate 101 away from the array layer 102 (e.g., below). An indicator light 40 is disposed on the circuit board 30, located on the side of the substrate 101 away from the array layer 102, and is disposed corresponding to the light-transmitting area 13, such as... Figure 8 As shown by the dashed arrow, the light emitted from the indicator light 40 passes through the substrate 101, the light-transmitting area 13, and the protective film PS before exiting the electronic paper screen module.

[0085] In this embodiment, substrate 101 is a transparent substrate, specifically a glass substrate or a PI substrate, and the protective film PS is a transparent film layer to ensure that the light emitted by the indicator light 40 can pass through. It is understood that in this embodiment, "structure A covering structure B" means that the orthographic projection of structure B on substrate 101 completely falls within the orthographic projection of structure A on substrate 101; "structure A not covering structure B" means that there is no overlap between the orthographic projections of structure A and structure B on substrate 101. "Indicator light 40 corresponding to the light-transmitting area 13" means that the orthographic projection of indicator light 40 on substrate 101 overlaps with the orthographic projection of light-transmitting area 13 on substrate 101; preferably, light-transmitting area 13 covers indicator light 40, and the size range of light-transmitting area 13 is greater than or equal to the size range of indicator light 40 to ensure good light transmission from indicator light 40. For example, indicator light 40 can be an LED light.

[0086] For example, in array layer 102, the light-transmitting area 13 can be a completely light-transmitting area without any metal patterns, which is beneficial for the effective transmission of light. Alternatively, when the requirement for light transmission intensity is not high, the light-transmitting area 13 can also be set as a partially light-transmitting area with some metal patterns. The area ratio and size range of the metal patterns in the partially light-transmitting area 13 can be set according to the specific situation.

[0087] The display area AA can be surrounded by a border area of ​​a certain width to distinguish it from the non-display area NAA. The electronic paper film FPL covers both the display area AA and the border area. Considering the adhesion accuracy of the electronic paper film FPL, its size can be slightly larger than the border area, for example, by a few tenths of a millimeter. Depending on actual needs, a circuit layout area 14 can be set in the non-display area NAA on one side of the display area AA, or as... Figure 6 As shown, a circuit layout area 14 is set in each of the non-display areas NAA on both sides of the display area AA. Each circuit layout area 14 corresponds to a gate driving circuit 10. The number of circuit layout areas 14 is not limited here. The protective film PS covers the electronic paper film FPL and all gate driving circuits 10. The light-shielding layer 90 covers all circuit layout areas 14 to achieve light-shielding protection for the transistors in the gate driving circuit 10. The light-shielding layer 90 does not cover the light-transmitting area 13 to avoid blocking the emitted light of the indicator light 40. Since the indicator light is set in the light-transmitting area 13, it is equivalent to being set within the range of the array layer 102 (equivalent to the range of the TFT substrate), and more specifically, within the range of the protective film PS. Therefore, the circuit board 30 does not need to have a portion protruding from the array layer 102 to support the indicator light 40. For example Figure 7 As shown, the portion of the circuit board 30 located on the side of the substrate 101 away from the array layer 102 can be completely within the range of the array layer 102, compared to... Figure 3 The size of the 302 PCB board has been greatly reduced.

[0088] In summary, this embodiment of the invention is equivalent to setting a light-transmitting region 13 at any location within the array layer 102, outside the edge of the protective film PS, outside the edge of the electronic paper film FPL, and outside the edge of the gate driving circuit 10 (or circuit layout area 14). A light-shielding layer 90 is only set for the circuit layout area 14, and the indicator light 40 is positioned corresponding to the light-transmitting region 13. Since the light-shielding layer 90 does not obstruct the light-transmitting region 13, the indicator light 40 can be reliably positioned within the TFT substrate area using the transparent protective film PS in conjunction with the light-transmitting region 13. Furthermore, the light-transmitting region 13 in this embodiment of the invention effectively utilizes the remaining area within the protective film PS where the display area AA and gate driving circuit 10 are not located. It does not require increasing the size of the protective film PS, nor does it increase the size of the non-display area NAA, nor does it require adjusting the structure of the electronic paper film FPL and the protective film PS. Therefore, by designing the light-shielding layer 90 and the light-transmitting area 13 in a coordinated manner, this embodiment can ensure the light-shielding effect on the gate driving circuit 10 and prevent the gate driving circuit 10 from being affected by external light, while placing the indicator light 40 within the range of the array layer 102. This allows the size of the circuit board 30 to remain within the range of the array layer 102, providing favorable conditions for reducing the size of the circuit board 30 and facilitating the realization of a narrow bezel and low cost for the electronic paper screen module.

[0089] Based on the above embodiments, optionally, the electronic paper screen module further includes: an edge sealing structure; the edge sealing structure is set around the electronic paper film FPL and fills the gap between the protective film PS and the array layer 102, for the purpose of achieving a protective effect against water and oxygen erosion. The portion of the edge sealing structure corresponding to the light-transmitting area 13 is a transparent / semi-transparent structure to ensure that the light from the indicator light 40 can pass through; the remaining portion of the edge sealing structure can be set to an opaque / semi-transparent / transparent structure according to actual needs.

[0090] Based on the above embodiments, there are various possible arrangements of the light-shielding layer 90, the light-transmitting area 13, and the circuit board 30. The arrangement of the circuit board 30 will be described first, followed by an exemplary description of the location of the light-transmitting area 13, and then an exemplary description of the arrangement of the light-shielding layer 90. However, none of these are intended to limit the present invention.

[0091] The circuit board 30 serves as a control component for information interaction between the electronic paper screen and the external main control system. It can receive and process the main control information transmitted from the main control system and then send it to the driver chip 20. The driver chip 20 then drives the source line and controls the gate drive circuit 10 to drive the gate line accordingly.

[0092] In one implementation, optionally, see [link to relevant documentation]. Figure 7and Figure 8 The circuit board 30 includes a PCB board 33, and the electronic paper screen module further includes a first flexible circuit board 31. The PCB board 33 is connected to the array layer 102 via the first flexible circuit board 31; the first flexible circuit board 31 is bent so that the PCB board 33 is located on the side of the substrate 101 away from the array layer 102. In this case, the entire circuit board 30 is located on the side of the substrate 101 away from the array layer 102. For example, one end of the first flexible circuit board 31 is soldered to the array layer 102, and the other end is connected to the PCB board 33 and bent to the side of the substrate 101 away from the array layer 102. Correspondingly, an indicator light 40 is disposed on the PCB board 33.

[0093] Figure 10 This is a cross-sectional schematic diagram of an electronic paper screen module provided in an embodiment of this utility model. See also... Figure 10 In another embodiment, optionally, the circuit board 30 includes a second flexible circuit board 32; the second flexible circuit board 32 includes a bent portion and a straight portion connected to each other; one end of the bent portion away from the straight portion is connected to the array layer 102, and the bent portion is bent such that the straight portion is located on the side of the substrate 101 away from the array layer 102. In this case, the circuit board 30 is equivalent to a portion (i.e., the straight portion) located on the side of the substrate 101 away from the array layer 102. Accordingly, the indicator light 40 is disposed on the straight portion.

[0094] Based on the above embodiments, optionally, the circuit board 30 is provided with a receiving hole corresponding to the position of the light-transmitting area 13, and the indicator light 40 is disposed in the receiving hole. For example, the receiving hole can be a through hole or a groove with its opening facing the substrate 101, and can be specifically set according to the height of the indicator light 40 and the manufacturing process. Since the indicator light 40 itself has a certain height, compared to directly placing the indicator light 40 on the surface of the circuit board 30 near the substrate 101, this embodiment, by placing the indicator light 40 in the receiving hole, can, firstly, reduce the thickness of the electronic paper screen module, which is beneficial for the thinner and lighter design of the electronic paper screen, and secondly, reduce the probability of the indicator light 40 being damaged by impacts, thus improving the device's lifespan.

[0095] The above embodiments exemplify a COG (Chip on Glass, i.e., the driver chip 20 is disposed on the TFT substrate) module structure. Depending on the structure of the circuit board 30, the indicator light 40 can be disposed on the flat portion of the PCB board 33 or the second flexible circuit board 32. However, the above structure is not intended to limit the present invention. The design scheme of the present invention is also applicable to a COF (Chip on Film, i.e., the driver chip 20 is disposed on an FPC flexible board) module structure. Specifically, an FPC flexible board connection array layer 102 can be provided, the driver chip 20 can be disposed on the FPC flexible board, and then the FPC flexible board can be connected to the first flexible circuit board 31 or the second flexible circuit board 32 to realize communication between the driver chip 20 and the circuit board 30. Based on this, depending on the structure of the circuit board 30, the indicator light 40 can be disposed on the flat portion of the PCB board 33 or the second flexible circuit board 32. The specific form of the module structure is not limited here.

[0096] The specific location of the light-transmitting area 13 is explained below.

[0097] Figure 11 This is a plan view of an electronic paper screen module provided in an embodiment of this utility model. It is for ease of demonstration. Figure 11 The electronic paper film FPL and the protective film PS are rendered fully transparent in the accompanying diagrams, while retaining their borders to indicate their boundaries. See also Figure 11 Optionally, the non-display area NAA includes a first non-display sub-area NA1 and a second non-display sub-area NA2 disposed opposite to each other along a first direction X, and a third non-display sub-area NA3 and a fourth non-display sub-area NA4 disposed opposite to each other along a second direction Y, wherein the first direction X is perpendicular to the second direction Y. For example, if the first direction X is the row direction of the pixel array and the second direction Y is the column direction of the pixel array, then the first non-display sub-area NA1 can be the left border area, the second non-display sub-area NA2 can be the right border area, the third non-display sub-area NA3 can be the bottom border area, and the fourth non-display sub-area NA4 can be the top border area.

[0098] The array layer 102 also includes multiple gate lines extending along the first direction X and arranged along the second direction Y. Figure 11 Not shown in the image, please refer to [link / reference]. Figure 1 The circuit layout area 14 is located in the first non-display sub-area NA1 and / or the second non-display sub-area NA2; the gate drive circuit 10 is connected to the pixel array through each gate line.

[0099] Based on this, the light-transmitting area 13 can be set in the third non-display sub-area NA3 or the fourth non-display sub-area NA4, specifically, it can be set outside the edge of the electronic paper film FPL and inside the edge of the protective film PS, and can be located at any position in the third non-display sub-area NA3 or the fourth non-display sub-area NA4.

[0100] This embodiment is configured in such a way that the light-transmitting area 13 can be set in a way that avoids the circuit layout area 14, thus isolating the light-transmitting area 13 from the circuit layout area 14. This is beneficial for the subsequent setting of the light-shielding layer 90 and for ensuring the light-shielding effect on the gate drive circuit 10.

[0101] Furthermore, the array layer 102 also includes multiple source lines extending along the second direction Y and arranged along the first direction X. Figure 11 Not shown in the image, please refer to [link / reference]. Figure 1 The electronic paper screen module also includes a driver chip connected to the pixel array via various source lines. The driver chip is connected to the array layer in the third non-display sub-region NA3, and the first flexible circuit board 31 / second flexible circuit board 32 is bent, for example, along the edge of the third non-display sub-region NA3 in the second direction Y away from the display area AA. Based on this, as... Figure 11 As shown, the light-transmitting area 13 is preferably located in the third non-display sub-area NA3 to minimize the size limitations on the circuit board 30 caused by accommodating the indicator light 40, thereby minimizing the size of the circuit board 30. For example, it can be done as follows: Figure 11 As shown, the light-transmitting area 13 is located in the lower right corner of the protective film PS. Preferably, the light-transmitting area 13 can be located in the fourth non-display sub-area NA4. In this way, although the size of the circuit board 30 is still somewhat limited to accommodate the indicator light 40, the size of the circuit board 30 does not need to exceed the range of the array layer 102 due to the indicator light 40. Compared to related technologies, the goal of reducing the size of the circuit board 30 can still be achieved.

[0102] The specific configuration of the light-shielding layer 90 is explained below.

[0103] In one embodiment, the edge sealing structure can be reused as a light-shielding layer 90 to achieve a light-shielding effect without adding an additional light-shielding layer 90. For example, an opaque edge sealing material can be used to cover the circuit layout area 14 to shield the gate drive circuit 10 from light; at the same time, a transparent / semi-transparent edge sealing material can be used to cover the light-transmitting area 13 to allow the indicator light 40 to transmit light.

[0104] Specifically, the electronic paper screen module also includes an edge sealing structure. The edge sealing structure surrounds the electronic paper film FPL and fills the gap between the protective film PS and the array layer 102. The edge sealing structure may include, for example, an adhesive structure coated around the edges of the protective film PS. The edge sealing area can be found in [reference needed]. Figure 12 The shaded area in the image. From Figure 12 As can be seen, the overall sealing area is located around the edge of the electronic paper film FPL. The sealing adhesive is applied along the edge of the protective film PS and penetrates into the gap between the array layer 102 and the protective film PS through capillary action, diffusing inward to the outer edge of the electronic paper film FPL and outward to a range of 0.1~1mm beyond the edge of the protective film PS. Therefore, the inner edge of the overall sealing area corresponds to the position of the outer edge of the electronic paper film FPL, and the outer edge of the overall sealing area corresponds to the position 0.1~1mm beyond the outer edge of the protective film PS.

[0105] Figure 13 This is a schematic diagram of a sealing structure provided in an embodiment of this utility model. See also... Figure 13 The edge sealing structure includes a first sub-edge sealing structure 511 and a second sub-edge sealing structure 512. The first sub-edge sealing structure 511 covers the circuit layout area 14 but does not cover the light-transmitting area 13. The first sub-edge sealing structure 511 is an opaque structure, for example, made of black edge sealing adhesive, and serves as a light-shielding layer 90. The second sub-edge sealing structure 512 covers the light-transmitting area 13 but does not cover the circuit layout area 14. The second sub-edge sealing structure 512 is a transparent or semi-transparent structure, for example, made of transparent / semi-transparent edge sealing adhesive.

[0106] It should be noted that the first sub-sealing structure 511 only needs to cover each circuit layout area 14, and the second sub-sealing structure 512 only needs to cover the light-transmitting area 13. By setting opaque sealing adhesive for the corresponding circuit layout area 14 and transparent / semi-transparent sealing adhesive for the corresponding light-transmitting area 13, the sealing structure can simultaneously meet the light-shielding requirements of the gate drive circuit 10 and the light-transmitting requirements of the indicator light 40. For the remaining sealing areas outside the circuit layout area 14 and the light-transmitting area 13, black sealing adhesive, white sealing adhesive, or transparent / semi-transparent sealing adhesive can be used, without limitation. However, considering the continuity and efficiency of sealing adhesive coating, preferably, all remaining sealing areas are set with black sealing adhesive; next preferably, the remaining sealing areas are set with transparent / semi-transparent sealing adhesive.

[0107] For example, such as Figure 13 As shown, the circuit layout area 14 is located outside the edge of the display area AA, outside the edge of the electronic paper film FPL, and inside the edge of the protective film PS, for example... Figure 13The light-transmitting area 13 is located on the left and right sides of the display area AA; the light-transmitting area 13 is located outside the edge of the display area AA and on both sides of the non-circuit layout area 14 (in this embodiment, it is the upper and lower sides of the display area AA). For ease of explanation, in this embodiment, the light-transmitting area 13 is set at the lower right corner of the protective film PS.

[0108] Correspondingly, the first sub-sealing structure 511 covers at least two circuit layout areas, providing light shielding for the two gate drive circuits 10. The second sub-sealing structure 512 covers at least the light-transmitting area 13, ensuring that light passes through the substrate 101, the light-transmitting area 13, the second sub-sealing structure 512, and the protective film PS sequentially from bottom to top. The light-transmitting area 13 and the second sub-sealing structure 512 are specially designed for effective light transmission; the protective film PS itself has good light transmittance and requires no special design.

[0109] For example, such as Figure 13 The first sub-edge sealing structure 511 and the second sub-edge sealing structure 512 can be connected to each other to form a complete pair of edge sealing structures.

[0110] In order to allow light to pass through effectively, the second sub-edge sealing structure 512 is preferably made of a transparent edge sealing adhesive with good light transmittance. In cases where the light transmittance requirement is not high, the second sub-edge sealing structure 512 is preferably made of a semi-transparent edge sealing adhesive with partial light transmittance.

[0111] In this embodiment, different types of sub-sealing structures are set for different functional areas. A first, opaque sub-sealing structure 511 is set for the circuit layout area 14 to meet the light-shielding requirements of the gate drive circuit 10. Furthermore, adjusting the sealing structure at the position corresponding to the light-transmitting area 13 to a second, light-transmitting sub-sealing structure 512 allows the light emitted by the indicator light 40 to travel along... Figure 8 The path indicated by the dashed arrow passes through the substrate 101, the light-transmitting area 13, the second sub-sealing structure 512, and the protective film PS to eject the electronic paper screen module, ensuring that the indicator light 40 can be placed within the range of the TFT substrate and ensuring effective light transmission.

[0112] In another embodiment, the light-shielding layer 90 may optionally be disposed in the array layer 102 to ensure the light-shielding effect on the gate drive circuit 10. This will be described in detail below.

[0113] Figure 14 This is a planar schematic diagram of an array layer provided in an embodiment of this utility model. See also: Figure 14 , for example, and Figure 1 Compared to existing GIP-type TFT substrates, Figure 14The difference lies in the fact that a light-shielding layer 90 is integrated in the array layer 102. By setting the pattern of the light-shielding layer 90 at the corresponding position in the circuit layout area 14, the self-shielding design of the TFT substrate 100 is realized without adding a light-shielding design to other components of the electronic paper screen module. The specific arrangement of the light-shielding layer 90 in the array layer 102 is described below.

[0114] Figure 15 This is a cross-sectional schematic diagram of a TFT substrate provided in an embodiment of this utility model. See also... Figure 15 For example, the array layer includes: a first metal layer M1, a first insulating layer GI, an active layer, and a second metal layer M2 arranged sequentially in a direction away from the substrate 101.

[0115] The gate driving circuit 10 includes multiple transistors (e.g., TFTs). The gate of each transistor is formed in the first metal layer M1, the channel region, source region, and drain region of each transistor are formed in the active layer, and the source and drain of each transistor are formed in the second metal layer M2. For any transistor, its gate and channel region are correspondingly arranged, the source can be connected to the source region, and the drain can be connected to the drain region. For example, the first metal layer M1 and the second metal layer M2 can be made of opaque conductive metals such as Al, Mo, Nd, Cu, or Cr. The first insulating layer GI is an inorganic insulating dielectric layer and can be made of non-conductive insulating materials with good light transmittance, such as SiO2 or SiNx. The active layer can be made of semiconductor materials such as a-Si, p-Si, and IGZO. The substrate 101 itself has excellent light transmittance. The various circuit patterns formed on the substrate 101 are composed of opaque metal layers and dielectric layers with good light transmittance. An ITO layer can also be disposed on the side of the second metal layer M2 away from the substrate 101. This layer, mainly distributed in the display area, is used to fabricate the pixel electrodes in each pixel and is a conductive metal oxide with good light transmittance. Based on the type and area ratio of the film layers covering the substrate 101, the array layer 102 can be divided into opaque areas, partially transparent areas, and transparent areas. Areas completely covered by metal layers are opaque areas. Areas partially covered by metal layers are partially transparent areas. Areas not covered by metal layers, covered by a light-transmitting dielectric layer, or partially covered are transparent areas. The transparent area 13 can be configured as a transparent area or a partially transparent area as needed.

[0116] The light-shielding layer 90 is located in the array layer and is disposed on the side of the second metal layer M2 away from the substrate 101.

[0117] In one implementation, optionally, the light-shielding layer 90 is a black matrix layer BM. Specifically, as shown... Figure 15 and Figure 16The diagram shows a longitudinal cross-sectional view of the transistors in the gate drive circuit 10, which achieve self-shielding design through the black matrix layer BM. It is understood that the black matrix layer BM is not present in the light-transmitting region 13 to avoid affecting light transmission.

[0118] The black matrix layer BM can be made of an opaque organic resin material doped with black particles / black dye. At the transistor in the gate drive circuit 10, the first metal layer M1 forms the gate, the active layer forms the semiconductor channel, and the second metal layer M2 forms the source and drain. By setting the black matrix layer BM pattern on top of the transistor as a light-shielding layer, it can be ensured that the transistor in the gate drive circuit 10 is not affected by ambient light.

[0119] Since the black matrix layer BM is made of a non-conductive organic insulating dielectric material, it can be directly disposed on the transistor as needed, for example... Figure 16 As shown, the black matrix layer BM can be in direct contact with the second metal layer M2. Alternatively, other commonly used but non-shielding insulating dielectric materials (such as...) can be first placed on the transistor. Figure 15 The transparent inorganic insulating dielectric layer PV and / or transparent organic insulating dielectric layer shown herein are then covered with a black matrix layer BM for light shielding. Figure 15 and Figure 16 The two film layer structures described are illustrative examples and are not intended to limit the scope of this invention. In actual products, it is sufficient to simply place a black matrix layer BM above the transistor in the gate drive circuit. There are no restrictions on the specific type and number of other film layers besides the transistor and the black matrix layer BM, or their positional relationship with the black matrix layer BM.

[0120] In another implementation, alternatively, see [link to relevant documentation]. Figure 17 and Figure 18 The light-shielding layer is the third metal layer M3. Correspondingly, the array layer also includes a second insulating layer, disposed between the second metal layer M2 and the third metal layer M3, to achieve insulation between the two metal layers. Thus, by setting the pattern of the third metal layer M3 above the circuit layout area 14 for light shielding, self-shielding on the TFT substrate is achieved. It is understood that the pattern of the third metal layer M3 is not set in the light-transmitting area 13 to avoid affecting light transmission.

[0121] For example, the third metal layer M3 is made of an opaque conductive metal such as Al, Mo, Nd, Cu, or Cr. The second insulating layer may include a transparent inorganic insulating dielectric layer PV and a transparent organic insulating dielectric layer OC stacked together. The transparent inorganic insulating dielectric layer PV may be made of a non-conductive insulating material with good light transmittance, such as SiO2 or SiNx; the transparent organic insulating dielectric layer OC is a planar layer and may be made of a non-conductive insulating material with good light transmittance, such as organic resin. The transparent inorganic insulating dielectric layer PV and the transparent organic insulating dielectric layer OC may be as follows: Figure 17 As shown, they are arranged sequentially away from the substrate 101, or as shown in the diagram. Figure 18 The transparent organic insulating dielectric layer OC and the transparent inorganic insulating dielectric layer PV are arranged sequentially away from the substrate 101.

[0122] Specifically, at the transistor in the gate drive circuit 10, the first metal layer M1 is used to form the gate, the active layer is used to form the semiconductor channel, and the second metal layer M2 is used to form the source and drain. By providing a third metal layer M3 pattern on top of the transistor as a light-shielding layer, it can be ensured that the transistor in the gate drive circuit 10 is not affected by external ambient light.

[0123] Since the third metal layer M3 is a conductive metal, an insulating dielectric layer needs to be placed on the transistor first, and then the third metal layer M3 is placed on top of the insulating dielectric layer to block light. (The provided text appears to be incomplete and requires further context.) Figure 17 and Figure 18 The two film structures described are illustrative examples and are not intended to limit the scope of this invention. In actual products, it is sufficient to first place a second insulating layer on top of the transistor in the gate drive circuit, and then place a third metal layer M3 to block light. There are no restrictions on the specific type, quantity, or positional relationship of the insulating dielectric layer between the transistor and the third metal layer M3.

[0124] Figure 19 This is a front view of another electronic paper screen module provided in this embodiment of the present invention; Figure 20 This is a schematic diagram of the back of another electronic paper screen module provided in this embodiment of the present invention; Figure 21 It is along Figure 19 A schematic diagram of the cross-section between E and E'; Figure 22 It is along Figure 19 A schematic diagram of the cross-section between F and F'. Figures 19-22 A specific implementation method for a self-shielding TFT substrate is given; see [link to relevant documentation]. Figures 19-22The indicator light 40 is positioned within the area of ​​the TFT substrate 100. Specifically, it is positioned on both sides of the non-circuit layout area 14 of the display area AA (in this embodiment, the circuit layout area 14 is positioned on the left and right sides of the display area AA, and the sides of the non-circuit layout area 14 of the display area AA are the upper or lower sides of the display area AA), outside the edge of the electronic paper film FPL, and inside the edge of the protective film PS. In this embodiment, the indicator light 40 is exemplaryly positioned in the lower right corner of the protective film PS. However, in actual products, the position of the indicator light 40 can be any area on both sides of the non-circuit layout area 14 of the display area AA, outside the edge of the electronic paper film FPL, and inside the edge of the protective film PS; the specific position is not required.

[0125] Since a light-shielding layer 90 is integrated on the TFT substrate 100, the TFT substrate 100 achieves self-shielding by setting the pattern of the light-shielding layer 90 at the position of the circuit layout area 14, without the need to add light-shielding designs to other components of the electronic paper screen module. Therefore, for the entire edge sealing area, the edge sealing structure 50 can be sealed with transparent edge sealing adhesive / semi-transparent edge sealing adhesive, thereby ensuring that the light from the indicator light 40 can pass through normally.

[0126] See Figure 22 As can be seen from the cross-sectional view along line F-F', the gate driving circuit 10 is disposed on the left and right sides of the TFT substrate 100, outside the edge of the electronic paper film FPL, and achieves self-shielding through the light-shielding layer 90 disposed on the TFT substrate 100. (See also...) Figure 21 As can be seen from the cross-sectional view along line E-E', the indicator light 40 is located in the area outside the edge of the electronic paper film FPL and inside the edge of the protective film PS, and passes through the substrate 101, the light-transmitting area 13, the sealing structure 50, and the protective film PS from bottom to top. To ensure effective light transmission, the relevant settings in this embodiment ensure good light transmittance of the TFT substrate 100, the sealing structure 50, and the protective film PS above the LED light emission direction. The protective film PS itself has good light transmittance, therefore no special settings are required.

[0127] In another embodiment, optionally, the light-shielding layer 90 can be attached to the protective film PS to achieve light shielding of the gate drive circuit 10. Specifically, Figure 23 This is a schematic diagram showing the placement of a light-shielding layer according to an embodiment of this utility model. See also... Figure 23The light-shielding layer 90 is attached to the protective film PS and covers the circuit layout area 14, but does not cover the light-transmitting area 13. More specifically, the light-shielding layer 90 can be attached to the side of the protective film PS closest to the substrate 101 (e.g., the bottom); or, the light-shielding layer 90 can be attached to the side of the protective film PS furthest from the substrate 101 (e.g., the top); or, the light-shielding layer 90 can be embedded inside the protective film PS. For example, if the protective film PS is a multi-layered structure, the light-shielding layer 90 can be disposed between any two adjacent layers in the protective film PS.

[0128] from Figure 23 As can be seen, an opaque light-shielding layer 90 is disposed on the transparent protective film PS at the position corresponding to the circuit layout area 14. The area on the protective film PS corresponding to the light-shielding layer 90 is opaque, while the area outside the light-shielding layer 90 is normally transparent. In this way, both light shielding of the gate driving circuit 10 and light transmission in the area outside the gate driving circuit 10 are achieved. For example, the light-shielding layer 90 can completely overlap with the circuit layout area 14 and have the same size, or be slightly larger than the size of the circuit layout area 14.

[0129] For example, the light-shielding layer 90 can be integrated onto the protective film PS by various methods such as attachment, screen printing, inkjet printing, or coating. Preferably, black ink can be integrated onto the protective film PS as the light-shielding layer 90 by screen printing or inkjet printing. More preferably, a light-shielding sheet or light-shielding film layer can be integrated onto the protective film PS as the light-shielding layer 90 by attachment or coating.

[0130] Specifically, Figure 24 This is a front view of another electronic paper screen module provided in this utility model embodiment; Figure 25 This is a schematic diagram of the back of another electronic paper screen module provided in this embodiment of the present invention; Figure 26 It is along Figure 24 A schematic diagram of the cross-section of G-G'; Figure 27 It is along Figure 24 A schematic diagram of the cross-section between H and H'. Figures 24-27 A specific embodiment is given in which the light-shielding layer 90 is attached to the protective film PS. The basic structure of the TFT substrate 100 is described in [reference needed]. Figure 1 The explanation will not be repeated here.

[0131] See Figures 24-27The indicator light 40 is positioned within the area of ​​the TFT substrate 100. Specifically, it is positioned on both sides of the non-circuit layout area 14 of the display area AA (in this embodiment, the circuit layout area 14 is positioned on the left and right sides of the display area AA, and the sides of the non-circuit layout area 14 of the display area AA are the upper or lower sides of the display area AA), outside the edge of the electronic paper film FPL, and inside the edge of the protective film PS. In this embodiment, the indicator light 40 is exemplaryly positioned in the lower right corner of the protective film PS. However, in actual products, the position of the indicator light 40 can be any area on both sides of the non-circuit layout area 14 of the display area AA, outside the edge of the electronic paper film FPL, and inside the edge of the protective film PS; the specific position is not required.

[0132] A light-shielding layer 90 is integrated in the protective film 14 at the location corresponding to the circuit layout area 14 to shield the gate drive circuit 10 from light. Simultaneously, to avoid affecting the normal display of the electronic paper film FPL, the light-shielding layer 90 is positioned outside the edge of the electronic paper film FPL. The entire edge-sealing area can be sealed using an edge-sealing structure 50 composed of transparent / semi-transparent edge-sealing adhesive, thereby ensuring that the light from the indicator light 40 can pass through normally.

[0133] from Figure 27 As can be seen from the cross-sectional view along H-H', the gate driving circuit 10 is disposed on the left and right sides of the TFT substrate 100, outside the edge of the electronic paper film FPL. A light-shielding layer 90 is disposed on the protective film PS at the corresponding position of the circuit layout area 14 to shield the gate driving circuit 10 from light. Figure 26 As can be seen from the cross-sectional view along line G-G', the indicator light 40 is located in the area outside the edge of the electronic paper film FPL and inside the edge of the protective film PS, and passes through the substrate 101, the light-transmitting area 13, the sealing structure 50, and the protective film PS from bottom to top. To ensure effective light transmission, the relevant settings in this embodiment ensure good light transmittance of the TFT substrate 100, the sealing structure 50, and the protective film PS above the LED light emission direction. The protective film PS itself has good light transmittance, therefore no special settings are required.

[0134] It is understandable that the light-shielding layer 90 can be an integral structure that completely covers the circuit layout area 14, an integral structure that completely covers the gate driving circuit 10, or a distributed structure that is separately set for each transistor in the gate driving circuit 10. Regardless of whether it is an integral structure or a distributed structure, the light-shielding layer 90 needs to shield all transistors in the gate driving circuit 10 from light.

[0135] Based on any of the above-mentioned solutions that do not employ edge sealing and reuse the light-shielding layer, alternatively, see [reference needed]. Figure 19 and Figure 24The electronic paper screen module also includes an edge sealing structure 50. The edge sealing structure 50 surrounds the electronic paper film FPL and fills the gap between the protective film PS and the array layer 102. The edge sealing structure 50 is transparent and is made entirely of transparent / semi-transparent material. Preferably, to ensure effective light transmission, the edge sealing structure 50 is made of a transparent edge sealing adhesive with good light transmittance. In cases where high light transmittance is not required, a semi-transparent edge sealing adhesive with partial light transmittance is a more preferable option.

[0136] In summary, in this embodiment of the invention, for the GIP-type electronic paper screen module, a light-shielding design is implemented for the area corresponding to the gate driving circuit to ensure that the gate driving circuit on the TFT substrate is not affected by external light. Simultaneously, a light-transmitting area is provided in the area corresponding to the non-circuit layout area within the edge sealing structure, and the indicator light is placed on the circuit board at the corresponding position of the light-transmitting area (specifically, it can be placed on a PCB board, flexible circuit board, or COF). Therefore, the indicator light can be placed within the range of the TFT substrate, ensuring effective light transmission. In this way, not only is light shielding of the gate driving circuit achieved, but the size of the circuit board can also be greatly reduced by placing the indicator light within the range of the TFT substrate, thereby achieving a narrow bezel and low cost for the GIP-type electronic paper screen module.

[0137] The specific embodiments described above do not constitute a limitation on the scope of protection of this utility model. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this utility model should be included within the scope of protection of this utility model.

Claims

1. An electronic paper screen module, characterized in that, include: substrate; An array layer is disposed on one side of the substrate; the array layer includes a display area and a non-display area surrounding the display area; wherein, a pixel array is disposed in the display area; the non-display area is provided with non-overlapping light-transmitting areas and circuit layout areas, and a gate driving circuit for driving the pixel array is disposed in the circuit layout area. A light-shielding layer is disposed on the side of the gate driving circuit away from the substrate, covering the circuit layout area; An electronic paper film is disposed on the side of the array layer away from the substrate, covering the display area; A protective film is disposed on the side of the electronic paper film away from the substrate, and covers the electronic paper film, the light-transmitting area and the circuit layout area; A circuit board; the circuit board is at least partially disposed on the side of the substrate away from the array layer; An indicator light is disposed on the circuit board, located on the side of the substrate away from the array layer, and corresponding to the light-transmitting area. The light emitted by the indicator light passes through the substrate, the light-transmitting area, and the protective film and exits the electronic paper screen module.

2. The electronic paper screen module according to claim 1, characterized in that, Also includes: An edge-sealing structure is provided around the electronic paper film and fills the gap between the protective film and the array layer; The edge sealing structure includes a first sub-edge sealing structure and a second sub-edge sealing structure; the first sub-edge sealing structure covers the circuit layout area, the first sub-edge sealing structure is an opaque structure, and the first sub-edge sealing structure serves as the light-shielding layer; The second sub-edge sealing structure covers the light-transmitting area, and the second sub-edge sealing structure is a transparent structure or a semi-transparent structure.

3. The electronic paper screen module according to claim 1, characterized in that, The gate driving circuit includes a plurality of transistors; the array layer includes: a first metal layer, a first insulating layer, an active layer and a second metal layer arranged sequentially in a direction away from the substrate; wherein, the gate of each transistor is formed in the first metal layer, the channel region, source region and drain region of each transistor are formed in the active layer, and the source and drain of each transistor are formed in the second metal layer. The light-shielding layer is located in the array layer and is disposed on the side of the second metal layer away from the substrate.

4. The electronic paper screen module according to claim 3, characterized in that, The light-shielding layer is a black matrix layer; or, The light-shielding layer is a third metal layer, and the array layer further includes a second insulating layer disposed between the second metal layer and the third metal layer.

5. The electronic paper screen module according to claim 1, characterized in that, The light-shielding layer is attached to the side of the protective film closest to the substrate; Alternatively, the light-shielding layer may be attached to the side of the protective film away from the substrate; Alternatively, the light-shielding layer may be embedded inside the protective film.

6. The electronic paper screen module according to any one of claims 3-5, characterized in that, Also includes: An edge-sealing structure is provided around the electronic paper film and fills the gap between the protective film and the array layer; wherein the edge-sealing structure is a transparent structure.

7. The electronic paper screen module according to claim 1, characterized in that, The circuit board includes a PCB board, and the electronic paper screen module further includes a first flexible circuit board. The PCB board is connected to the array layer via the first flexible circuit board; the first flexible circuit board is bent so that the PCB board is located on the side of the substrate away from the array layer; the indicator light is disposed on the PCB board; or, The circuit board includes: a second flexible circuit board; the second flexible circuit board includes a bent portion and a straight portion connected to each other; one end of the bent portion away from the straight portion is connected to the array layer, the bent portion is bent such that the straight portion is located on the side of the substrate away from the array layer; the indicator light is disposed on the straight portion.

8. The electronic paper screen module according to claim 1, characterized in that, The circuit board has a receiving hole at a position corresponding to the light-transmitting area, and the indicator light is disposed in the receiving hole.

9. The electronic paper screen module according to claim 1, characterized in that, The non-display area includes a first non-display sub-area and a second non-display sub-area arranged opposite each other along a first direction, and a third non-display sub-area and a fourth non-display sub-area arranged opposite each other along a second direction, wherein the first direction is perpendicular to the second direction; The array layer further includes multiple gate lines extending along the first direction and arranged along the second direction; the circuit layout area is disposed in the first non-display sub-region and / or the second non-display sub-region; the gate driving circuit is connected to the pixel array through each of the gate lines; The light-transmitting area is located in the third or fourth non-display sub-area.

10. The electronic paper screen module according to claim 9, characterized in that, The array layer further includes multiple source lines extending along the second direction and arranged along the first direction; the electronic paper screen module further includes a driver chip, which is connected to the pixel array through each of the source lines; The driving chip is connected to the array layer in the third non-display sub-region; the light-transmitting area is disposed in the third non-display sub-region.

Images