Square wafer multi-wafer simultaneous developing carrier device

CN224816652UActive Publication Date: 2026-09-29ANHUI JINGXIN TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202522531442.5
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-11-28
Publication Date
2026-09-29
Estimated Expiration
2035-11-28

AI Technical Summary

Technical Problem

[0003]目前,针对碲镉汞方形晶圆的显影主要采用半自动旋转式显影机,其工作流程为:人工上片至旋转台→真空吸附→程序显影(放置、滴显影液、低速旋转覆盖、静置显影、高速旋转去除显影液、水洗、旋转甩干)→解吸附→手工取下晶圆,单个晶圆上通常只有1~6个探测器芯片,传统半自动旋转显影机一次只能处理一片,生产效率低下,本发明针对现有技术不足,提供一种专门适用于小尺寸方形碲镉汞晶圆的多片同步显影载盘装置

Benefits of technology

[0011]本实用新型提供了方形晶圆多片同步显影载盘装置。具备以下有益效果:为了能够一次性处理多个小尺寸方形碲镉汞圆晶,本装置通过以匀胶载盘圆心为中心轴,对称分布开设多个凹槽,其中凹槽的尺寸与方形圆晶的尺寸一致,多凹槽集成设计:圆形载盘上对称分布多个方形凹槽,实现小尺寸方形晶圆的批量处理,显著提高生产效率,凹槽数量可根据实际需要设计2、6或8个凹槽布局,适应不同批量生产需求。核心是重心对称分布。

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Abstract

The utility model discloses square wafer multi -piece synchronous developing carrier device, including uniform glue carrier and square crystal, a plurality of recesses are seted up on the uniform glue carrier, a plurality of recesses are with uniform glue carrier center as central axis symmetry distribution, square crystal with recess shape is compatible, the utility model discloses in order to can handle a plurality of small size square tellurium cadmium mercury crystal one time, and the device is through with uniform glue carrier center as central axis, and the recess of a plurality of recesses is seted up, and the size of recess is identical with the size of square crystal, and the design of multiple recesses is integrated: a plurality of square recesses are symmetrically distributed on the circular carrier, realize the batch processing of small size square wafer, improve production efficiency significantly, and the number of recesses can be designed 2, 6 or 8 recesses layout according to actual needs, and different batch production needs are adapted. The core is gravity symmetry distribution.
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Description

Technical Field

[0001] This utility model relates to the field of wafer photolithography and development technology, and in particular to a device for simultaneous development of multiple square wafers on a carrier disk. Background Technology

[0002] Semiconductor photolithography development is a crucial step in the patterning process, aiming to transform the latent image in the exposed photoresist into a visible pattern. The development process is essentially a chemical dissolution reaction, where the developer selectively dissolves the photoresist in exposed (positive) or unexposed (negative) areas, thereby transferring the pattern from the mask to the wafer surface. A typical development process includes: pre-wetting to improve the uniformity of developer coverage; developer application via spraying or spin coating; development reaction to complete photoresist dissolution within a specified time; cleaning to remove residual developer and reaction products; and drying via spin drying or nitrogen blowing.

[0003] Currently, the development of square mercury cadmium telluride (MCH) wafers mainly uses a semi-automatic rotary developing machine. The workflow is as follows: manual loading onto the rotary table → vacuum adsorption → programmed development (placement, dripping developer, low-speed rotation to cover, static development, high-speed rotation to remove developer, water washing, and spin drying) → desorption → manual removal of the wafer. A single wafer typically has only 1 to 6 detector chips. Traditional semi-automatic rotary developing machines can only process one wafer at a time, resulting in low production efficiency. This invention addresses the shortcomings of existing technologies by providing a multi-wafer synchronous developing tray device specifically designed for small-sized square MCH wafers. Utility Model Content

[0004] The purpose of this invention is to provide a square wafer multi-wafer synchronous development carrier device to overcome the above-mentioned shortcomings in the prior art.

[0005] To achieve the above objectives, the present invention adopts the following technical solution: a square wafer multi-wafer synchronous development carrier device, comprising a spin coater and a square wafer, wherein the spin coater has multiple grooves, the multiple grooves are symmetrically distributed about the center of the spin coater, and the square wafer is adapted to the shape of the grooves.

[0006] As a further description of the above technical solution: the depth of the groove is set to be 0.8 to 1.2 mm, and the peripheral gap between the groove and the square wafer is set to be 0.3 to 0.5 mm.

[0007] As a further description of the above technical solution: the groove has a circular arc area at its diagonal, and the radius of curvature of the circular arc area is R=0.5-2mm.

[0008] As a further description of the above technical solution: the spin coating carrier is provided with a plurality of guide grooves, the number of guide grooves being the same as the number of grooves, one end of the guide groove penetrating and connecting to a corner of the groove, and the other end of the guide groove penetrating the edge of the spin coating carrier.

[0009] As a further description of the above technical solution: the homogenized carrier disk is provided with multiple microporous vacuum adsorption structures, and the multiple microporous vacuum adsorption structures are located at the center of the groove.

[0010] As a further description of the above technical solution: the microporous vacuum adsorption structure is composed of multiple adsorption pores with a diameter of 5.0 mm.

[0011] This invention provides a device for simultaneous development of multiple square wafers. It offers the following advantages: To process multiple small-sized square mercury cadmium telluride wafers at once, this device features multiple grooves symmetrically distributed around the center of the coating carrier. The size of each groove matches the size of the square wafer. This multi-groove integrated design—with multiple square grooves symmetrically distributed on the circular carrier—achieves batch processing of small-sized square wafers, significantly improving production efficiency. The number of grooves can be designed in a layout of 2, 6, or 8 grooves to adapt to different batch production needs. The core principle is the symmetrical distribution of the center of gravity.

[0012] It should be understood that the foregoing general description and the following detailed description are exemplary and illustrative only, and are not intended to limit this disclosure.

[0013] This application provides an overview of various implementations or examples of the technology described in this disclosure, and is not a full disclosure of the entire scope or all features of the disclosed technology. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of the overall structure of the square wafer multi-wafer synchronous developing carrier disk device proposed in this utility model.

[0015] Figure 2 This is a schematic diagram of the structure of a single groove in this utility model.

[0016] Legend:

[0017] 1. Coating carrier disk; 2. Square round crystal; 3. Groove; 4. Arc area; 5. Guide groove; 6. Microporous vacuum adsorption structure. Detailed Implementation

[0018] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present utility model. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments.

[0019] Reference Figure 1-2 A multi-wafer synchronous developing carrier device for square wafers includes a spin coater 1 and square wafers 2. The spin coater 1 has multiple grooves 3 symmetrically distributed about the center of the spin coater 1. The shape of the square wafers 2 matches the shape of the grooves 3. To process multiple small-sized square mercury cadmium telluride wafers at once, this device integrates multiple grooves 3 symmetrically distributed about the center of the spin coater 1. The size of the grooves 3 is the same as the size of the square wafers 2. The integrated design of multiple grooves 3—symmetrically distributed on a circular carrier—enables batch processing of small-sized square wafers, significantly improving production efficiency. The number of grooves 3 can be designed in a layout of 2, 6, or 8 grooves 3 to adapt to different batch production needs. The core principle is symmetrical distribution of the center of gravity.

[0020] As a preferred technical solution in this embodiment, the depth of the groove 3 is set to 0.8-1.2mm, and the peripheral gap between the groove 3 and the square wafer 2 is set to 0.3-0.5mm. The depth of the groove 3 is slightly greater than the thickness of the wafer, and the plane of the carrier disk is flush with or slightly lower than the plane of the wafer by 0.1mm. At the same time, the peripheral dimension of the groove 3 is 0.3-0.5mm larger than the square wafer, which ensures that the wafer can be placed smoothly and avoids excessive gaps from affecting the flow of the developer.

[0021] As a preferred technical solution in this embodiment, the groove 3 has a diagonal arc area 4, and the radius of curvature of the arc area 4 is R=0.5-2mm; the design of the diagonal arc area 4 of the groove 3 facilitates the operation of automated picking and placing equipment and reduces damage from manual operation.

[0022] As a preferred technical solution in this embodiment, the spin coater 1 is provided with a plurality of guide grooves 5, the number of guide grooves 5 being the same as the number of grooves 3. One end of the guide groove 5 passes through and connects to one corner of the groove 3, and the other end of the guide groove 5 passes through the edge of the spin coater 1. There are drainage grooves at the edge of the groove 3 to facilitate the removal of solutions such as developer that remain in the groove 3 during the spin drying process, ensuring that no solution remains after the operation is completed.

[0023] As a preferred technical solution in this embodiment, the spin coating carrier 1 is provided with a plurality of microporous vacuum adsorption structures 6, which are located at the center of the groove 3; when the vacuum system is started, all wafers are simultaneously adsorbed and fixed to ensure that the square wafer 2 does not shift during high-speed rotation.

[0024] As a preferred technical solution in this embodiment, the microporous vacuum adsorption structure 6 is composed of multiple adsorption pores, and the diameter of the adsorption pores is set to 5.0 mm.

[0025] General working principle:

[0026] In use, the device uses a robotic arm or tweezers to grasp the diagonal corners of the wafers and places the mercury cadmium telluride wafers sequentially into the carrier tray grooves 3. The rounded areas 4 at the diagonals are designed to accommodate the extra volume held by the robotic arm or tweezers. Then, the microporous vacuum adsorption structure 6 is activated, and the square wafers are uniformly adsorbed into the grooves 3, thus fixing the square wafers 2. Next, the developing operation is performed. During the high-speed rotation to remove the developer, the guide channel 5 is responsible for swinging out any residual developer or other solutions in the grooves 3 during the spin-drying process, ensuring that no solution remains after the operation. Finally, after rinsing with deionized water and high-speed spin-drying, the vacuum is released, and the square wafers 2 can be removed again by the robotic arm or tweezers.

[0027] In the description of this specification, references to terms such as "an embodiment," "example," "specific example," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0028] The above description is only a preferred embodiment of the present utility model, but the protection scope of the present utility model is not limited thereto. Any equivalent substitutions or changes made by those skilled in the art within the technical scope disclosed in the present utility model, based on the technical solution and the inventive concept of the present utility model, should be included within the protection scope of the present utility model.

Claims

1. A multi-wafer synchronous development carrier device for square wafers, comprising a spin coating carrier (1) and square wafers (2), characterized in that: The homogenizing carrier (1) has multiple grooves (3) which are symmetrically distributed about the center of the homogenizing carrier (1). The square round crystal (2) is adapted to the shape of the grooves (3).

2. The square wafer multi-wafer synchronous development carrier device according to claim 1, characterized in that, The depth of the groove (3) is set to 0.8-1.2mm, and the peripheral gap between the groove (3) and the square round crystal (2) is set to 0.3-0.5mm.

3. The square wafer multi-wafer synchronous development carrier device according to claim 2, characterized in that, The groove (3) has a circular arc area (4) at its diagonal, and the radius of curvature of the circular arc area (4) is R=0.5-2mm.

4. The square wafer multi-wafer synchronous development carrier device according to claim 2, characterized in that, The spin coater (1) has multiple guide grooves (5) with the same number of grooves (3). One end of the guide groove (5) passes through and connects to one corner of the groove (3), and the other end of the guide groove (5) passes through the edge of the spin coater (1).

5. The square wafer multi-wafer synchronous development carrier device according to claim 4, characterized in that, The homogenized carrier disk (1) is provided with multiple microporous vacuum adsorption structures (6), and the multiple microporous vacuum adsorption structures (6) are located at the center of the groove (3).

6. The square wafer multi-wafer synchronous development carrier device according to claim 5, characterized in that, The microporous vacuum adsorption structure (6) consists of multiple adsorption pores with a diameter of 5.0 mm.