Clock time-provisioning device

Abstract

This application discloses a clock synchronization device, relating to the field of time and frequency technology, comprising: a clock synchronization component for receiving a time signal transmitted by a clock source; a clock timing component connected to the clock synchronization component and having a built-in atomic clock for taming the atomic clock and outputting a timing signal corresponding to the time signal; a network clock synchronization component connected to the clock timing component for outputting the timing signal to a device to be calibrated; and a power supply component, including a lithium battery and a charging / powering interface, connected to the clock synchronization component, the clock timing component, and the network clock synchronization component respectively, to provide power to the clock synchronization device. This achieves convenient and accurate time synchronization.

Description

Technical Field

[0001] This utility model relates to the field of time and frequency technology, and in particular to clock timing devices. Background Technology

[0002] With the rise of high-frequency trading and algorithmic trading, most securities and futures companies are quite sensitive to trading latency in their clients' environments. To minimize trading latency, the optimal solution, due to geographical proximity, is to lease server racks in securities or futures exchange data centers.

[0003] Currently, many algorithmic strategies need to synchronize with the exchange's time. However, most exchange data centers have extremely limited antennas for GPS (Global Positioning System) or BeiDou timing. As more and more companies move into exchange data centers, most securities firms or futures companies do not have these antenna resources, and even if they do, the cost is very high.

[0004] However, most existing clock synchronization devices are 1U chassis-type clock servers. Their advantage is that they have enough space to support a wider variety of input / output interfaces. A small number use PCIe (Peripheral Component Interconnect Express) cards as timekeeping cards. The common drawback of both is that the former requires direct external AC power, while the latter relies on PCIe interface server equipment, which in turn requires AC power from the data center. Therefore, both types of clock synchronization devices can only be used in a data center, and GPS or BeiDou synchronization requires the data center to provide an external antenna.

[0005] In summary, how to achieve convenient and accurate time synchronization is a problem that needs to be solved in this field. Utility Model Content

[0006] In view of this, the purpose of this utility model is to provide a clock synchronization device to achieve convenient and accurate time synchronization. The specific solution is as follows:

[0007] This application discloses a clock timing device, including:

[0008] A clock timing component used to receive time signals sent by a clock source;

[0009] A clockkeeping component connected to the clock timing component and having a built-in atomic clock, used to tame the atomic clock and output a timing signal corresponding to the time signal;

[0010] A network clock synchronization component connected to the clock timing component is used to output the timing signal to the device to be calibrated;

[0011] The power supply component, which is connected to the clock timing component, the clock timekeeping component, and the network clock synchronization component respectively, includes a lithium battery and a charging and power supply interface to provide power to the clock timing device.

[0012] Optionally, the clock timing component includes:

[0013] GNSS antenna interface, used to receive radio signals transmitted by a satellite clock source;

[0014] A GPS module connected to the GNSS antenna interface, used to receive the radio signals and output the time signal and synchronization pulse signal.

[0015] Optionally, the atomic clock built into the clock keeping component is connected to the GPS module in the clock timing component.

[0016] Optionally, the network clock synchronization component includes a field-programmable gate array (FPGA); wherein the FPGA has a built-in time synchronization component for receiving the timing signal and a protocol conversion component for converting the timing signal.

[0017] Optionally, the network clock synchronization component further includes an external connection interface connected to the protocol conversion component; the external connection interface includes:

[0018] Several interfaces used to output converted timing signals corresponding to various time protocols;

[0019] Several frequency output ports for outputting the system clock signal in the timing signal.

[0020] Optionally, the charging and power supply interface is connected to the lithium battery, the clock timing component, the clock timekeeping component, and the network clock synchronization component, respectively, and is used to charge the lithium battery or provide power to the clock timing device.

[0021] Optionally, the lithium battery is connected to the clock timing component, the clock keeping component, and the network clock synchronization component, respectively, and is used to provide power to the clock timing device.

[0022] Optionally, the clock timing device further includes:

[0023] Configuration component connected to the network clock synchronization component via a communication interface.

[0024] Optionally, the configuration component includes:

[0025] Ethernet interface used to receive configuration commands;

[0026] A microcontroller unit that connects to the network clock synchronization component via a communication interface and is used to execute the configuration commands to configure the parameters of the clock timing component and the clock timekeeping component.

[0027] Optionally, the clock timing device may also include a rectangular housing.

[0028] The beneficial effects of this application are as follows: This application includes a clock timing component for receiving time signals sent by a clock source; a clock keeping component connected to the clock timing component and having a built-in atomic clock for taming the atomic clock and outputting a timing signal corresponding to the time signal; a network clock synchronization component connected to the clock keeping component for outputting the timing signal to the device to be calibrated; and a power supply component connected to the clock timing component, the clock keeping component, and the network clock synchronization component respectively, including a lithium battery and a charging / powering interface, to provide power to the clock timing device. Therefore, this application, by setting up a clock timing component, a clock keeping component with a built-in atomic clock, a network clock synchronization component, and a power supply component containing a lithium battery and charging / powering interface, with each component connected sequentially and powered uniformly by the power supply component, firstly, uses the clock timing component to accurately receive the time signal sent by the clock source, providing a reliable initial time reference for subsequent high-precision timing; secondly, the clock keeping component is connected to the clock timing component and has a built-in atomic clock, used to tame the atomic clock and output the timing signal corresponding to the time signal. That is, by utilizing the high stability and low drift characteristics of the atomic clock itself, the generated timing signal has both extremely high time accuracy and long-term stability, effectively avoiding the defect of rapid decrease in timing accuracy after disconnection from the external clock source caused by the use of ordinary crystal oscillators, ensuring that the device can continue to output high-precision timing signals even when disconnected from the external clock source; then, the network clock synchronization component stably outputs this high-precision timing signal to the device to be calibrated, realizing the calibration of multiple types of devices. The device achieves precise time synchronization, meeting the diverse time synchronization accuracy requirements of devices to be calibrated in different scenarios. Simultaneously, the power supply component employs a combination design of lithium battery and charging / powering interface. The lithium battery can operate independently of an external fixed power supply to continuously power the core components of the device, while the charging / powering interface can both charge the lithium battery to ensure the device's battery life and directly power the device to adapt to different usage scenarios. Compared to traditional time synchronization devices that rely on fixed AC power supplies in data centers, this device offers significant portability and can be flexibly applied to various scenarios such as outdoor time synchronization, data center deployment, and mobile time synchronization. It achieves an integrated function of "outdoor acquisition of standard time for atomic clock calibration + continuous accurate time synchronization in data centers / mobile scenarios." Furthermore, the various components work together to form a complete closed loop of "time reception - high-precision timekeeping - synchronous output - stable power supply," which improves the device's timing accuracy, stability, and environmental adaptability, simplifies the usage process, and reduces deployment costs and maintenance difficulties in different scenarios. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0030] Figure 1 This is a schematic diagram of a clock timing device disclosed in this application;

[0031] Figure 2 This is a schematic diagram of a power supply for a device disclosed in this application;

[0032] Figure 3 This is a schematic diagram of the housing of a clock timing device disclosed in this application;

[0033] Figure 4 This is a schematic diagram of a specific clock timing device disclosed in this application. Detailed Implementation

[0034] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this utility model.

[0035] With the rise of high-frequency trading and algorithmic trading, most securities and futures companies are quite sensitive to trading latency in their clients' environments. To minimize trading latency, the optimal solution, due to geographical proximity, is to lease server racks in securities or futures exchange data centers.

[0036] Currently, many algorithmic strategies require time synchronization with the exchange's time. However, most exchange data centers have extremely limited antennas for GPS or BeiDou timing. As more and more companies move into exchange data centers, most securities firms or futures companies do not have these antenna resources, and even if they do, the cost is very high.

[0037] However, most existing clock synchronization devices are 1U chassis-type clock servers. Their advantage is that they have enough space to support a wider variety of input / output interfaces, while a small number use PCIe cards as timekeeping cards. The common drawback of both is that the former requires direct external AC power, while the latter relies on PCIe interface server equipment, which in turn requires AC power from the data center. Therefore, both types of clock synchronization devices can only be used in a data center, and GPS or BeiDou synchronization requires the data center to provide an external antenna.

[0038] Therefore, this application provides a convenient and accurate time synchronization solution.

[0039] See Figure 1 As shown in the figure, this application discloses a clock timing device, including:

[0040] Clock timing component 11 for receiving time signals sent by a clock source.

[0041] A clockkeeping component 12, which is connected to the clock timing component 11 and has a built-in atomic clock 121, is used to tame the atomic clock 121 and output a timing signal corresponding to the time signal.

[0042] The network clock synchronization component 13, which is connected to the clock timing component 12, is used to output the timing signal to the device to be calibrated.

[0043] The power supply component 14, which is connected to the clock timing component 11, the clock timekeeping component 12 and the network clock synchronization component 13 respectively, includes a lithium battery 141 and a charging and power supply interface 142 to provide power to the clock timing device.

[0044] In this embodiment, the clock timing component includes: a GNSS antenna interface for receiving radio signals transmitted by a satellite clock source; and a GPS module connected to the GNSS antenna interface for receiving the radio signals and outputting the time signal and synchronization pulse signal.

[0045] The clock synchronization component, as the core hardware module of the clock synchronization device, receives external standard time signals. Its structure includes an external physical interface (GNSS - Global Navigation Satellite System) antenna interface and a built-in signal processing core (GPS - Global Positioning System) module. The GNSS antenna interface is a standardized external interface used to physically connect to external satellite antennas (such as GPS / BeiDou dual-mode antennas) and establish a signal transmission channel. It is specifically adapted to high-frequency radio signals (such as GPS signals) transmitted by satellite clock sources. To meet the reception requirements of the L1 band (1575.42MHz) and the Beidou B1 band (1561.098MHz), this interface establishes a fixed electrical connection with the GPS module through the internal signal line of the device, forming a signal transmission path of "external antenna-interface-module". The GPS module, as the core hardware for signal processing, integrates functional circuits such as low-noise amplification, down-conversion, demodulation, and data parsing. Its signal input end is directly connected to the signal output end of the GNSS antenna interface to receive the raw radio signals transmitted by the GNSS antenna interface. Through internal circuitry, the high-frequency radio signals are first converted into intermediate-frequency electrical signals, and then demodulated to extract key data such as satellite ephemeris and timestamps. Finally, it is parsed to generate time signals (such as UTC time data, including year, month, day, hour, minute, and second information) and synchronization pulse signals (such as 1PPS second pulse signal, with the rising edge precisely aligned with the UTC integer second, achieving nanosecond-level accuracy) that can be directly used by the device.

[0046] As can be seen, through the hardware construction and direct electrical connection design of the GNSS antenna interface and GPS module, stable reception and accurate conversion of satellite clock source radio signals are achieved, ensuring high-precision output of time signals and synchronization pulse signals, and providing a reliable reference for atomic clock calibration and discipline. The standardized design of the GNSS antenna interface is compatible with various satellite antennas, improving equipment compatibility. The integrated signal processing function of the GPS module simplifies the component structure and reduces signal transmission loss. The two work together to ensure the signal reception reliability and processing efficiency of the clock timing component, solving the problems of inaccurate time reference acquisition and unstable signal transmission in traditional timing equipment.

[0047] In this embodiment, the atomic clock built into the clock keeping component is connected to the GPS module in the clock timing component.

[0048] The clock timing component has a built-in atomic clock, and the signal output terminal of the GPS module in the clock timing component is electrically connected to the atomic clock of the clock timing component. The GPS module is used to transmit two types of signals, time signal and synchronization pulse signal, to the atomic clock to complete calibration and training.

[0049] In this embodiment, the network clock synchronization component includes a field-programmable gate array (FPGA); wherein the FPGA has a built-in time synchronization component for receiving the timing signal and a protocol conversion component for converting the timing signal.

[0050] The core hardware of the network clock synchronization component is a Field Programmable Gate Array (FPGA). This FPGA, as an integrated hardware processing unit, establishes a signal transmission channel with the atomic clock of the clock-keeping component through fixed internal electrical connections. Its signal input is directly connected to the atomic clock's signal output, specifically for receiving the high-precision timing signal (including second pulse signals and a 10MHz system clock signal) generated by the calibrated and disciplined atomic clock. The FPGA continuously outputs high-precision and stable PPS signal and other frequency square wave signals.

[0051] The FPGA integrates a time synchronization component and a protocol conversion component via hardware logic circuitry. These are interconnected functional modules within the FPGA chip, interacting and cooperating through an internal bus. The input of the time synchronization component is connected to the FPGA's external signal receiving port, precisely capturing the timing signal output from the atomic clock and outputting it as a stable time base signal to provide a unified and high-precision signal source for subsequent protocol conversion. The input of the protocol conversion component is connected to the output of the time synchronization component via an internal logic link. This component integrates hardware processing logic for PTP (Precision Time Protocol) and NTP (Network Time Protocol), receiving the timing signal output from the time synchronization component and outputting it as a synchronization message conforming to the PTP or NTP protocol specifications, thus completing time synchronization services for different protocol types.

[0052] By using an FPGA as the core hardware of the network clock synchronization component, and integrating it with built-in time synchronization and protocol conversion components, high-precision reception, conditioning, and protocol conversion of timing signals are achieved in a unified manner. The hardware connection adopts a direct electrical connection and internal bus interaction design to reduce signal transmission delay and loss. The programmability of the FPGA can flexibly adapt to different protocol standards and frequency requirements, and the protocol conversion component achieves multi-protocol compatible output. The three work together to improve the signal processing efficiency, adaptability, and synchronization accuracy of the network clock synchronization component, solving the problems of traditional synchronization components such as single protocol, poor compatibility, and large signal processing delay, and meeting the differentiated time synchronization needs of various types of devices to be calibrated.

[0053] In this embodiment, the network clock synchronization component further includes an external association interface connected to the protocol conversion component; the external association interface includes: several interfaces for outputting converted timing signals corresponding to each time protocol; and several frequency output ports for outputting the system clock signal in the timing signal.

[0054] The network clock synchronization component also includes an external connection interface, which connects to the protocol conversion component. The external connection interface includes several interfaces for outputting the converted timing signals corresponding to various time protocols, such as the NTP interface and PTP interface corresponding to the converted timing signals corresponding to NTP (Network Time Protocol) and PTP (Precision Time Protocol), respectively. The external connection interface also includes several frequency output ports (Freq_out) for outputting the system clock signal in the timing signal, thus meeting the time synchronization service requirements of different frequencies.

[0055] In this embodiment, the charging and power supply interface is connected to the lithium battery, the clock timing component, the clock timekeeping component, and the network clock synchronization component, respectively, and is used to charge the lithium battery or provide power to the clock timing device.

[0056] The charging and power supply interface adopts an integrated Type-C interface structure, serving as a standardized power interaction interface for the device. Its hardware structure includes a first power pin, a second power pin, and a reverse connection protection circuit. The first power pin is connected via independent internal power supply lines to the first power input terminals of the clock timing component, the clock timekeeping component, and the network clock synchronization component, forming a power transmission network of "interface - internal power supply lines - various components." For example... Figure 2 As shown, the second power pin of the charging power interface can be connected to the power input terminal of the lithium battery, thereby forming a charging power interface and a lithium battery charging circuit, that is, charging the lithium battery through the charging power interface. Furthermore, the input terminal of the charging power interface can be connected to a portable, portable power bank or a fixed power source that can provide AC power.

[0057] In this embodiment, the lithium battery is connected to the clock timing component, the clock timekeeping component, and the network clock synchronization component, respectively, and is used to provide power to the clock timing device.

[0058] like Figure 2As shown, the power pins of the lithium battery are connected to the second power input terminals of the clock timing component, the clock timekeeping component, and the network clock synchronization component, respectively, thus forming a lithium battery power supply circuit. In other words, when the lithium battery is in good charge condition, it can directly supply power to each component, thereby improving the portability of the clock timing device.

[0059] It is important to note that if the server room cannot provide an antenna, the lithium battery can be pre-charged via the charging interface or the clock synchronization device can be directly powered. Outdoors, the clock synchronization device directly receives radio signals from the satellite clock source through the GNSS antenna interface. The GPS module receives the radio signals and outputs time signals and synchronization pulse signals. The clock timing component tames the atomic clock and outputs the timing signal corresponding to the time signal. Next, after the device is disconnected from the antenna, the GPS signal is lost, but the tamed atomic clock generates a stable PPS signal, enabling the time-sync module inside the FPGA to complete the high-precision timekeeping function. In other words, when the clock synchronization device is deployed in the server room, the lithium battery continuously provides power to the clock synchronization device, or a power bank can be connected to the charging interface to charge the lithium battery or directly power the clock synchronization device, thereby supporting the network clock synchronization component to synchronize time with other devices.

[0060] Alternatively, in this embodiment, the clock synchronization device may further include a configuration component connected to the network clock synchronization component via a communication interface. In other words, the clock synchronization device also includes a configuration component connected to the network clock synchronization component via a communication interface. The configuration module configures various components within the FPGA of the network clock synchronization component, such as output format and frequency, and supports configuration methods such as SSH (Secure Shell) and web (World Wide Web).

[0061] In this embodiment, the configuration component includes: an Ethernet interface for receiving configuration commands; and a microcontroller unit connected to the network clock synchronization component via a communication interface for executing the configuration commands to configure parameters of the clock timing component and the clock timekeeping component.

[0062] The configuration component, as the core control and configuration module of the clock synchronization device, consists of an Ethernet interface (using GE Gigabit Ethernet interface specifications) for external data interaction and an MCU (Microcontroller Unit). The Ethernet interface is a standardized network physical interface with gigabit bandwidth transmission capability. Its data pins establish a wired network connection with external configuration terminals (such as computers or servers) through the device's internal network transmission lines, specifically for receiving externally input configuration commands, such as atomic clock calibration periods, GPS module signal reception parameters, PTP / NTP protocol types, and Freq_out interface output frequencies. It also supports bidirectional transmission and feedback of configuration commands. The MCU, as the core processing hardware of the configuration component, integrates data parsing, instruction execution, and multi-component communication control functions. It establishes a fixed electrical connection with the FPGA of the network clock synchronization component through a communication interface, forming a "MCU-communication interface-FPGA" control signal transmission channel. Simultaneously, the MCU establishes signal connections with the GPS module of the clock synchronization component and the atomic clock of the clock timekeeping component through the device's internal control lines, enabling direct parameter configuration of each core component. When an external configuration terminal sends a configuration command via the Ethernet interface, the command is first received and transmitted to the MCU via the Ethernet interface. After parsing and processing the configuration command, the MCU executes the configuration instruction. On the one hand, it transmits part of the instruction to the FPGA via the communication interface, and on the other hand, it sends another part of the instruction directly to the clock timing component and the clock timekeeping component via the internal control circuit, driving the corresponding hardware module to perform parameter adjustment. At the same time, the MCU will collect the parameter configuration results and working status of each component in real time and feed them back to the external configuration terminal via the Ethernet interface, forming a complete "command reception-parsing-execution-feedback" configuration closed loop.

[0063] In this embodiment, the clock timing device also includes a rectangular housing.

[0064] The clock timing device adopts a rectangular box design, meaning its exterior is a rectangular shell with a length, width, and height ratio of 18:10:5. All external interfaces and buttons are located on the front panel. Figure 3 As shown, the front panel includes a device power switch (PWR) button, a Type-C interface, a PTP interface, an NTP interface, several frequency output ports (Freq_out), a GNSS antenna interface, and an Ethernet interface (Gigabit Ethernet, i.e., GE).

[0065] The beneficial effects of this application are as follows: This application includes a clock timing component for receiving time signals sent by a clock source; a clock keeping component connected to the clock timing component and having a built-in atomic clock for taming the atomic clock and outputting a timing signal corresponding to the time signal; a network clock synchronization component connected to the clock keeping component for outputting the timing signal to the device to be calibrated; and a power supply component connected to the clock timing component, the clock keeping component, and the network clock synchronization component respectively, including a lithium battery and a charging / powering interface, to provide power to the clock timing device. Therefore, this application, by setting up a clock timing component, a clock keeping component with a built-in atomic clock, a network clock synchronization component, and a power supply component containing a lithium battery and charging / powering interface, with each component connected sequentially and powered uniformly by the power supply component, firstly, uses the clock timing component to accurately receive the time signal sent by the clock source, providing a reliable initial time reference for subsequent high-precision timing; secondly, the clock keeping component is connected to the clock timing component and has a built-in atomic clock, used to tame the atomic clock and output the timing signal corresponding to the time signal. That is, by utilizing the high stability and low drift characteristics of the atomic clock itself, the generated timing signal has both extremely high time accuracy and long-term stability, effectively avoiding the defect of rapid decrease in timing accuracy after disconnection from the external clock source caused by the use of ordinary crystal oscillators, ensuring that the device can continue to output high-precision timing signals even when disconnected from the external clock source; then, the network clock synchronization component stably outputs this high-precision timing signal to the device to be calibrated, realizing the calibration of multiple types of devices. The device achieves precise time synchronization, meeting the diverse time synchronization accuracy requirements of devices to be calibrated in different scenarios. Simultaneously, the power supply component employs a combination design of lithium battery and charging / powering interface. The lithium battery can operate independently of an external fixed power supply to continuously power the core components of the device, while the charging / powering interface can both charge the lithium battery to ensure the device's battery life and directly power the device to adapt to different usage scenarios. Compared to traditional time synchronization devices that rely on fixed AC power supplies in data centers, this device offers significant portability and can be flexibly applied to various scenarios such as outdoor time synchronization, data center deployment, and mobile time synchronization. It achieves an integrated function of "outdoor acquisition of standard time for atomic clock calibration + continuous accurate time synchronization in data centers / mobile scenarios." Furthermore, the various components work together to form a complete closed loop of "time reception - high-precision timekeeping - synchronous output - stable power supply," which improves the device's timing accuracy, stability, and environmental adaptability, simplifies the usage process, and reduces deployment costs and maintenance difficulties in different scenarios.

[0066] The following is based on Figure 4 Taking a specific clock synchronization device as an example, this application will be described accordingly. First, the clock synchronization device specifically includes a clock synchronization component, a clock timekeeping component, a network clock synchronization component, a power supply component, and a configuration component.

[0067] The clock timing component includes a GNSS antenna interface and a GPS module. The GNSS antenna interface is used to receive radio signals transmitted by a satellite clock source, and the GPS module is connected to the GNSS antenna interface and is used to receive radio signals and output time signals and synchronization pulse signals.

[0068] The clock timing component has a built-in atomic clock, which is connected to the GPS module. After the atomic clock is tamed, it is used to output the timing signal corresponding to the time signal.

[0069] The network clock synchronization component can connect not only to the GPS module in the clock timing component, but also to the clock keeping component. The network clock synchronization component includes a field-programmable gate array (FPGA), which integrates a time synchronization component, a protocol conversion component (i.e., an IP / NTP IP core), a microcontroller (UM), and several external interfaces. The time synchronization component receives timing signals, the protocol conversion component converts the timing signals, and the external interfaces include several interfaces for outputting converted timing signals corresponding to various time protocols, and several frequency output ports (Freq_out) for outputting the system clock signal from the timing signals. Freq_out represents different frequency output interfaces, so the FPGA's time synchronization module can output four different frequency timing signals to the device to be calibrated. The network clock synchronization component can achieve network time synchronization between external devices and the local device in a time-division multiplexing mode, supporting both PTP and NTP modes.

[0070] The configuration component is connected to the network clock synchronization component via a communication interface. The configuration component includes an Ethernet interface (GE) and a microcontroller unit (MCU). The Ethernet interface receives configuration commands, and the microcontroller unit is connected to the network clock synchronization component via the communication interface and is used to execute configuration commands to configure the parameters of the clock timing component and the clock timekeeping component.

[0071] The power supply components include a charging interface and a lithium battery. The charging interface connects to the lithium battery, the clock synchronization component, the clock timekeeping component, the network clock synchronization component, and the configuration component. This allows the lithium battery to be charged via the charging interface, and also provides power to the clock synchronization device. The lithium battery connects not only to the charging interface but also to the clock synchronization component, the clock timekeeping component, the network clock synchronization component, and the configuration component, providing power to the clock synchronization device. Thus, the clock synchronization device can be directly connected to AC power for time synchronization, or it can achieve time synchronization via the lithium battery, improving portability.

[0072] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0073] The present invention provides a detailed description of a clock timing device. Specific examples have been used to illustrate the principle and implementation of the present invention. The description of the above embodiments is only intended to help understand the method and core idea of ​​the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation and application scope based on the idea of ​​the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A clock timing device, characterized in that, include: A clock timing component used to receive time signals sent by a clock source; A clockkeeping component connected to the clock timing component and having a built-in atomic clock, used to tame the atomic clock and output a timing signal corresponding to the time signal; A network clock synchronization component connected to the clock timing component is used to output the timing signal to the device to be calibrated; The power supply component, which is connected to the clock timing component, the clock timekeeping component, and the network clock synchronization component respectively, includes a lithium battery and a charging and power supply interface to provide power to the clock timing device.

2. The clock timing device according to claim 1, characterized in that, The clock timing component includes: GNSS antenna interface, used to receive radio signals transmitted by a satellite clock source; A GPS module connected to the GNSS antenna interface, used to receive the radio signals and output the time signal and synchronization pulse signal.

3. The clock timing device according to claim 2, characterized in that, The atomic clock built into the clock timekeeping component is connected to the GPS module in the clock timing component.

4. The clock timing device according to claim 3, characterized in that, The network clock synchronization component includes a field-programmable gate array (FPGA); wherein the FPGA has a built-in time synchronization component for receiving the timing signal and a protocol conversion component for converting the timing signal.

5. The clock timing device according to claim 4, characterized in that, The network clock synchronization component also includes an external connection interface connected to the protocol conversion component; the external connection interface includes: Several interfaces used to output converted timing signals corresponding to various time protocols; Several frequency output ports for outputting the system clock signal in the timing signal.

6. The clock timing device according to claim 1, characterized in that, The charging and power supply interfaces are respectively connected to the lithium battery, the clock timing component, the clock timekeeping component, and the network clock synchronization component, and are used to charge the lithium battery or provide power to the clock timing device.

7. The clock timing device according to claim 1, characterized in that, The lithium battery is connected to the clock timing component, the clock timekeeping component, and the network clock synchronization component, respectively, and is used to provide power to the clock timing device.

8. The clock timing device according to claim 1, characterized in that, Also includes: Configuration component connected to the network clock synchronization component via a communication interface.

9. The clock timing device according to claim 8, characterized in that, The configuration component includes: Ethernet interface used to receive configuration commands; A microcontroller unit that connects to the network clock synchronization component via a communication interface and is used to execute the configuration commands to configure the parameters of the clock timing component and the clock timekeeping component.

10. The clock timing device according to claim 1, characterized in that, The clock timing device also includes a rectangular housing.

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