A low standby power supply circuit

CN224818033UActive Publication Date: 2026-09-29SHANGHAI MOUSSA ELECTRONIC TECH CO LTD
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Patent Information

Application Number
CN202522338022.5
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-11-04
Publication Date
2026-09-29
Estimated Expiration
2035-11-04

AI Technical Summary

Technical Problem

但针对于开关管导通损耗,虽然改进方向明确——让开关管在漏极电压VDS最低(谷底)时开启,但实际应用中由于受电路延时或外部电磁干扰的影响,难以做到在VDS处于谷底时开启开关管

Benefits of technology

[0032]本申请方案可以使得开关管在更接近VDS谷底时开启,整体上降低电路待机功耗。

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a low standby power supply circuit, and belongs to the technical field of power supply circuits. A drain voltage sampling circuit for detecting the drain voltage of a switch tube is arranged in a primary side circuit. The drain voltage sampling circuit comprises a sampling signal input port arranged on a power management chip and used for controlling the opening state of the switch tube according to a sampling signal; a first sampling loop comprising a first voltage dividing circuit, one end of which is electrically connected with an auxiliary winding end portion, and the other end is grounded; a first sampling signal is connected from the first voltage dividing circuit and output to the sampling signal input port; and a second sampling loop comprising a sampling transformer and a second voltage dividing circuit, a primary winding of the sampling transformer being arranged in series between the drain of the switch tube and a primary side main winding, a secondary winding being grounded through the second voltage dividing circuit, and a second sampling signal being connected from the second voltage dividing circuit and output to the sampling signal input port. The above scheme can make the switch tube be closer to V DS bottom when being turned on, thereby reducing standby power consumption.
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Description

Technical Field

[0001] This application belongs to the field of power supply circuit technology and relates to a low standby power supply circuit. Background Technology

[0002] With increasing global focus on energy efficiency, reducing the power consumption of various electronic devices in standby mode has become a crucial requirement. Flyback switching power supplies, with their stable and efficient output characteristics, are commonly used in low-power (not exceeding 100W) power circuits for lighting, charging, and control applications.

[0003] Standby power consumption refers to the power consumed by the power supply itself when it is connected to the power grid but the main output is under no-load or very light-load conditions. This power is ultimately dissipated as heat. Through testing and analysis, for flyback switching power supplies, standby power consumption mainly originates from the primary-side startup circuit, power switching transistors, and RCD snubber circuit.

[0004] For startup circuits, traditional startup circuits typically consist of at least one high-resistance resistor (which charges the VCC capacitor during startup) connected from the DC bus voltage (approximately 300V DC) to the VCC pin of the power management chip. After startup, although the chip is powered by an auxiliary winding, the aforementioned resistor remains directly connected between the high voltage and ground, continuously generating current and creating a fixed conduction loss (I0). 2 For power switching transistors, even under no-load conditions, MOSFETs are constantly switching on and off. Each charge and discharge (Qg) of the MOSFET's gate capacitance (Cgs, Cgd) requires drive current, which is provided by the controller and ultimately comes from the input power supply. The RCD snubber circuit is used to absorb the high-voltage spikes generated by the transformer leakage inductance when the MOSFET is turned off. The resistor continuously absorbs the energy absorbed in the capacitor.

[0005] To address the energy consumption generated by the startup circuit, existing technologies have developed solutions integrating a high-voltage startup current source. When the power supply is first connected to the mains, the DC bus voltage is applied to the high-voltage current source inside the chip through the high-voltage startup pin. This current source immediately turns on, charging a capacitor outside the VCC pin from a constant current source, achieving rapid startup. The energy consumption generated by the RCD buffer circuit can also be addressed by optimizing the transformer design parameters. However, regarding the conduction loss of the switching transistor, although the direction for improvement is clear—making the switching transistor operate at a drain voltage V... DS It is supposed to turn on at the lowest (valley) level, but in practical applications, due to circuit delays or external electromagnetic interference, it is difficult to achieve this at V. DS The switching transistor is turned on when the valley is at its lowest point.

[0006] Based on the above analysis, how can we make the switching transistor closest to V? DSTurning on during the lowest point is key to reducing standby power consumption in power supply circuits. Utility Model Content

[0007] To address the issue of high standby power consumption in existing flyback power supply circuits, this application provides a low standby power consumption power supply circuit, specifically implemented using the following technical solution:

[0008] A low standby power consumption power supply circuit includes a primary side for connecting to mains power and a secondary side connected to a load. The primary side is configured with a drain voltage sampling circuit for detecting the drain voltage of a switching transistor. The primary side includes a rectifier input circuit, a high-voltage startup circuit, a PWM drive circuit, a spike suppression circuit, a control power supply circuit, a current detection feedback circuit, a secondary load feedback circuit, and the drain voltage sampling circuit. The drain voltage sampling circuit includes:

[0009] The sampling signal input port is located on the power management chip and is used to control the on-state of the switching transistor in the PWM drive circuit according to the sampling signal.

[0010] The first sampling circuit includes a first voltage divider circuit composed of at least two voltage divider resistors. One end of the voltage divider circuit is electrically connected to the end of the auxiliary winding, and the other end is grounded. A first sampling signal is output from the voltage divider resistors of the first voltage divider circuit and output to the sampling signal input port.

[0011] The second sampling circuit includes a sampling transformer and a second voltage divider circuit. The primary winding of the transformer is connected in series between the drain of the switching transistor and the primary winding. The secondary winding is grounded after passing through the second voltage divider circuit. The second sampling signal is output from the voltage divider resistor of the second voltage divider circuit and output to the sampling signal input port.

[0012] When the power supply voltage is operating normally, the sum of the maximum and minimum values ​​of the first and second sampled signals does not exceed the voltage threshold for triggering overvoltage or undervoltage protection in the power management chip.

[0013] Through the above technical solution, the first sampling circuit obtains a voltage reflection value after voltage division via the auxiliary winding on the primary side transformer. DS The first sampled signal in the oscillation pattern is obtained directly from the drain of the switching transistor in the second sampling circuit to reflect V. DS The second sampled signal exhibits an oscillating pattern. The first and second sampled signals are sequentially transmitted to the sampling signal input port. The voltage peak resulting from their superposition is located before the first sampled signal obtained through the traditional sampling method, i.e., the detected V... DS The time point at the bottom is closer to the actual value, and turning on the switching transistor at this time is more helpful in reducing the switching transistor's conduction energy consumption.

[0014] Furthermore, the first voltage divider circuit includes a first voltage divider resistor and a second voltage divider resistor;

[0015] One end of the first voltage divider resistor is electrically connected to the end of the auxiliary winding, and the other end is connected in series with the second voltage divider resistor and then grounded. The first sampling signal is output from between the first voltage divider resistor and the second voltage divider resistor.

[0016] A filter capacitor is also connected in reverse between the first voltage divider circuit and ground.

[0017] The above technical solution allows for the detection of drain current after voltage division via auxiliary winding, with grounding capacitor used for filtering to reduce interference and ensure the accuracy of the first sampling signal.

[0018] Furthermore, a grounded diode is connected in reverse to the first voltage divider circuit.

[0019] The above technical solution can absorb voltage spikes when the switching transistor is cut off.

[0020] Furthermore, a filter resistor is connected in series between the sampling signal input port and the filter capacitor.

[0021] Through the above technical solution, the RC filter circuit can further filter out high-frequency interference in the sampled signal.

[0022] Furthermore, the second voltage divider circuit includes a third voltage divider resistor and a fourth voltage divider resistor;

[0023] One end of the third voltage divider resistor is electrically connected to the end of the secondary winding of the sampling transformer, and the other end is connected in series with the fourth voltage divider resistor and then grounded. The second sampling signal is output from between the third voltage divider resistor and the fourth voltage divider resistor.

[0024] The above technical solution can quickly acquire the voltage at the drain of the switching transistor according to a set ratio.

[0025] Furthermore, the inductance of the secondary winding of the sampling transformer is less than the inductance of the auxiliary winding.

[0026] The above technical solution ensures that the second sampling signal is transmitted to the sampling signal input port before the first sampling signal.

[0027] Furthermore, the voltage ratio of the second sampled signal to the first sampled signal is not less than 1 / 5.

[0028] The above technical solution can ensure that the superposition of the first sampling signal and the second sampling signal has a voltage peak that can be accurately identified by the power management chip, and ensure that the superposition voltage value of the first sampling signal and the second sampling signal does not exceed the protection voltage threshold of the sampling signal input port.

[0029] Furthermore, the spike reduction circuit includes multiple resistors connected in parallel with the energy storage capacitor.

[0030] The above technical solution can be used to shunt the current using multiple resistors, thereby quickly converting the voltage spike into heat for reduction and preventing the voltage spike from affecting the sampling transformer.

[0031] This application includes at least one of the following beneficial effects:

[0032] The solution proposed in this application allows the switching transistor to operate closer to V. DS It activates when the circuit is at its lowest point, thus reducing overall standby power consumption. Attached Figure Description

[0033] Figure 1 This is a schematic diagram of the switching waveform when the drain of the switching transistor is turned on.

[0034] Figure 2 This is a schematic diagram of the circuit structure of this application. Detailed Implementation

[0035] The embodiments of this application are described in detail below, and examples of the embodiments are shown in the accompanying drawings.

[0036] In the description of this specification, the references to "certain embodiments," "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples" refer to specific features, structures, materials, or characteristics described in connection with the described embodiment or example, which are included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0037] Before describing the specific implementation method, it should be noted that the power management chip used in this application is the HY1662, which integrates an intelligent high-voltage startup current source through its 8th pin (HV pin). After startup is complete, the internal logic circuit of the chip immediately shuts down this high-voltage startup current source. Once the current source is shut down, the physical path from the high-voltage bus to the inside of the chip is completely cut off, and no current flows into the HV pin. Therefore, this application does not consider making any improvements to the startup circuit.

[0038] In flyback switching power supplies, turning on the transistor at the first (or second) trough of the drain voltage waveform can reduce switching losses. For example... Figure 1As shown. In practical applications, due to the influence of circuit transmission delay, the time it takes for the above-mentioned drain voltage detection signal to be transmitted to the sampling signal input port, i.e., the VMS pin of the HY1662 chip, is later than the actual time (approximately 45µs, which will be affected by the parameters of the sampling circuit components). The core of this application's solution is: how to move the above-mentioned drain voltage sampling signal forward. When the sum of the additional energy consumption generated for this and the switching power consumption is lower than the switching power consumption under the traditional method, the standby power consumption of the entire power supply circuit can be reduced.

[0039] like Figure 2 As shown, a low standby power consumption power supply circuit includes a primary side for connecting to mains power and a secondary side connected to a load. The primary side includes a drain voltage sampling circuit for detecting the drain voltage of a switching transistor. The primary side also includes a rectifier input circuit, a high-voltage startup circuit, a PWM drive circuit, a spike reduction circuit, a control power supply circuit, a current detection feedback circuit, a secondary load feedback circuit, and the drain voltage sampling circuit.

[0040] The rectifier input circuit includes an EMI filter circuit and a full-bridge rectifier circuit. The high-voltage start-up circuit consists of two start-up resistors, R1 and R2, connected in series. Figure 2 The load in the secondary load feedback circuit is for illustrative purposes only. In practice, the load can be configured as a synchronous rectifier controller or a lighting circuit, etc. The core feedback component of the secondary load feedback circuit is an optocoupler. The output terminal on the secondary side is connected to a voltage divider circuit, which is connected in series with the LED in the optocoupler and grounded. The signal output terminal of the optocoupler is electrically connected to the FB pin and GND pin of the power management chip. For the layout and connection methods of the other circuits, please refer to [reference needed]. Figure 2 The specific functions and connection methods of this technology have been widely disclosed in existing technologies, and will not be elaborated here.

[0041] like Figure 2 As shown in the embodiment of this application, the drain voltage sampling circuit includes: a sampling signal input port, a first sampling circuit, and a second sampling circuit.

[0042] In this embodiment, the sampling signal input port is directly configured as the VMS pin of the power management chip. The VMS pin of the HY1662 chip is connected to the auxiliary winding through a resistor divider network, mainly used to monitor the output voltage and implement overvoltage protection, undervoltage protection, and overload / output short-circuit protection. Simultaneously, it can also be used to detect the valley of the drain voltage, which is used to control the on-state of the switching transistor in the PWM drive circuit based on the sampling signal. The valley switching process is as follows:

[0043] Turn-off and energy transfer: When the switch is turned off, the primary-side drain voltage V DS Rising sharply to V in +Vor (Reflected voltage). Simultaneously, the transformer's energy begins to transfer to the secondary side; resonance begins: when the secondary-side rectifier diode current drops to zero (the transformer's energy is fully released), the leakage inductance on the primary side and the parasitic capacitance of the switching transistor begin to resonate, causing V... DS The voltage initially oscillates downwards in a sinusoidal pattern; sampling occurs at the VMS pin: the aforementioned oscillating voltage is proportionally amplified and presented on the VMS pin after passing through an auxiliary winding and a resistor divider. The HY1662 has an internal valley comparator for continuously monitoring the voltage at the VMS pin.

[0044] The first sampling circuit includes a first voltage divider circuit composed of at least two voltage divider resistors. One end of the voltage divider circuit is electrically connected to the end of the auxiliary winding, and the other end is grounded. A first sampling signal is output from the voltage divider resistors of the first voltage divider circuit and output to the sampling signal input port. Specifically, the first voltage divider circuit includes a first voltage divider resistor R3 and a second voltage divider resistor R4. One end of the first voltage divider resistor R3 is electrically connected to the end of the auxiliary winding, and the other end is connected in series with the second voltage divider resistor R4 and then grounded. The first sampling signal is output from between the first voltage divider resistor R3 and the second voltage divider resistor R4. A filter capacitor C4 is also connected in reverse to the first voltage divider circuit and ground. A grounded diode is connected in reverse to the first voltage divider circuit to absorb voltage spikes when the switching transistor is cut off. Furthermore, a filter resistor R5 is connected in series between the sampling signal input port and the filter capacitor C4. The RC filter circuit can further filter out high-frequency interference in the sampling signal.

[0045] The second sampling circuit includes a sampling transformer and a second voltage divider circuit. The primary winding of the transformer is connected in series between the drain of the switching transistor and the primary winding. The secondary winding is grounded after passing through the second voltage divider circuit. The second sampling signal is output from the voltage divider resistors of the second voltage divider circuit and then output to the sampling signal input port. Specifically, the second voltage divider circuit includes a third voltage divider resistor R7 and a fourth voltage divider resistor R8. One end of the third voltage divider resistor R7 is electrically connected to the end of the secondary winding of the sampling transformer, and the other end is connected in series with the fourth voltage divider resistor R8 and then grounded. The second sampling signal is output from between the third voltage divider resistor R7 and the fourth voltage divider resistor R8. The inductance of the secondary winding of the sampling transformer is less than the inductance of the auxiliary winding.

[0046] The optimized voltage ratio of the second sampling signal to the first sampling signal is not less than 1 / 5, to ensure that the superposition of the first and second sampling signals has a voltage peak that can be accurately identified by the power management chip, and to ensure that the superimposed voltage value of the first and second sampling signals does not exceed the protection voltage threshold of the sampling signal input port.

[0047] When configuring parameters, it is necessary to ensure that when the power supply voltage is working normally, the sum of the maximum and minimum values ​​of the first and second sampled signals does not exceed the voltage threshold that triggers overvoltage or undervoltage protection in the power management chip.

[0048] In order to quickly convert voltage spikes into heat and reduce them, and to prevent the voltage spikes from affecting the sampling transformer, the spike reduction circuit includes multiple resistors connected in parallel with the energy storage capacitor.

[0049] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application.

Claims

1. A low standby power consumption power supply circuit, comprising a primary side for connecting to mains power and a secondary side connected to a load, wherein the primary side includes a rectifier input circuit, a high-voltage start-up circuit, a PWM drive circuit, a spike reduction circuit, a control power supply circuit, a current detection feedback circuit, a secondary load feedback circuit, and a drain voltage sampling circuit for detecting the drain voltage of a switching transistor, characterized in that, The drain voltage sampling circuit includes: The sampling signal input port is located on the power management chip and is used to control the on-state of the switching transistor in the PWM drive circuit according to the sampling signal. The first sampling circuit includes a first voltage divider circuit composed of at least two voltage divider resistors. One end of the voltage divider circuit is electrically connected to the end of the auxiliary winding, and the other end is grounded. A first sampling signal is output from the voltage divider resistors of the first voltage divider circuit and output to the sampling signal input port. The second sampling circuit includes a sampling transformer and a second voltage divider circuit. The primary winding of the transformer is connected in series between the drain of the switching transistor and the primary winding. The secondary winding is grounded after passing through the second voltage divider circuit. The second sampling signal is output from the voltage divider resistor of the second voltage divider circuit and output to the sampling signal input port. When the power supply voltage is operating normally, the sum of the maximum and minimum values ​​of the first and second sampled signals does not exceed the voltage threshold for triggering overvoltage or undervoltage protection in the power management chip.

2. The low standby power consumption power supply circuit according to claim 1, characterized in that, The first voltage divider circuit includes a first voltage divider resistor and a second voltage divider resistor; One end of the first voltage divider resistor is electrically connected to the end of the auxiliary winding, and the other end is connected in series with the second voltage divider resistor and then grounded. The first sampling signal is output from between the first voltage divider resistor and the second voltage divider resistor. A filter capacitor is also connected in reverse between the first voltage divider circuit and ground.

3. The low standby power consumption power supply circuit according to claim 2, characterized in that, A grounded diode is connected in reverse to the first voltage divider circuit.

4. The low standby power consumption power supply circuit according to claim 3, characterized in that, A filter resistor is connected in series between the sampling signal input port and the filter capacitor.

5. The low standby power consumption power supply circuit according to claim 1, characterized in that, The second voltage divider circuit includes a third voltage divider resistor and a fourth voltage divider resistor; One end of the third voltage divider resistor is electrically connected to the end of the secondary winding of the sampling transformer, and the other end is connected in series with the fourth voltage divider resistor and then grounded. The second sampling signal is output from between the third voltage divider resistor and the fourth voltage divider resistor.

6. The low standby power consumption power supply circuit according to claim 5, characterized in that, The inductance of the secondary winding of the sampling transformer is less than the inductance of the auxiliary winding.

7. The low standby power consumption power supply circuit according to claim 1, characterized in that, The voltage ratio of the second sampled signal to the first sampled signal is not less than 1 / 5.

8. The low standby power consumption power supply circuit according to claim 1, characterized in that, The spike reduction circuit includes multiple resistors connected in parallel with the energy storage capacitor.