PFC circuit with multiple boost branches in parallel

Abstract

The utility model relates to the application field of switching power supply, in order to improve the reliability of switching power supply, provide multiple boost branch same phase parallel PFC circuit, through adopting multiple boost branch parallel, share a drive signal, realize same phase opening and closing, each boost branch is relatively independent, and the reliability factor such as device temperature rise is not influenced by the individual difference of other devices, thereby improved the reliability of switching power supply.

Description

Technical Field

[0001] This utility model relates to the field of switching power supply applications, specifically a PFC circuit with multiple boost branches connected in parallel in phase. Background Technology

[0002] In switching power supply design, due to the differences in solutions, the power adaptability range of conventional PFC boost solutions based on CCM, DCM, and CRM modes is relatively small. Although the output power can be expanded by connecting two devices in parallel, the differences in individual device characteristics lead to uneven current flow and large temperature differences, which affects reliability. Utility Model Content

[0003] To improve the reliability of switching power supplies, this invention provides a PFC circuit with multiple boost branches connected in parallel in phase.

[0004] The technical solution adopted by this utility model to solve the above problems is: A PFC circuit with multiple boost branches connected in parallel is characterized by comprising: a bridge AC rectifier, multiple parallel boost branches, a main control chip, a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, and a rectifier diode. Each boost branch includes: an inductor, a boost diode, a field-effect transistor, a sampling resistor, a first driving resistor, a second driving resistor, and a second capacitor. The IS pin of the main control chip is connected to the negative terminal of the bridge AC rectifier and one end of the first resistor through the second resistor. The positive terminal of the bridge AC rectifier is connected to the negative terminal of the boost diode in the boost branch through the rectifier diode. The positive terminal of the boost diode is connected to one end of the inductor, the sampling resistor, the second capacitor, and the drain of the field-effect transistor. The other end of the inductor is connected to the positive terminal of the bridge AC rectifier. The other ends of the sampling resistor and the second capacitor are both connected to the HV pin of the main control chip. The gate of the field-effect transistor is connected to one end of the first driving resistor and the second driving resistor. The other end of the first driving resistor is connected to the DRV pin of the main control chip. The other end of the second driving resistor and the source of the field-effect transistor are both connected to the other end of the first resistor. The first capacitor is connected in parallel with the boost branch. The negative terminal of the rectifier diode is connected to the FB pin of the main control chip through the third resistor. The FB pin of the main control chip is also grounded through the fourth resistor.

[0005] Furthermore, the specifications and parameters of the corresponding functional components in each booster branch are the same.

[0006] Furthermore, the main control chip is powered by an external VCC power supply.

[0007] The advantages of this invention compared to the prior art are: by using multiple boost branches in parallel and sharing a single drive signal, in-phase switching is achieved, each boost branch is relatively independent, and reliability factors such as device temperature rise are not affected by individual differences of other devices, thereby improving the reliability of the switching power supply. Attached Figure Description

[0008] Figure 1 This is a schematic diagram of a PFC circuit structure with multiple boost branches connected in parallel in phase. Detailed Implementation

[0009] To make the objectives, technical solutions, and advantages of this utility model clearer, the following detailed description is provided in conjunction with embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this utility model.

[0010] like Figure 1 As shown, a PFC circuit with multiple boost branches connected in parallel includes: a bridge AC rectifier, multiple parallel boost branches, a main control chip IC1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first capacitor C1, and a rectifier diode D. Each boost branch includes: an inductor Ln, a boost diode Dn, a field-effect transistor Qn, a sampling resistor Rn1, a first driving resistor Rn2, a second driving resistor Rn3, and a second capacitor Cn1. The IS pin of the main control chip IC1 is connected to the negative terminal of the BRIGE bridge AC rectifier and one end of the first resistor R1 through the second resistor R2. The positive terminal of the BRIGE bridge AC rectifier is connected to the negative terminal of the boost diode Dn in the boost branch through the rectifier diode D. The positive terminal of the boost diode Dn is connected to one end of the inductor Ln, the sampling resistor Rn1, the second capacitor Cn1, and the drain of the field-effect transistor Qn. The other end of the inductor Ln is connected to the positive terminal of the BRIGE bridge AC rectifier. The other ends of the sampling resistor Rn1 and the second capacitor Cn1 are also connected to the positive terminal of the BRIGE bridge AC rectifier. The gate of the MOSFET Qn is connected to the HV pin of the main control chip IC1. The gate of Qn is connected to one end of the first driving resistor Rn2 and the second driving resistor Rn3. The other end of the first driving resistor Rn2 is connected to the DRV pin of the main control chip IC1. The other end of the second driving resistor Rn3 and the source of Qn are both connected to the other end of the first resistor R1. The first capacitor C1 is connected in parallel with the boost branch. The negative terminal of the rectifier diode D is connected to the FB pin of the main control chip IC1 through the third resistor R3. The FB pin of the main control chip IC1 is also grounded through the fourth resistor R4. The main control chip IC1 is directly powered by an external VCC power supply.

[0011] When the field-effect transistor Qn turns on, the inductor Ln stores energy; when Qn turns off, the inductor Ln releases energy, charging C1 to achieve the purpose of boosting the voltage. The functional devices corresponding to each boost branch have the same specifications and parameters, and the number of boost branches connected in parallel can be odd or even, without restriction.

[0012] Under the condition that the driving capability of chip IC1 is sufficient, the drive signal DRV output by control chip IC1 can drive multiple boost branches simultaneously to achieve greater power output. At this time, each parallel boost branch is in phase and works independently. IC1 samples the current and power through the negative voltage generated on R1, and the sampled value is the sum of the working values ​​of each branch. Since the device selection and parameters of each boost branch are consistent, the valley voltage sample HV of IC1 can be connected to the sampling point HVn of any branch through resistor Rn1 or Cn1, that is, only the signal of one branch needs to be sampled; the sampling point does not need to add an auxiliary winding to the inductor to provide the signal.

[0013] By simultaneously driving multiple boost branches, this invention achieves an expansion of output power without affecting the accurate sampling, control, and device reliability of IC1.

Claims

1. A PFC circuit with multiple boost branches connected in parallel in phase, characterized in that, include: The system comprises a bridge AC rectifier, multiple parallel boost branches, a main control chip, a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, and a rectifier diode. Each boost branch includes an inductor, a boost diode, a field-effect transistor, a sampling resistor, a first driving resistor, a second driving resistor, and a second capacitor. The IS pin of the main control chip is connected to the negative terminal of the bridge AC rectifier and one end of the first resistor through the second resistor. The positive terminal of the bridge AC rectifier is connected to the negative terminal of the boost diode in the boost branch through the rectifier diode. The positive terminal of the boost diode is connected to one end of the inductor, the sampling resistor, the second capacitor, and the drain of the field-effect transistor. The other end of the inductor is connected to the positive terminal of the bridge AC rectifier. The other ends of the sampling resistor and the second capacitor are both connected to the HV pin of the main control chip. The gate of the field-effect transistor is connected to one end of the first driving resistor and the second driving resistor. The other end of the first driving resistor is connected to the DRV pin of the main control chip. The other end of the second driving resistor and the source of the field-effect transistor are both connected to the other end of the first resistor. The first capacitor is connected in parallel with the boost branch. The negative terminal of the rectifier diode is connected to the FB pin of the main control chip through the third resistor, and the FB pin of the main control chip is also grounded through the fourth resistor.

2. The PFC circuit with multiple boost branches connected in parallel in phase according to claim 1, characterized in that, The functional components and parameters corresponding to each boost branch are the same.

3. The PFC circuit with multiple boost branches connected in parallel in phase according to claim 1, characterized in that, The main control chip is powered by an external VCC power supply.

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