Compact power module

CN224818606UActive Publication Date: 2026-09-29JIGUANG SEMICON (SHAOXING) CO LTD
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Patent Information

Application Number
CN202522499326.X
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-11-25
Publication Date
2026-09-29
Estimated Expiration
2035-11-25

AI Technical Summary

Technical Problem

但是,目前的功率模块的体积较大,在车载压缩机等较小的应用场景中受到限制,而一些模块中的绝缘性能过剩,还具有提升应用和设计的空间

Benefits of technology

[0020]本实用新型提供的紧凑型功率模块中,基板表面具有沿第一方向排成一行的第一基岛、第二基岛、第三基岛和第四基岛,基板具有沿第一方向延伸且相对的第一侧边和第二侧边,基板表面还具有两个第五基岛和两个第六基岛,两个第五基岛位于第四基岛和第一侧边之间,两个第六基岛位于第一基岛和第二基岛之间;第一基岛承载第一高侧功率芯片、第二高侧功率芯片和第三高侧功率芯片;第二基岛、第三基岛和第四基岛分别承载第一低侧功率芯片、第二低侧功率芯片和第三低侧功率芯片;两个第五基岛分别承载第一温敏元件的两端;两个第六基岛分别承载第二温敏元件的两端。这样三个高侧功率芯片、三个低侧功率芯片以及两个温敏元件在基板上紧密排布,可以减小功率模块的体积,满足功率模块的小型化需求,可适用于车载压缩机等小型场景,而且两个温敏元件分别位于多个功率芯片外侧以及高低侧功率芯片之间,利用该两个温敏元件可以对功率模块进行更加精准、全面的温度监控。

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Abstract

The utility model provides a compact power module, in the compact power module, the substrate surface has the first base island, second base island, third base island and fourth base island in line along the first direction, the substrate has the first side and second side of opposite extension along the first direction, two fifth base islands are located between fourth base island and first side, two sixth base islands are located between first base island and second base island, first base island bears three high side power chip, second base island, third base island and fourth base island bear three low side power chip respectively, two fifth base islands bear two ends of first temperature -sensitive element respectively, two sixth base islands bear two ends of second temperature -sensitive element respectively. Such multiple power chip and temperature -sensitive element compact arrangement can reduce the volume of power module, satisfy the miniaturization demand of power module, and two temperature -sensitive elements can carry out more accurate, comprehensive temperature monitoring to power module.
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Description

Technical Field

[0001] This utility model relates to the field of semiconductor technology, and in particular to a compact power module. Background Technology

[0002] With the development of power electronics technology, power modules have attracted increasing attention. At the same time, the need for energy saving and low cost urgently demands that power modules become lighter and smaller. However, current power modules are relatively large, limiting their application in smaller scenarios such as automotive compressors, while some modules have excessive insulation performance, leaving room for improvement in application and design. Utility Model Content

[0003] One of the purposes of this utility model is to provide a compact power module that can reduce the size of the power module, meet the miniaturization requirements of the power module, and is applicable to small scenarios such as vehicle compressors.

[0004] To achieve the above objectives, this utility model provides a compact power module. The compact power module includes: a substrate having a first base island, a second base island, a third base island, and a fourth base island arranged in a row along a first direction on its surface; the substrate having a first side and a second side extending along the first direction and opposite to each other; the substrate surface also having two fifth base islands and two sixth base islands, the two fifth base islands located between the fourth base island and the first side, and the two sixth base islands located between the first base island and the second base island; the first base island carries a first high-side power chip, a second high-side power chip, and a third high-side power chip; the second base island, the third base island, and the fourth base island respectively carry a first low-side power chip, a second low-side power chip, and a third low-side power chip; the two fifth base islands respectively carry both ends of a first temperature-sensitive element; the two sixth base islands respectively carry both ends of a second temperature-sensitive element; and multiple pins are arranged on the first side and the second side.

[0005] Optionally, a plurality of pads are provided between the first side and the first base island, the second base island, the third base island and the fourth base island. The first end and the second end of the first high-side power chip, the second high-side power chip, the third high-side power chip, the first low-side power chip, the second low-side power chip and the third low-side power chip are all connected to the plurality of pads one by one through bonding wires, and the plurality of pads are connected to the plurality of pins arranged on the first side one by one through bonding wires.

[0006] Optionally, the plurality of pads, the two fifth base islands, and the two sixth base islands are arranged in a row in the first direction, the two fifth base islands are located on the sides of the plurality of pads, the two sixth base islands are located between the plurality of pads and extend between the first base island and the second base island, and the second temperature-sensitive element is located between the high-side power chip and the low-side power chip.

[0007] Optionally, two pads are provided between the fourth base island and the first side. The first end and the second end of the third low-side power chip are respectively connected to the two pads one by one through bonding wires. Each pad is connected to a corresponding pin arranged on the first side through bonding wires.

[0008] Optionally, there are two pads between the two sixth base islands and the first base island. The first end and the second end of the third high-side power chip are respectively connected to the two pads one by one via bonding wires. Each pad is connected to a corresponding pin arranged on the first side via a bonding wire.

[0009] Optionally, the first high-side power chip, the second high-side power chip, and the third high-side power chip are respectively the U-phase high-side power chip, the V-phase high-side power chip, and the W-phase high-side power chip, and the first low-side power chip, the second low-side power chip, and the third low-side power chip are respectively the U-phase low-side power chip, the V-phase low-side power chip, and the W-phase low-side power chip.

[0010] Optionally, the first end of the U-phase high-side power chip is electrically connected to the U-phase upper bridge gate pin, the first end of the V-phase high-side power chip is electrically connected to the V-phase upper bridge gate pin, and the first end of the W-phase high-side power chip is electrically connected to the W-phase upper bridge gate pin.

[0011] The second terminal of the U-phase high-side power chip is electrically connected to the emitter pin of the U-phase upper bridge, the second terminal of the V-phase high-side power chip is electrically connected to the emitter pin of the V-phase upper bridge, and the second terminal of the W-phase high-side power chip is electrically connected to the emitter pin of the W-phase upper bridge. The second terminal of the U-phase high-side power chip is also electrically connected to the U-phase output pin, the second terminal of the V-phase high-side power chip is also electrically connected to the V-phase output pin, and the second terminal of the W-phase high-side power chip is also electrically connected to the W-phase output pin.

[0012] The third terminal of the U-phase high-side power chip, the third terminal of the V-phase high-side power chip, and the third terminal of the W-phase high-side power chip are each electrically connected to the DC positive pin via the first base island.

[0013] The first end of the U-phase low-side power chip is electrically connected to the U-phase lower bridge gate pin, the first end of the V-phase low-side power chip is electrically connected to the V-phase lower bridge gate pin, and the first end of the W-phase low-side power chip is electrically connected to the W-phase lower bridge gate pin.

[0014] The second terminal of the U-phase low-side power chip is electrically connected to the emitter pin of the U-phase lower bridge, the second terminal of the V-phase low-side power chip is electrically connected to the emitter pin of the V-phase lower bridge, and the second terminal of the W-phase low-side power chip is electrically connected to the emitter pin of the W-phase lower bridge. The second terminal of the U-phase low-side power chip is also electrically connected to the U-phase DC negative pin, the second terminal of the V-phase low-side power chip is also electrically connected to the V-phase DC negative pin, and the second terminal of the W-phase low-side power chip is also electrically connected to the W-phase DC negative pin.

[0015] The third terminal of the U-phase low-side power chip is electrically connected to the U-phase output pin via the second base island, the third terminal of the V-phase low-side power chip is electrically connected to the V-phase output pin via the third base island, and the third terminal of the W-phase low-side power chip is electrically connected to the W-phase output pin via the fourth base island.

[0016] Optionally, the two fifth base islands are respectively connected to the NTC1 pin and NTC2 pin disposed on the first side; the two sixth base islands are respectively connected to the NTC2-1 pin and NTC2-2 pin disposed on the first side.

[0017] Optionally, the U-phase upper bridge gate pin, the U-phase upper bridge emitter pin, the V-phase upper bridge gate pin, the V-phase upper bridge emitter pin, the W-phase upper bridge gate pin, the W-phase upper bridge emitter pin, the NTC2-2 pin, the NTC2-1 pin, the U-phase lower bridge gate pin, the U-phase lower bridge emitter pin, the V-phase lower bridge gate pin, the V-phase lower bridge emitter pin, the W-phase lower bridge gate pin, the W-phase lower bridge emitter pin, the NTC2 pin, and the NTC1 pin are disposed on the first side and arranged sequentially;

[0018] The DC positive pin, the U-phase output pin, the V-phase output pin, the W-phase output pin, the U-phase DC negative pin, the V-phase DC negative pin, and the W-phase DC negative pin are disposed on the second side and arranged in sequence.

[0019] Optionally, the first high-side power chip, the second high-side power chip, the third high-side power chip, the first low-side power chip, the second low-side power chip, and the third low-side power chip are all SiC MOS devices, or all include IGBTs and fast recovery diodes.

[0020] In the compact power module provided by this utility model, the substrate surface has a first base island, a second base island, a third base island, and a fourth base island arranged in a row along a first direction. The substrate has a first side and a second side extending along the first direction and opposite to each other. The substrate surface also has two fifth base islands and two sixth base islands. The two fifth base islands are located between the fourth base island and the first side, and the two sixth base islands are located between the first base island and the second base island. The first base island carries a first high-side power chip, a second high-side power chip, and a third high-side power chip. The second base island, the third base island, and the fourth base island respectively carry a first low-side power chip, a second low-side power chip, and a third low-side power chip. The two fifth base islands respectively carry the two ends of a first temperature-sensitive element. The two sixth base islands respectively carry the two ends of a second temperature-sensitive element. The close arrangement of three high-side power chips, three low-side power chips, and two temperature-sensitive elements on the substrate reduces the size of the power module, meeting the miniaturization requirements and making it suitable for small applications such as automotive compressors. Furthermore, the two temperature-sensitive elements are located on the outside of the multiple power chips and between the high-side and low-side power chips, respectively, allowing for more accurate and comprehensive temperature monitoring of the power module. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of the structure of a compact power module provided in an embodiment of the present invention.

[0022] Figure 2 This is a structural schematic diagram of a compact power module provided in another embodiment of the present invention.

[0023] Figure 3 This is a topology diagram of a compact power module provided in one embodiment of the present invention.

[0024] Figure 4 This is a bottom view of a compact power module provided in an embodiment of the present invention.

[0025] Figure 5 A side view of a compact power module provided in an embodiment of the present invention.

[0026] Figure 6 This is a top view of a compact power module provided in an embodiment of the present invention.

[0027] Figure 7 This is a front view of a compact power module provided in an embodiment of the present invention.

[0028] Explanation of reference numerals in the attached drawings: 100-substrate; 100a-first side; 100b-second side; 101-first base island; 102-second base island; 103-third base island; 104-fourth base island; 105-fifth base island; 106-sixth base island; 107-pad; 211-first high-side power chip; 212-second high-side power chip; 213-third high-side power chip; 221-first low-side power chip; 222-second low-side power chip; 223-third low-side power chip; 301-first temperature-sensitive element; 302-second temperature-sensitive element; 400-molded package. Detailed Implementation

[0029] The compact power module proposed in this utility model will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of this utility model will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of this utility model.

[0030] Figure 1 This is a schematic diagram of the structure of a compact power module provided in an embodiment of the present invention. Figure 2 This is a structural schematic diagram of a compact power module provided in another embodiment of the present invention.

[0031] refer to Figure 1 and Figure 2 As shown, the compact power module provided in this application includes a substrate 100, multiple power chips, and two temperature-sensitive elements. The surface of the substrate 100 has a first base island 101, a second base island 102, a third base island 103, and a fourth base island 104 arranged in a row along a first direction X. The substrate 100 has a first side 100a and a second side 100b extending along the first direction X and opposite to each other. The surface of the substrate 100 also has two fifth base islands 105 and two sixth base islands 106. The two fifth base islands 105 are located between the fourth base island 104 and the first side 100a, and the two sixth base islands 106 are located between the first base island 101 and the second base island 102. The first base island 101 carries the first high-side power chip 211, the second high-side power chip 212, and the third high-side power chip 213; the second base island 102, the third base island 103, and the fourth base island 104 carry the first low-side power chip 221, the second low-side power chip 222, and the third low-side power chip 223, respectively; the two fifth base islands 105 carry the two ends of the first temperature-sensitive element 301, respectively; the two sixth base islands 106 carry the two ends of the second temperature-sensitive element 302, respectively; and the first side 100a and the second side 100b are provided with multiple pins.

[0032] For example, substrate 100 can be a direct-bonded copper (DBC) ceramic substrate, but is not limited thereto. Direct-bonded copper ceramic substrates have excellent thermal cycling performance, effectively resisting thermal stress during repeated heating and cooling of the power module, and reducing problems such as delamination and cracking caused by mismatched coefficients of thermal expansion. The direct-bonded copper ceramic substrate includes a ceramic substrate, a first metal layer located on the front side of the ceramic substrate, and a second metal layer located on the back side of the ceramic substrate. The first metal layer includes multiple base islands and multiple pads.

[0033] refer to Figure 1 and Figure 2 As shown, the substrate 100 can be a rectangular substrate, but is not limited thereto. The substrate 100 may include a first side 100a and a second side 100b extending along the first direction X and opposite to each other.

[0034] In one embodiment of this application, as Figure 1 As shown, the front side of the substrate 100 also includes multiple pads 107 (located in...) Figure 1 Within the dashed box, multiple pads 107 are arranged in a row along the first direction X. The row of pads 107 is located between the first side 100a and a row of base islands (including the first base island 101, the second base island 102, the third base island 103, and the fourth base island 104). More details are as follows... Figure 1 As shown, multiple pads 107, two fifth base islands 105 and two sixth base islands 106 can be arranged in a row in the first direction X. The two fifth base islands 105 are located on the sides of the multiple pads 107, for example, the two fifth base islands 105 are located near the left side of the substrate 100. The two sixth base islands 106 are located between the multiple pads 107 and extend between the first base island 101 and the second base island 102.

[0035] The first base island 101 carries a first high-side power chip 211, a second high-side power chip 212, and a third high-side power chip 213. These chips can be arranged sequentially in the first direction X, with the third high-side power chip 213 positioned closer to the second base island 102. The second base island 102 carries a first low-side power chip 221, the third base island 103 carries a second low-side power chip 222, and the fourth base island 104 carries a third low-side power chip 223.

[0036] refer to Figure 1As shown, multiple power chips are SiC MOS devices. Since a single SiC MOS device requires a smaller mounting area, the widths of the first base island 101, second base island 102, third base island 103, and fourth base island 104 in the second direction Y can be reduced. This allows for a row of pads 107 to be positioned between the row of base islands and the first side edge 100a, and the widths of the multiple pads 107, the fifth base island 105, and the sixth base island 106 in the second direction Y can be increased. For example, the widths of the first base island 101, second base island 102, third base island 103, and fourth base island 104 in the second direction Y can be equal.

[0037] In another embodiment, reference Figure 2 As shown, multiple power chips include discrete IGBTs and fast recovery diodes. These two discrete components, the IGBT and fast recovery diode, require a large mounting area; therefore, compared to… Figure 1 compared to, Figure 2 The first base island 101, the second base island 102, the third base island 103 and the fourth base island 104 have a large width in the second direction Y. In order to avoid increasing the area of ​​the substrate 100, no pads are laid between the second base island 102 and the first side 100a, and between the third base island 103 and the first side 100a.

[0038] For more specific details, please refer to Figure 2 As shown, two fifth base islands 105 are disposed at the end of the fourth base island 104 near the first side 100a. The width of the fourth base island 104 in the second direction Y is smaller than the width of the third base island 103. Two pads 107 can be disposed in the area enclosed by the fourth base island 104, the third base island 103 and the fifth base island 105. The first end and the second end of the third low-side power chip 223 are respectively connected to the two pads 107 one by one through bonding wires. Each pad 107 is connected to a corresponding pin arranged on the first side 100a through bonding wires. The first base island 101 is partially recessed near the second base island 102. Two sixth base islands 106 are disposed within the space left by this recessed portion. Two pads 107 can be disposed within the area enclosed by the sixth base islands 106 and the first base island 101 to bring out the first and second ends of the third high-side power chip 213. That is, the first and second ends of the third high-side power chip 213 are respectively connected to the two pads 107 one-to-one via bonding wires. Each pad 107 is connected to a corresponding pin arranged on the first side 100a via a bonding wire. The widths of the second base island 102 and the third base island 103 in the second direction Y can be equal.

[0039] For example, the circuit of the compact power module is a three-phase full-bridge inverter circuit, wherein the first high-side power chip 211 is the U-phase high-side power chip, the second high-side power chip 212 is the V-phase high-side power chip, the third high-side power chip 213 is the W-phase high-side power chip, the first low-side power chip 221 is the U-phase low-side power chip, the second low-side power chip 222 is the V-phase low-side power chip, and the third low-side power chip 223 is the W-phase low-side power chip.

[0040] refer to Figure 1 and Figure 2 As shown, the first side 100a and the second side 100b of the compact power module have multiple pins. The power chip and the temperature-sensitive element can be electrically connected to the corresponding pins via bonding wires. The multiple pins are as follows:

[0041] NC: No connect pin

[0042] NTC1: NTC1 pin

[0043] NTC2: NTC2 pin

[0044] WLS: Emitter pin of the lower bridge of phase W

[0045] WLG: W-phase lower bridge gate pin

[0046] VLS: Emitter pin of V-phase lower bridge

[0047] VLG: V-phase lower bridge gate pin

[0048] ULS: Emitter pin of U-phase lower bridge

[0049] ULG: U-phase lower bridge gate pin

[0050] NTC2-1: NTC2-1 pins

[0051] NTC2-2: NTC2-2 pinout

[0052] WHS: Emitter pin of W phase upper bridge

[0053] WHG: W-phase upper bridge gate pin

[0054] VHS: Emitter pin of V-phase upper bridge

[0055] VHG: V-phase upper bridge gate pin

[0056] UHS: Emitter pin of U-phase upper bridge

[0057] UHG: U-phase upper bridge gate pin

[0058] NW: W-phase DC negative pin

[0059] NV: V-phase DC negative pin

[0060] NU: U-phase DC negative pin

[0061] W: W-phase output pin

[0062] V: V-phase output pin

[0063] U: U-phase output pin

[0064] P: Positive DC pin

[0065] Among them, the U-phase upper bridge gate pin UHG, U-phase upper bridge emitter pin UHS, V-phase upper bridge gate pin VHG, V-phase upper bridge emitter pin VHS, W-phase upper bridge gate pin WHG, W-phase upper bridge emitter pin WHS, NTC2-2 pin, NTC2-1 pin, U-phase lower bridge gate pin ULG, U-phase lower bridge emitter pin ULS, V-phase lower bridge gate pin VHG, V-phase lower bridge emitter pin VLS, W-phase lower bridge gate pin WLG, W-phase lower bridge emitter pin WLS, NTC2 pin and NTC1 pin are disposed on the first side 100a and arranged sequentially in the first direction X;

[0066] The positive DC pin P, the U-phase output pin U, the V-phase output pin V, the W-phase output pin W, the negative DC pin NU of the U-phase, the negative DC pin NV of the V-phase, and the negative DC pin NW of the W-phase are set on the second side 100b and arranged sequentially in the first direction X.

[0067] refer to Figure 1 and Figure 2 As shown, the compact power module provided in this application also includes multiple unused pins NC (i.e., pins not connected to devices / chips). For example, on the first side 100a, three unused pins NC are provided on the side of the NTC1 pin away from the NTC2 pin, and two unused pins NC are provided on the side of the U-phase upper bridge gate pin UHG away from the U-phase upper bridge emitter pin UHS. On the second side 100b, one unused pin NC is provided on the side of the DC positive pin P away from the U-phase output pin U. In this way, the pin positions of the compact power module of this application can be consistent with the pin positions of other products, so that it can share a set of bending and forming molds with other products, which helps to save costs. Moreover, the module has multiple unused pins NC reserved, which can also reserve modification space for other requirements.

[0068] Figure 3 This is a topology diagram of a compact power module provided according to an embodiment of the present invention. For example, refer to... Figure 1 , Figure 2 and Figure 3As shown, the first end of the U-phase high-side power chip is electrically connected to the U-phase upper bridge gate pin UHG via a bonding wire; the first end of the V-phase high-side power chip is electrically connected to the V-phase upper bridge gate pin VHG via a bonding wire; and the first end of the W-phase high-side power chip is electrically connected to the W-phase upper bridge gate pin WHG via a bonding wire. The second end of the U-phase high-side power chip is electrically connected to the U-phase upper bridge emitter pin UHS; the second end of the V-phase high-side power chip is electrically connected to the V-phase upper bridge emitter pin VHS; and the W-phase high-side power chip… The second end of the chip is electrically connected to the emitter pin WHS of the upper bridge of phase W. The second end of the high-side power chip of phase U is also electrically connected to the output pin U of phase U. The second end of the high-side power chip of phase V is also electrically connected to the output pin V of phase V. The second end of the high-side power chip of phase W is also electrically connected to the output pin W of phase W. The third ends of the high-side power chips of phase U, phase V and phase W are located on the first base island 101 and are each electrically connected to the positive DC pin P through the first base island 101.

[0069] The first terminal of the U-phase low-side power chip is electrically connected to the U-phase lower bridge gate pin ULG; the first terminal of the V-phase low-side power chip is electrically connected to the V-phase lower bridge gate pin VLG; and the first terminal of the W-phase low-side power chip is electrically connected to the W-phase lower bridge gate pin WLG. The second terminal of the U-phase low-side power chip is electrically connected to the U-phase lower bridge emitter pin ULS; the second terminal of the V-phase low-side power chip is electrically connected to the V-phase lower bridge emitter pin VLS; and the second terminal of the W-phase low-side power chip is electrically connected to the W-phase lower bridge emitter pin WLS. The second terminal of the U-phase low-side power chip is also connected to the U-phase DC negative pin. The NU phase is electrically connected, and the second end of the V phase low-side power chip is also electrically connected to the V phase DC negative pin NV. The second end of the W phase low-side power chip is also electrically connected to the W phase DC negative pin NW. The third end of the U phase low-side power chip is located on the second base island 102 and is electrically connected to the U phase output pin U via the second base island 102. The third end of the V phase low-side power chip is located on the third base island 103 and is electrically connected to the V phase output pin V via the third base island 103. The third end of the W phase low-side power chip is located on the fourth base island 104 and is electrically connected to the W phase output pin W via the fourth base island 104.

[0070] In one embodiment, such as Figure 1 As shown, one power chip can correspond to two pads 107. The first and second ends of the first high-side power chip 211, the first and second ends of the second high-side power chip 212, the first and second ends of the third high-side power chip 213, the first and second ends of the first low-side power chip 221, the first and second ends of the second low-side power chip 222, and the first and second ends of the third low-side power chip 223 are all connected to a corresponding pad 107 via bonding wires, and a pad 107 is connected to a corresponding pin via a bonding wire.

[0071] In another embodiment, such as Figure 2 As shown, the first and second ends of the first high-side power chip 211 are directly connected to a corresponding pin via bonding wires; the first and second ends of the second high-side power chip 212 are directly connected to a corresponding pin via bonding wires; the first and second ends of the third high-side power chip 213 are connected to a corresponding pin via two pads 107 between the first base island 101 and the second base island 102 and bonding wires; the first and second ends of the first low-side power chip 221 are directly connected to a corresponding pin via bonding wires; the first and second ends of the second low-side power chip 222 are directly connected to a corresponding pin via bonding wires; the first and second ends of the third low-side power chip 223 are connected to a corresponding pin via two pads 107 between the fourth base island 104 and the first side 100a and bonding wires.

[0072] In one embodiment, such as Figure 1 As shown, all power chips are SiC MOS devices. The gate of the SiC MOS device serves as the first terminal of the power chip, the drain of the SiC MOS device serves as the third terminal of the power chip and is located on the base island corresponding to each power chip, and the source of the SiC MOS device serves as the second terminal of the power chip.

[0073] In another embodiment, such as Figure 2 As shown, each power chip can include an IGBT and a fast recovery diode. The gate of the IGBT serves as the first terminal of the power chip, the emitter of the IGBT is electrically connected to the anode of the fast recovery diode and serves as the second terminal of the power chip, and the collector of the IGBT is electrically connected to the cathode of the fast recovery diode and serves as the third terminal of the power chip. The collector of the IGBT and the cathode of the fast recovery diode are located on the corresponding base island of each power chip.

[0074] refer to Figure 1 and Figure 2 As shown, the two ends of the first temperature-sensitive element 301 are respectively mounted on two fifth base islands 105, and the two fifth base islands 105 are respectively connected to the NTC1 pin and NTC2 pin located on the first side 100a. The two ends of the second temperature-sensitive element 302 are respectively mounted on two sixth base islands 106, and the two sixth base islands 106 are respectively connected to the NTC2-1 pin and NTC2-2 pin located on the first side 100a. The first temperature-sensitive element 301 is located on the side of multiple power chips and can measure the temperature around the multiple power chips. The second temperature-sensitive element 302 is located between the high-side power chip and the low-side power chip and can measure the temperature between the high-side and low-side power chips. This makes the temperature monitoring of the power module more accurate and comprehensive.

[0075] For example, the first temperature-sensitive element 301 and the second temperature-sensitive element 302 are both including but not limited to negative temperature coefficient (NTC) temperature-sensitive elements.

[0076] Figure 4 This is a bottom view of a compact power module provided in an embodiment of the present invention. Figure 5 A side view of a compact power module provided in an embodiment of the present invention. Figure 6 This is a top view of a compact power module provided in an embodiment of the present invention. Figure 7 This is a front view of a compact power module provided in an embodiment of the present invention.

[0077] refer to Figures 4 to 7 As shown, the compact power module also includes a molding compound 400. The molding compound 400 covers the power chip and temperature-sensitive element on the front side of the substrate 100, and at least partially covers the substrate 100. The molding compound 400 wraps around one end of each pin, leaving the other end of each pin exposed. For example, the molding compound 400 covers the front side of the substrate 100, and at least partially exposes the back side of the substrate 100, so that the metal layer on the back side of the substrate 100 can be directly exposed outside the molding compound 400, which helps to improve heat dissipation. For example, the material of the molding compound 400 includes, but is not limited to, epoxy molding compound.

[0078] refer to Figure 5 As shown, in this embodiment, the pins of the compact power module are bent pins, and the compact power module is a dual in-line package (DIP) type package structure, but is not limited to this.

[0079] The compact power module provided in this application meets the safety requirements for a nominal voltage of 1200V. The electrical clearance of the compact power module can be 3mm, and the creepage distance can be 4.6mm, but it is not limited to these. Existing full-bridge inverter power modules in the industry are relatively large, for example, 218mm × 89.4mm × 14.52mm, while the compact power module provided in this application is much smaller, for example, 52.5mm × 31mm × 5.6mm, thus significantly reducing the overall size.

[0080] In the compact power module provided by this utility model, the surface of the substrate 100 has a first base island 101, a second base island 102, a third base island 103, and a fourth base island 104 arranged in a row along a first direction X. The substrate 100 has a first side 100a and a second side 100b extending along the first direction X and opposite to each other. The surface of the substrate 100 also has two fifth base islands 105 and two sixth base islands 106. The two fifth base islands 105 are located between the fourth base island 104 and the first side 100a, and the two sixth base islands 106 are located between the fourth base island 104 and the first side 100a. Between the first base island 101 and the second base island 102; the first base island 101 carries the first high-side power chip 211, the second high-side power chip 212, and the third high-side power chip 213; the second base island 102, the third base island 103, and the fourth base island 104 carry the first low-side power chip 221, the second low-side power chip 222, and the third low-side power chip 223, respectively; two fifth base islands 105 carry the two ends of the first temperature-sensitive element 301, respectively; and two sixth base islands 106 carry the two ends of the second temperature-sensitive element 302, respectively. In this way, the three high-side power chips, the three low-side power chips, and the two temperature-sensitive elements are closely arranged on the substrate, and the compact power module does not contain a control chip, which can reduce the size of the power module and meet the miniaturization requirements of the power module. It can be applied to small scenarios such as automotive compressors. Moreover, the two temperature-sensitive elements are located outside the multiple power chips and between the high-side and low-side power chips, respectively, allowing for more accurate and comprehensive temperature monitoring of the power module.

[0081] The above description is only a description of the preferred embodiment of the present utility model and is not intended to limit the scope of the present utility model. Any person skilled in the art can make possible changes and modifications to the technical solution of the present utility model by using the methods and techniques disclosed above without departing from the spirit and scope of the present utility model. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present utility model without departing from the content of the technical solution of the present utility model shall fall within the protection scope of the technical solution of the present utility model.

Claims

1. A compact power module, characterized in that, include: A substrate having a surface having a first base island, a second base island, a third base island and a fourth base island arranged in a row along a first direction, the substrate having a first side edge and a second side edge extending along the first direction and opposite to each other, the surface of the substrate also having two fifth base islands and two sixth base islands, the two fifth base islands being located between the fourth base island and the first side edge, and the two sixth base islands being located between the first base island and the second base island; The first base island carries a first high-side power chip, a second high-side power chip, and a third high-side power chip; The second base island, the third base island, and the fourth base island respectively carry the first low-side power chip, the second low-side power chip, and the third low-side power chip; The two fifth base islands respectively support the two ends of the first temperature-sensitive element; The two sixth base islands respectively support the two ends of the second temperature-sensitive element; Multiple pins are arranged on the first side and the second side.

2. The compact power module as described in claim 1, characterized in that, Multiple pads are provided between the first side and the first base island, the second base island, the third base island and the fourth base island. The first end and the second end of the first high-side power chip, the second high-side power chip, the third high-side power chip, the first low-side power chip, the second low-side power chip and the third low-side power chip are all connected to the multiple pads one by one through bonding wires, and the multiple pads are connected to the multiple pins arranged on the first side one by one through bonding wires.

3. The compact power module as described in claim 2, characterized in that, The plurality of pads, the two fifth base islands and the two sixth base islands are arranged in a row in the first direction, the two fifth base islands are located on the sides of the plurality of pads, the two sixth base islands are located between the plurality of pads and extend between the first base island and the second base island, and the second temperature-sensitive element is located between the high-side power chip and the low-side power chip.

4. The compact power module as described in claim 1, characterized in that, Two pads are provided between the fourth base island and the first side. The first end and the second end of the third low-side power chip are respectively connected to the two pads one by one through bonding wires. Each pad is connected to a corresponding pin arranged on the first side through bonding wires.

5. The compact power module as described in claim 1, characterized in that, There are two pads between the two sixth base islands and the first base island. The first end and the second end of the third high-side power chip are respectively connected to the two pads one by one via bonding wires. Each pad is connected to a corresponding pin arranged on the first side via a bonding wire.

6. The compact power module as described in claim 1, characterized in that, The first high-side power chip, the second high-side power chip, and the third high-side power chip are the U-phase high-side power chip, the V-phase high-side power chip, and the W-phase high-side power chip, respectively. The first low-side power chip, the second low-side power chip, and the third low-side power chip are the U-phase low-side power chip, the V-phase low-side power chip, and the W-phase low-side power chip, respectively.

7. The compact power module as described in claim 6, characterized in that, The first end of the U-phase high-side power chip is electrically connected to the U-phase upper bridge gate pin, the first end of the V-phase high-side power chip is electrically connected to the V-phase upper bridge gate pin, and the first end of the W-phase high-side power chip is electrically connected to the W-phase upper bridge gate pin. The second terminal of the U-phase high-side power chip is electrically connected to the emitter pin of the U-phase upper bridge, the second terminal of the V-phase high-side power chip is electrically connected to the emitter pin of the V-phase upper bridge, and the second terminal of the W-phase high-side power chip is electrically connected to the emitter pin of the W-phase upper bridge. The second terminal of the U-phase high-side power chip is also electrically connected to the U-phase output pin, the second terminal of the V-phase high-side power chip is also electrically connected to the V-phase output pin, and the second terminal of the W-phase high-side power chip is also electrically connected to the W-phase output pin. The third terminal of the U-phase high-side power chip, the third terminal of the V-phase high-side power chip, and the third terminal of the W-phase high-side power chip are each electrically connected to the DC positive pin via the first base island. The first end of the U-phase low-side power chip is electrically connected to the U-phase lower bridge gate pin, the first end of the V-phase low-side power chip is electrically connected to the V-phase lower bridge gate pin, and the first end of the W-phase low-side power chip is electrically connected to the W-phase lower bridge gate pin. The second terminal of the U-phase low-side power chip is electrically connected to the emitter pin of the U-phase lower bridge, the second terminal of the V-phase low-side power chip is electrically connected to the emitter pin of the V-phase lower bridge, and the second terminal of the W-phase low-side power chip is electrically connected to the emitter pin of the W-phase lower bridge. The second terminal of the U-phase low-side power chip is also electrically connected to the U-phase DC negative pin, the second terminal of the V-phase low-side power chip is also connected to the V-phase DC negative pin, and the second terminal of the W-phase low-side power chip is also electrically connected to the W-phase DC negative pin. The third terminal of the U-phase low-side power chip is electrically connected to the U-phase output pin via the second base island, the third terminal of the V-phase low-side power chip is electrically connected to the V-phase output pin via the third base island, and the third terminal of the W-phase low-side power chip is electrically connected to the W-phase output pin via the fourth base island.

8. The compact power module as described in claim 7, characterized in that, The two fifth base islands are respectively connected to the NTC1 pin and NTC2 pin located on the first side; the two sixth base islands are respectively connected to the NTC2-1 pin and NTC2-2 pin located on the first side.

9. The compact power module as described in claim 8, characterized in that, The U-phase upper bridge gate pin, the U-phase upper bridge emitter pin, the V-phase upper bridge gate pin, the V-phase upper bridge emitter pin, the W-phase upper bridge gate pin, the W-phase upper bridge emitter pin, the NTC2-2 pin, the NTC2-1 pin, the U-phase lower bridge gate pin, the U-phase lower bridge emitter pin, the V-phase lower bridge gate pin, the V-phase lower bridge emitter pin, the W-phase lower bridge gate pin, the W-phase lower bridge emitter pin, the NTC2 pin, and the NTC1 pin are disposed on the first side and arranged sequentially. The DC positive pin, the U-phase output pin, the V-phase output pin, the W-phase output pin, the U-phase DC negative pin, the V-phase DC negative pin, and the W-phase DC negative pin are disposed on the second side and arranged in sequence.

10. The compact power module as described in claim 1, characterized in that, The first high-side power chip, the second high-side power chip, the third high-side power chip, the first low-side power chip, the second low-side power chip, and the third low-side power chip are all SiC MOS devices, or all include IGBTs and fast recovery diodes.