Module packaging structure and electronic device

CN224818620UActive Publication Date: 2026-09-29SHANGHAI VANCHIP ELECTRONICS TECH CO LTD
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Patent Information

Application Number
CN202522538045.0
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-11-28
Publication Date
2026-09-29
Estimated Expiration
2035-11-28

AI Technical Summary

Technical Problem

[0007]本实用新型的目的在于提供一种模组封装结构及电子器件,以解决如何兼顾实现非滤波器芯片的底部全面填充以及提高滤波器芯片的底部空腔的密封性和稳定性的问题

Benefits of technology

[0023]综上所述,本实用新型提供一种模组封装结构及电子器件。相较于现有技术,所述模组封装结构内设置的所述隔离膜无需拉伸,直接贴覆于所述第一芯片的顶表面上,且位于所述第一芯片的顶表面的边缘处的部分所述隔离膜经压膜断裂。以及,断裂的部分所述隔离膜在无拉伸形变的情况下落至对应的所述第一芯片周围的部分所述基板上,并包围对应的所述第一芯片,以形成所述密封腔。基于此,断裂后的所述隔离膜仍旧保持膜厚均匀,有利于均衡抵抗所述塑封层的模压,避免对所述隔离膜包围形成的所述密封腔造成不良影响,提高了器件的可靠性及良率。

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Abstract

The utility model provides a kind of module packaging structure and electronic device. Among them, the isolation film arranged in the module packaging structure does not need to stretch, directly pastes on the top surface of the first chip, and part of the isolation film located at the edge of the top surface of the first chip is fractured by pressing film. And, the fractured part of the isolation film falls on the part of the substrate around the corresponding first chip without tensile deformation, and surrounds the corresponding first chip to form a sealed cavity. Based on this, the isolation film after fracture still maintains uniform film thickness, which is beneficial to balanced resistance to the mold pressing of plastic package layer, avoids the adverse effects on the sealed cavity formed by the isolation film surrounding, and improves the reliability and yield of the device.
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Description

Technical Field

[0001] This utility model relates to the field of semiconductor fabrication technology, and in particular to a module packaging structure and electronic device. Background Technology

[0002] A diversity receive module (Drx) is a highly integrated radio frequency front-end module used to improve the receiving performance of wireless communication devices. During the Drx module packaging process, because filter chips and other types of chips are integrated into the same package module, a sealing film needs to be formed on the surface of the filter chip before molding to ensure a sealed cavity is formed at the bottom of the filter chip.

[0003] Please see Figure 1 The existing process uses a stretch coating method, first stretching the sealing film 100 to cover the filter chip 101 and the non-filter chip 102, and then forming a molding compound 103 on the sealing film 100. Although the application of the sealing film 100 can form a sealed cavity T at the bottom of the filter chip 101 to meet its operational requirements, this stretch coating method has the following two problems:

[0004] First, the bottom of other non-filter chips 102 within the Drx module cannot be properly filled due to the coating, easily leading to solder bridging and short circuits. Current solutions involve adding a process using a laser to penetrate the sealing film 100 at the edge of the non-filter chip 102 to achieve bottom filling. However, this method increases manufacturing costs, and the dust generated by the laser cannot be completely removed, affecting product quality. Furthermore, uncontrolled film penetration leads to uncontrolled filling effects, impacting product consistency.

[0005] Second, the stretch-coating method places high demands on the tensile properties of the sealing film 100, generally requiring it to maintain its sealing performance even at an elongation of 500%. However, as... Figure 1 and Figure 2 As shown, when the chip pitch D is small, the sealing film 100 at the chip spacing can be stretched very thin, making it difficult to withstand the molding of the subsequently formed molding layer 103. This can easily cause the sealing film 100 to crack, affecting the sealing performance of the sealing cavity T. Furthermore, the stretching method can also easily cause uneven stretching of the sealing film 100, resulting in poor process stability at the same chip pitch D. For example... Figure 3As shown, after stretching, the portion of the sealing film 100 located on the top surface of the filter chip 101 has a thicker film thickness, while the portion located on the sidewall of the filter chip 101 has a thinner film thickness. Furthermore, the sealing film 100 at one corner A of the filter chip 101 has broken after stretching, and although the sealing film 100 at the other corner B is connected, it is thinner. Therefore, due to the uneven thickness distribution of the sealing film 100, the subsequently formed molding layer 103 can easily damage the sealing film 100, thus failing to guarantee the sealing performance of the sealing cavity T at the bottom of the filter chip 101, severely affecting the device yield.

[0006] Therefore, a new module packaging structure is urgently needed to solve the above-mentioned technical problems. Utility Model Content

[0007] The purpose of this invention is to provide a module packaging structure and electronic device to solve the problem of how to achieve full bottom filling of non-filter chips and improve the sealing and stability of the bottom cavity of filter chips.

[0008] To solve the above technical problems, this utility model provides a module packaging structure, including:

[0009] Substrate; a first chip is mounted on the substrate;

[0010] A separating film; the separating film is attached to the top surface of the first chip; and a portion of the separating film located at the edge of the top surface of the first chip is broken by pressure, and the broken portion of the separating film falls onto a portion of the substrate surrounding the corresponding first chip; wherein at least a portion of the separating film that falls onto the substrate also surrounds the corresponding first chip to form a sealed cavity between the corresponding first chip and the substrate;

[0011] A molding layer that at least covers the surface of the release membrane.

[0012] Optionally, in the module packaging structure, the elongation at break of the isolation membrane is <10%.

[0013] Optionally, in the module packaging structure, the elongation at break of the isolation membrane is <5%.

[0014] Optionally, in the module packaging structure, the isolation membrane has thermosetting properties.

[0015] Optionally, in the module packaging structure, the first chip includes a filter chip; wherein,

[0016] The portion of the isolation membrane that falls around the filter chip also covers a portion of the sidewalls of the filter chip; and the covered portion of the sidewalls of the filter chip is close to the bottom surface of the filter chip to form the sealing cavity between the filter chip and the substrate.

[0017] Optionally, in the module packaging structure, a second chip is further mounted on the substrate; wherein,

[0018] The isolation film is also attached to the top surface of the second chip; and a portion of the isolation film located at the edge of the top surface of the second chip is broken by pressure; the broken portion of the isolation film falls onto the substrate surrounding the corresponding second chip, and there is a gap between it and the bottom surface of the corresponding second chip.

[0019] Optionally, in the module packaging structure, the second chip includes a non-filter chip; wherein the thickness of the isolation film surrounding the non-filter chip is less than 2 / 3 of the distance between the bottom surface of the non-filter chip and the substrate.

[0020] Optionally, in the module packaging structure, the molding layer further fills and covers the space between the bottom surface of the second chip and the substrate through the gap.

[0021] Optionally, in the module packaging structure, the molding layer also covers the exposed sidewalls of the first chip and the second chip.

[0022] Based on the same concept, this utility model also provides an electronic device, including the aforementioned module packaging structure.

[0023] In summary, this utility model provides a module packaging structure and an electronic device. Compared to the prior art, the isolation film disposed within the module packaging structure does not require stretching and is directly adhered to the top surface of the first chip. Furthermore, a portion of the isolation film located at the edge of the top surface of the first chip is broken by pressure molding. The broken portion of the isolation film falls onto the corresponding portion of the substrate surrounding the first chip without stretching deformation, thus enclosing the corresponding first chip to form the sealed cavity. Based on this, the broken isolation film maintains a uniform film thickness, which is beneficial for evenly resisting the molding pressure of the encapsulation layer, avoiding adverse effects on the sealed cavity formed by the isolation film, and improving the reliability and yield of the device.

[0024] Furthermore, a second chip is also mounted on the substrate, and the insulating film is also attached to the top surface of the second chip and is broken by film pressure. The broken portion of the insulating film falls onto the substrate surrounding the corresponding second chip, and there is a gap between the insulating film and the bottom surface of the corresponding second chip. Therefore, the molding compound can fill and cover the area between the bottom of the corresponding second chip and the substrate through the gap. This not only ensures the isolation and protection of the bottom of the second chip by the molding compound, avoiding short circuit problems, but also eliminates the need for laser film breaking or other methods to achieve molding compound filling, which is beneficial to ensuring the consistency and stability of the device process. Attached Figure Description

[0025] Those skilled in the art will understand that the accompanying drawings are provided to better understand the present invention and do not constitute any limitation on the scope of the present invention.

[0026] Figure 1 This is a schematic diagram of a stretch-coated encapsulation structure in the prior art.

[0027] Figure 2 This is a schematic diagram of the sealing film being stretched too thin under small-pitch conditions in existing technology.

[0028] Figure 3 This is a schematic diagram of the sealing film being stretched and broken or stretched too thin in the prior art.

[0029] Figure 4 This is a schematic diagram of a module packaging structure in an embodiment of this utility model.

[0030] Figure 5 This is a cross-sectional schematic diagram of the isolation membrane after it has broken in an embodiment of this utility model.

[0031] Figure 6 This is a planar schematic diagram of the isolation membrane after it has broken in an embodiment of this utility model.

[0032] Figure 7 This is a schematic diagram of the structure of the cured isolation film in an embodiment of this utility model.

[0033] Figure 8 This is a schematic diagram of the structure of a substrate in an embodiment of this utility model.

[0034] Figure 9 This is a schematic diagram of the filter chip and non-filter chip mounted on the substrate in an embodiment of this utility model.

[0035] Figure 10 This is a schematic diagram of the structure after the isolation membrane breaks and solidifies in an embodiment of this utility model.

[0036] Figure 11This is an image of the isolation membrane after it has broken and solidified in an embodiment of this utility model.

[0037] Figure 12 This is a schematic diagram of another module packaging structure in an embodiment of this utility model.

[0038] And, in the attached image:

[0039] 100 - Sealing film; 101 - Filter chip; 102 - Non-filter chip; 103 - Molding layer;

[0040] 200-Substrate; 201-First chip; 202-Isolation film; 203-Encapsulation layer; 204-Solder resist layer; 205-Pad; 206-Filter chip; 206a-First substrate; 206b-Interdigitated electrode; 206c-First connection post; 207-Non-filter chip; 207a-Second substrate; 207b-Second connection post;

[0041] T - Sealed cavity; P - Edge; D - Chip spacing; d - Spacing between the bottom of the non-filter chip and the substrate; A - One corner of the chip; B - Another corner of the chip. Detailed Implementation

[0042] To make the objectives, advantages, and features of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to facilitate and clearly illustrate the purpose of the embodiments of this utility model. Furthermore, the structures shown in the drawings are often part of the actual structure. In particular, different drawings may emphasize different aspects and sometimes use different scales. It should also be understood that, unless specifically stated or indicated, the terms "first," "second," "third," etc., in the specification are only used to distinguish the various components, elements, steps, etc., in the specification, and are not used to indicate the logical or sequential relationships between the various components, elements, steps, etc.

[0043] Furthermore, the X-axis, Y-axis, and Z-axis directions referred to in this specification are three mutually perpendicular directions in three-dimensional space. The terms "bottom" and "top" in this specification refer to relative positions, with the direction from the bottom to the top being the positive Z-axis and the direction from the top to the bottom being the negative Z-axis.

[0044] Please see Figure 4 and Figure 5This embodiment provides a module packaging structure, including: a substrate 200; a first chip 201 mounted on the substrate 200; an isolation film 202; the isolation film 202 being attached to the top surface of the first chip 201; and a portion of the isolation film 202 located at the edge P of the top surface of the first chip 201 being broken by pressure molding, and the broken portion of the isolation film 202 falling onto a portion of the substrate 200 surrounding the corresponding first chip 201; wherein at least a portion of the isolation film 202 falling onto the substrate 200 also surrounds the corresponding first chip 201 to form a sealed cavity T between the corresponding first chip 201 and the substrate 200; and a molding layer 203, the molding layer 203 at least covering the surface of the isolation film 202.

[0045] Based on this, the isolation film 202 provided in the module packaging structure of this embodiment does not need to be stretched and is directly attached to the top surface of the first chip 201. A portion of the isolation film 202 located at the edge P of the top surface of the first chip 201 is broken by pressure molding. Furthermore, the broken portion of the isolation film 202 falls onto the corresponding portion of the substrate 200 surrounding the first chip 201 without stretching deformation. This ensures that the broken isolation film 202 maintains a uniform film thickness, which is beneficial for evenly resisting the molding of the encapsulation layer 203 and avoiding adverse effects on the sealing cavity T formed by the isolation film 202, thereby improving the reliability and yield of the device.

[0046] The module packaging structure provided in this embodiment will be described in detail below with reference to the accompanying drawings.

[0047] Please see Figures 4 to 7 The module packaging structure includes: a substrate 200, a first chip 201, an isolation film 202, and a molding compound 203. The substrate 200 serves as a carrier plate for chip packaging; the isolation film 202 forms a stable sealed cavity T at the bottom of the first chip 201; and the molding compound 203, made of molding compound material, isolates and protects each chip from mechanical damage and environmental influences.

[0048] Specifically, such as Figure 4 and Figure 5As shown, the substrate 200 includes, but is not limited to, a ceramic circuit board or a printed circuit board, which can be used to support chips, provide electrical connections, and achieve heat dissipation. The top surface of the substrate 200 has connection terminals adapted to the chip, enabling electrical connection with the chip through mounting. Preferably, the chip mounting method includes, but is not limited to, metal soldering, thermoforming, and conductive adhesive bonding. In this embodiment, one or more chips can be mounted on the substrate 200; that is, the module packaging structure includes not only the first chip 201 but also a second chip (not shown). For example, the first chip includes a filter chip, requiring the formation of the sealing cavity T at its bottom. The second chip includes a non-filter chip, not requiring the formation of the sealing cavity T at its bottom. It should be noted that the filter chip contains interdigitated electrodes, which are highly sensitive to environmental conditions. When the environment contains pollutants or air turbulence, the interdigitated electrodes will be interfered with, causing a shift in the filtering frequency band, thereby affecting product performance. Therefore, during the module packaging process, the formed sealing cavity T is used to ensure that the interdigitated electrodes are in a stable environment, which is beneficial to improving product performance. Based on this, the module packaging structure provided in this embodiment coats a layer of the isolation film 202 on the top surface of all chips before forming the molding compound 203, so as to facilitate the formation of the sealing cavity T at the bottom of the first chip 201 by the isolation film 202.

[0049] In one example, only a plurality of the first chips 201 are mounted on the substrate 200. For example... Figure 5 and Figure 6 As shown, after the mounting of each of the first chips 201 is completed, the isolation film 202 is first applied to the top surface of each of the first chips 201, and then broken through a lamination process. The breakage point of the isolation film 202 is located at the edge P of the top surface of each of the first chips 201. In other words, while mechanical pressure is used to bond the isolation film 202 to the top surface of each of the first chips 201, the portion of the isolation film 202 that is in contact with the edge P of the top surface of each of the first chips 201 breaks along the edge P of the first chip 201 under the corner pressure. Furthermore, the broken portion of the isolation film 202 falls below each of the first chips 201 and directly covers the exposed surface of the substrate 200; that is, the surface of the substrate 200 surrounding the first chips 201.

[0050] Furthermore, such as Figure 4 and Figure 7As shown, after the isolation film 202 is broken by pressure molding, it is thermosetting into a fluid state. After the curing stage, the broken isolation film 202 located on the substrate 200 can cover a portion of the sidewall of the first chip 201. The covered portion of the sidewall of the first chip 201 is close to the bottom surface of the first chip 201, thereby forming a sealed cavity T between the first chip 201 and the substrate 200.

[0051] It should be noted that the coating process of the isolation membrane 202 in this embodiment does not require mechanical stretching, thus ensuring that the isolation membrane 202 maintains its initial thickness before and after breakage, i.e., it has good film thickness uniformity. Based on this, for the subsequently formed molding layer 203, the stress support of the isolation membrane 202 is uniform throughout, effectively avoiding damage to the isolation membrane 202 due to large stress differences, which would affect the stability of the sealing cavity T.

[0052] Furthermore, to ensure that the separator 202 maintains a uniform film thickness after being broken by pressure coating, the separator 202 provided in this embodiment has an elongation at break of <10% at room temperature. Preferably, the elongation at break of the separator 202 at room temperature is <5%. It should be noted that the elongation at break is a core indicator for measuring the film's ductility, which refers to the percentage of the total elongation of the film until it breaks in a tensile test relative to the original gauge length. The smaller the elongation at break, the worse the ductility; conversely, the better the ductility. The TSA-16 film used in the prior art can achieve an elongation at break of 500%, indicating that the film breaks only when stretched to 6 times its original length, exhibiting good ductility and meeting the requirements of stretch coating. In this example, the separator 202 needs to break rapidly at the edge P of the first chip 201 to avoid uneven film thickness caused by stretching. Therefore, in this embodiment, the elongation at break of the isolation film 202 at room temperature is <10%, which ensures that the isolation film 202 breaks rapidly at the edge P relative to the first chip 201 without undergoing large deformation, and ensures that the isolation film 201 remains uniform in thickness after breaking. This allows the isolation film 201 to uniformly bear the compressive stress of the molding layer 203 while ensuring the formation of the sealing cavity T, thereby improving the stability of the sealing cavity T.

[0053] Furthermore, the separator 202 possesses thermosetting properties and a certain degree of fluidity. The thermosetting property refers to the irreversible chemical cross-linking reaction that occurs when the separator 202 undergoes heating, pressurization, or the action of a curing agent, forming a three-dimensional network structure that cannot be melted or repeatedly reshaped upon reheating. Therefore, the thermosetting property ensures that the separator 202, after curing, exhibits high heat resistance, high mechanical strength, and dimensional stability, and is not affected by the high temperature and high pressure of the molding layer 203 and subsequent processes, effectively constraining its deformation and contributing to the stability of the sealing cavity T, thereby improving device yield. The fluidity refers to the softening and flow of the separator 202 during the curing stage after the membrane is broken by pressure, ensuring the formation of a sealing cavity T with optimal sealing performance.

[0054] Preferably, the material of the separator 202 includes, but is not limited to, a resin-based material with inorganic fillers.

[0055] Understandable, Figures 4 to 7 In the structure shown, both first chips 201 are filter chips. Therefore, after the packaging process is completed, the bottom of both first chips 201, surrounded by the broken portion of the isolation film 202, forms the sealing cavity T. In actual processes, the module packaging structure generally includes both the first chip 201 and the second chip; that is, a non-filter chip. The non-filter chip does not require the formation of a sealing cavity T at its bottom; instead, the molding compound 203 needs to fully cover and fill the gap between its bottom and the substrate 200 to prevent short circuits due to solder bridging. Therefore, this embodiment combines... Figures 8 to 12 The module packaging structure is described in detail with the simultaneous presence of the filter chip 206 and the non-filter chip 207 as another example.

[0056] Please see Figure 8 and Figure 9 A solder mask layer 204 and pads 205 are formed on the substrate 200. The solder mask layer 204 is made of an epoxy resin-based photosensitive thermosetting material and is cured by resin cross-linking to form an insulating protective layer. The pads 205 are conductive and can be made of copper, silver, nickel, or other metals or metal alloys. Therefore, the solder mask layer 204 defines the chip mounting position, and the pads 205 are used to connect with the chip during mounting to achieve signal extraction. Preferably, the pads 205 in the mounting area of ​​the filter chip 206 use a solder mask defined (SMD) window or a non-solder mask defined (NSMD) window. The pads 205 in the mounting area of ​​the non-filter chip 207 can use an NSMD window with all solder mask applied.

[0057] Furthermore, the filter chip 206 includes a first substrate 206a, interdigitated electrodes 206b, and a first connecting post 206c. The first substrate 206a contains numerous device films of the filter chip 206. The interdigitated electrodes 206b are disposed on the surface of the first substrate 206a and are used to regulate the frequency of electromagnetic signals, enabling signal conduction in specific frequency bands, suppressing noise, and ensuring signal filtering and transmission purity. The first connecting post 206c is made of metal and is used to connect to the corresponding pad 205 during chip mounting to achieve electrical connection. The non-filter chip 207 includes a second substrate 207a and a second connecting post 207b. The second substrate 207a contains numerous device films of the non-filter chip 207. The second connecting post 207b is also made of metal and is similarly used to connect to the corresponding pad 205 during chip mounting to achieve electrical connection. Preferably, the non-filtering chip 207 includes, but is not limited to, a switch, a power amplifier (PA), and a low noise amplifier (LNA).

[0058] Please see Figure 10 The isolation film 202 also covers the second chip. Specifically, the isolation film 202 covers the top surfaces of the filter chip 206 and the non-filter chip 207, and the edges P of the top surfaces of the filter chip 206 and the non-filter chip 207 are fractured by pressure molding. The elongation at break of the isolation film 202 at room temperature is <10%; preferably, the elongation at break of the isolation film 202 at room temperature is <5%, to ensure that the isolation film 202 can break quickly under pressure molding, is not easily deformed, and ensures that the isolated film 202 maintains a uniform film thickness after fracture, thereby uniformly resisting the molding compression stress.

[0059] Please see Figure 10 and Figure 11 The portion of the isolation film 202 that is broken at the edge P of the top surface of the filter chip 206 also covers a portion of the sidewall of the filter chip 206. This covered portion of the sidewall of the filter chip 206 is close to the bottom surface of the filter chip 206, forming a sealed cavity T between the filter chip 206 and the substrate 200. In other words, after the film is broken by pressure, a curing process is performed on the isolation film 202, allowing a portion of the isolation film 202 located on the substrate 200 surrounding the filter chip 206 to soften and flow, adhering to and covering the portion of the sidewall of the filter chip 206 close to the substrate 200. Thus, after the curing stage, the filter chip 206 and the substrate 200 are surrounded by the isolation film 202, forming the sealed cavity T.

[0060] Furthermore, since the separator 202 is thermosetting, it is not easily deformed after the curing stage, exhibiting strong stability. Therefore, as... Figure 12 As shown, after the molding process, a molding layer 203 is formed on the surface of the separator 202. The molding layer 203 applies a certain compressive stress to the separator 202. Since the separator 202 is thermosetting and has a uniform thickness, the molding of the molding layer 203 will not cause deformation or damage to the separator 202, effectively ensuring the stability of the sealing cavity T and improving the reliability and yield of the device.

[0061] Please continue reading. Figure 9 , Figure 10 and Figure 12 Since the sealing cavity T does not need to be formed at the bottom of the non-filter chip 207, the height of the second connecting post 207b is increased in this embodiment, and / or the solder mask layer 204 below the non-filter chip 207 is removed, so that there is a gap between the broken portion of the isolation film 202 at the edge P of the top surface of the non-filter chip 207 and the bottom surface of the non-filter chip 207. Preferably, the film thickness of the broken portion of the isolation film 202 at the edge P of the top surface of the non-filter chip 207 is less than 2 / 3 of the distance d between the bottom surface of the non-filter chip 207 and the substrate 200. Based on the existence of the gap, as Figure 12 As shown, the molding compound 203, after filling the gaps, also covers the space between the bottom surface of the non-filter chip 207 and the substrate 200. That is, the bottom surface of the non-filter chip 207 is not completely sealed by the isolation film 202, but rather has certain gaps, allowing the molding compound 203 to fill the space between the bottom surface of the non-filter chip 207 and the corresponding top surface of the substrate 200, ensuring better isolation and preventing short circuits due to solder bridging. Furthermore, the molding compound 203 also covers the exposed sidewalls of the filter chip 206 and the non-filter chip 207, fully encapsulating each chip and the substrate 200, providing physical protection, electrical insulation, structural stability, and auxiliary heat dissipation.

[0062] Based on the same concept, this embodiment also provides an electronic device. The electronic device includes the module packaging structure described above. For example, the electronic device is a radio frequency (RF) device.

[0063] In summary, this embodiment provides a module packaging structure and an electronic device. The isolation film 202 disposed within the module packaging structure has a low elongation at break, thus enabling the portion of the isolation film 202 located at the edge P of the top surface of the filter chip 206 and the non-filter chip 207 to break rapidly under pressure, and is less prone to tensile deformation. This ensures that the thickness of the isolation film 202 remains uniform after breakage, which is beneficial for evenly resisting the molding of the encapsulation layer 203. Furthermore, the broken isolation film 202 falls onto the substrate 200 and can surround the bottom of the filter chip 206 and the corresponding surface of the substrate 200 to form the sealed cavity T. Based on the uniform thickness and thermosetting properties of the isolation film 202, the compressive stress formed by the encapsulation layer 203 will not affect the morphology of the isolation film 202, effectively ensuring the stability of the sealed cavity T and improving the reliability and yield of the device.

[0064] Furthermore, if there is a gap between the broken isolation film 202 and the bottom of the non-filter chip 207, the molding layer 203 can fill and cover the area between the bottom of the non-filter chip 207 and the corresponding surface of the substrate 200 through the gap, thereby achieving effective isolation protection, avoiding device short circuit problems, and eliminating the need for laser film breaking or other methods to achieve filling, which is beneficial to ensuring the consistency and stability of device processes.

[0065] Therefore, the module packaging structure and electronic devices provided in this embodiment can simultaneously achieve full bottom filling of the non-filter chip 207 and improve the sealing performance and stability of the bottom sealing cavity T of the filter chip 206.

[0066] Furthermore, it should be understood that although the present invention has been disclosed above with reference to preferred embodiments, these embodiments are not intended to limit the present invention. For any person skilled in the art, many possible variations and modifications can be made to the present invention's technical solutions using the disclosed technical content, or equivalent embodiments can be modified accordingly, without departing from the scope of the present invention's technical solutions. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention, without departing from the content of the present invention's technical solutions, shall still fall within the protection scope of the present invention's technical solutions.

Claims

1. A module packaging structure, characterized in that, include: substrate; A first chip is mounted on the substrate; Separating membrane; The isolation film is attached to the top surface of the first chip; Furthermore, a portion of the isolation film located at the edge of the top surface of the first chip is broken by pressure molding, and the broken portion of the isolation film falls onto a portion of the substrate surrounding the corresponding first chip; wherein at least a portion of the isolation film falling onto the substrate also surrounds the corresponding first chip to form a sealed cavity between the corresponding first chip and the substrate; A molding layer that at least covers the surface of the release membrane.

2. The module packaging structure according to claim 1, characterized in that, The elongation at break of the separator is <10%.

3. The module packaging structure according to claim 1, characterized in that, The elongation at break of the separator is <5%.

4. The module packaging structure according to claim 1, characterized in that, The insulating membrane is thermosetting.

5. The module packaging structure according to claim 1, characterized in that, The first chip includes a filter chip; wherein, The portion of the isolation membrane that falls around the filter chip also covers a portion of the sidewalls of the filter chip; and the covered portion of the sidewalls of the filter chip is close to the bottom surface of the filter chip to form the sealing cavity between the filter chip and the substrate.

6. The module packaging structure according to claim 1, characterized in that, A second chip is also mounted on the substrate; wherein... The isolation film is also attached to the top surface of the second chip; and a portion of the isolation film located at the edge of the top surface of the second chip is broken by pressure; the broken portion of the isolation film falls onto the substrate around the corresponding second chip, and there is a gap between it and the bottom surface of the corresponding second chip.

7. The module packaging structure according to claim 6, characterized in that, The second chip includes a non-filter chip; wherein the thickness of the isolation film in the portion surrounding the non-filter chip is less than 2 / 3 of the distance between the bottom surface of the non-filter chip and the substrate.

8. The module packaging structure according to claim 6, characterized in that, The molding layer also fills and covers the space between the bottom surface of the second chip and the substrate through the gap.

9. The module packaging structure according to claim 6, characterized in that, The molding layer also covers the exposed sidewalls of the first chip and the second chip.

10. An electronic device, characterized in that, Includes the module packaging structure as described in any one of claims 1 to 9.