A dual threshold polarity configurable digital input detection circuit

CN224840303UActive Publication Date: 2026-10-09WENZHOU CHANGJIANG AUTOMOBILE ELECTRONICS SYST
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Patent Information

Application Number
CN202522354158.5
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-11-05
Publication Date
2026-10-09
Estimated Expiration
2035-11-05

AI Technical Summary

Technical Problem

然而,AOI仅能检测元器件的贴装状态,无法验证电路功能是否正常;ICT虽能进行电气性能测试,但在多通道、多极性信号共存的复杂电路中,易出现漏检、误判等问题,难以全面覆盖功能逻辑验证的需求

Benefits of technology

[0007]通过采用上述技术方案,通过设置由两路检测支路组成的核心检测模块,并分别接入高电平参考源和低电平参考源,利用外部控制信号选通检测支路,实现了极性可配置的输入检测功能,这使得该电路能够灵活适应低电平有效或高电平有效信号的检测需求,解决了汽车电子域控制器中多通道、多极性信号共存时检测覆盖不全的难题;同时,输出端连接待测电路并结合稳压电路,确保了检测信号的稳定性和可靠性,避免了因负载变化引起的电压波动,从而提高了检测精度和功能安全性,有效减少了电阻漏贴、错贴等工艺缺陷导致的信号采集异常风险。

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Abstract

The utility model discloses a kind of dual-threshold value polarity configurable digital input detection circuit, including core detection module, core detection module is made of two-way detection branch, two-way detection branch is equipped with switching device, and high level reference source and low level reference source are respectively accessed;Through the control signal provided by outside, one-way detection branch can be gated on;The output end of core detection module is connected with the low level active signal circuit and / or high level active signal circuit to be measured;Between the output end of core detection module and the high level active signal circuit to be measured, there is a voltage stabilizing circuit.The utility model has the following advantages and effects: through the core detection module and voltage stabilizing design of polarity configurable, the comprehensive, accurate and stable function verification of multiple channels high-low level active signal is realized, effectively make up the deficiency of traditional AOI and ICT detection in function logic coverage.
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Description

Technical Field

[0001] This utility model relates to the field of automotive electronic testing technology, and in particular to a dual-threshold polarity configurable digital input detection circuit. Background Technology

[0002] As automotive electronic architecture evolves towards centralized domain controllers, modern domain controller motherboards integrate numerous digital input channels to receive low-level or high-level active signals from various sensors and switch wake-up signals. If manufacturing defects such as missing or incorrect resistor placement occur during the production process, it can lead to abnormal signal acquisition, thereby posing a functional safety risk to the entire vehicle.

[0003] Currently, production inspection for such defects mainly relies on two methods: automated optical inspection (AOI) and in-circuit testing (ICT). However, AOI can only detect the mounting status of components and cannot verify whether the circuit function is normal; although ICT can perform electrical performance testing, it is prone to problems such as missed detection and false judgment in complex circuits with multiple channels and multiple polarity signals, making it difficult to fully cover the needs of functional logic verification.

[0004] Therefore, existing technologies lack a digital input detection scheme that can simultaneously support the detection of active low-level and active high-level signals, has configurable polarity, and can realize multi-channel synchronous function verification. Utility Model Content

[0005] The purpose of this invention is to provide a dual-threshold polarity configurable digital input detection circuit to solve the problems mentioned in the background art.

[0006] The above-mentioned technical objective of this utility model is achieved through the following technical solution: A dual-threshold polarity configurable digital input detection circuit is characterized by comprising a core detection module, which consists of two detection branches. Each detection branch is equipped with a switching device and is respectively connected to a high-level reference source and a low-level reference source. Through an externally provided control signal, one of the detection branches can be selected, thereby providing a high-level or low-level test signal at the output of the core detection module, realizing a polarity configurable input detection function. The output terminal of the core detection module is connected to a low-level active signal circuit and / or a high-level active signal circuit to be tested; a voltage regulator circuit is connected between the output terminal of the core detection module and the high-level active signal circuit to be tested.

[0007] By adopting the above technical solution, and setting up a core detection module consisting of two detection branches, which are respectively connected to a high-level reference source and a low-level reference source, and using an external control signal to select the detection branches, a polarity-configurable input detection function is realized. This allows the circuit to flexibly adapt to the detection requirements of low-level or high-level active signals, solving the problem of incomplete detection coverage when multiple channels and multiple polarity signals coexist in automotive electronic domain controllers. At the same time, the output terminal is connected to the circuit under test and combined with a voltage regulator circuit to ensure the stability and reliability of the detection signal, avoiding voltage fluctuations caused by load changes, thereby improving detection accuracy and functional safety, and effectively reducing the risk of abnormal signal acquisition caused by process defects such as missing or incorrect resistor placement.

[0008] A further feature is that the voltage regulator circuit is built based on operational amplifier U1 and amplified by transistor Q18 to prevent voltage rise caused by load backflow.

[0009] By adopting the above technical solution, and by constructing a voltage regulator circuit using an operational amplifier U1 and a transistor Q18, and by using the transistor Q18 for current amplification, the driving capability and load adaptability of the circuit are significantly enhanced, preventing voltage rise caused by load backflow. This ensures the stability of the detection signal when connected to a high-level active signal circuit, reduces the possibility of misjudgment and missed detection, improves the robustness and reliability of the overall circuit, simplifies circuit design, and reduces the impact of external interference.

[0010] A further configuration is that the voltage regulator circuit includes a resistor R56 and a diode D15. The positive input pin of the operational amplifier U1 is connected to the output of the core detection module, and the negative input pin is connected to one end of the resistor R56. The other end of the resistor R56 is connected to the positive terminal of the diode D15, which serves as the first output detection terminal and is connected to the low-level active signal circuit to be tested. The negative terminal of the diode D15 is connected to the emitter of the transistor Q18, and the output pin of the operational amplifier U1 is connected to the base of the transistor Q18. The collector of the transistor Q18 is grounded.

[0011] By adopting the above technical solution and specifically defining the connection method of operational amplifier U1, resistor R56 and diode D15 in the voltage regulator circuit, precise voltage feedback control is achieved. The introduction of diode D15 effectively prevents reverse current interference, while the setting of the first output detection terminal facilitates direct connection to the circuit under test low-level active signal, simplifies the circuit layout and testing process, and improves detection efficiency. This design also enhances the circuit's noise immunity and stability, ensuring the accuracy of the detection signal in complex environments.

[0012] A further configuration is that both detection branches are equipped with interlocking units. Each interlocking unit includes a first transistor, a first resistor, a second resistor, and a third resistor. The base of the first transistor is connected to one end of the first resistor and one end of the second resistor. The other end of the second resistor and the emitter of the first transistor are both grounded. The collector of the first transistor is connected to one end of the third resistor, which serves as a driving terminal to control the corresponding switching device to turn on / off. The other end of the third resistor is connected to the power supply. One unused end of the first resistor in the first detection branch is connected to the collector of the first transistor in the second detection branch. The unused end of the first resistor in the second detection branch serves as a control terminal for receiving externally provided control signals.

[0013] By adopting the above technical solution, and by setting an interlocking unit in the two detection branches, including a first transistor, a first resistor, a second resistor, and a third resistor, the interlocking function of the control signal is realized, ensuring that the two detection branches will not be selected at the same time, thereby avoiding the risk of power supply short circuit, improving the safety and reliability of the circuit, and thus enhancing the stability and service life of the overall system.

[0014] A further feature is that both detection branches are equipped with delay circuits to prevent short circuits from occurring when both detection branches are selected simultaneously.

[0015] By adopting the above technical solution and adding a delay circuit to the two detection branches, the instantaneous short circuit phenomenon of the two detection branches being simultaneously turned on during the switching process is effectively prevented. The delay circuit provides the necessary timing delay, ensuring the smooth switching of the control signal and reducing transient current impact. This improves the reliability and durability of the circuit, avoids equipment damage caused by switching synchronization problems, and optimizes the synchronization function verification in multi-channel detection.

[0016] A further configuration is that the delay circuit includes a first diode, a second diode, a fourth resistor, and a fifth resistor. The cathode of the first diode is connected to the driving terminal of the corresponding interlocking unit and one end of the fifth resistor. The other end of the fifth resistor is connected to the anode of the second diode. The cathode of the second diode is connected to one end of the fourth resistor, which is also connected to the trigger pin of the corresponding switching device. The other end of the fourth resistor is connected to the anode of the first diode.

[0017] By adopting the above technical solution, the addition of diodes ensures unidirectional current flow and signal isolation, prevents feedback interference, and this design is low in cost and highly reliable. It effectively controls the turn-on and turn-off timing of switching devices, avoids transient short circuits and voltage spikes, and improves the overall circuit performance and safety margin.

[0018] A further configuration is that the switching device is a MOSFET; the gates of the MOSFETs in the first detection branch and the second detection branch are respectively connected to the negative terminals of the second diodes in the corresponding delay circuits; the drain of the MOSFET in the first detection branch is connected to a high-level reference source; the source of the MOSFET in the second detection branch is connected to a low-level reference source; and the source of the MOSFET in the first detection branch and the drain of the MOSFET in the second detection branch are connected together. This terminal serves as the output terminal of the core detection module.

[0019] By adopting the above technical solution and using MOSFETs as switching devices, the high input impedance and fast switching characteristics of MOSFETs are utilized to improve the response speed and energy efficiency of the detection circuit. By connecting high-level and low-level reference sources and combining them with a delay circuit to control the gate voltage, the smoothness and reliability of the switching action are ensured, power loss is reduced, and the circuit layout is optimized, making it easier to integrate and expand into multiple channels.

[0020] A further setting is that the high-level reference source is set to 5.3V and the low-level reference source is set to 1.8V.

[0021] By adopting the above technical solution, and by setting the high-level reference source to 5.3V and the low-level reference source to 1.8V, a clear dual-threshold voltage level is provided. These voltage values ​​closely match the typical operating environment of automotive electronic domain controllers, ensuring the consistency of the detection signal with the actual application scenario and improving the accuracy and applicability of the detection. The dual-threshold setting allows the circuit to accurately distinguish between high and low level signals, effectively identify process defects such as missing or incorrect resistor mounting, and reduce the functional safety risks of the entire vehicle.

[0022] In summary, this utility model has the following beneficial effects: through the core detection module with configurable polarity and voltage regulation design, it realizes comprehensive, accurate and stable functional verification of multi-channel high and low level effective signals, effectively making up for the shortcomings of traditional AOI and ICT detection in functional logic coverage. Attached Figure Description

[0023] Figure 1 The circuit diagram is for an example. Detailed Implementation

[0024] The present invention will be further described in detail below with reference to the accompanying drawings.

[0025] As attached Figure 1 As shown; This embodiment discloses a dual-threshold polarity configurable digital input detection circuit, including a core detection module. The core detection module consists of two detection branches, each equipped with a switching device and connected to a high-level reference source and a low-level reference source, respectively. Through an externally provided control signal, one of the detection branches can be selected, thereby providing a high-level or low-level test signal at the output of the core detection module, realizing the polarity configurable input detection function. The output of the core detection module is connected to a low-level active signal circuit and / or a high-level active signal circuit to be tested; a voltage regulator circuit is connected between the output of the core detection module and the high-level active signal circuit to be tested.

[0026] In one possible implementation, the voltage regulator circuit is built based on operational amplifier U1 and current amplified by transistor Q18 to prevent voltage rise due to load backflow. Preferably, operational amplifier U1 is an LM2902MX.

[0027] In one possible implementation, the voltage regulator circuit includes a resistor R56 and a diode D15. The positive input pin of operational amplifier U1 is connected to the output of the core detection module, and the negative input pin is connected to one end of resistor R56. The other end of resistor R56 is connected to the positive terminal of diode D15, which serves as the first output detection terminal connected to the low-level active signal circuit under test. The negative terminal of diode D15 is connected to the emitter of transistor Q18, and the output pin of operational amplifier U1 is connected to the base of transistor Q18. The collector of transistor Q18 is grounded. Pin 4 of operational amplifier U1 is connected to the power supply, supporting single power supply from 3V to 32V. Pin 11 of operational amplifier U1 is grounded.

[0028] In one possible implementation, both detection branches are equipped with interlocking units. Each interlocking unit includes a first transistor, a first resistor, a second resistor, and a third resistor. The base of the first transistor is connected to one end of the first resistor and one end of the second resistor. The other end of the second resistor and the emitter of the first transistor are both grounded. The collector of the first transistor is connected to one end of the third resistor, which serves as the driving terminal to control the corresponding switching device's on / off state. The other end of the third resistor is connected to the power supply. It should be noted that the second output detection terminal is the output terminal of the core detection module and is then directly connected to the high-level active signal circuit under test.

[0029] The unused end of the first resistor in the first detection branch is connected to the collector of the first transistor in the second detection branch. The unused end of the first resistor in the second detection branch serves as a control terminal to receive externally provided control signals, which can be high or low levels output by the microcontroller.

[0030] Specifically, the interlocking unit in the first detection branch includes transistor Q16, resistor R50, resistor R49, and resistor R55; the interlocking unit in the second detection branch includes transistor Q15, resistor R20, resistor R21, and resistor R19. The base of transistor Q16 is connected to one end of resistor R50 and one end of resistor R49. The other end of resistor R49 and the emitter of transistor Q16 are both grounded. The collector of transistor Q16 is connected to one end of resistor R55, which serves as the drive terminal to control the on / off state of the corresponding switching device. The other end of resistor R55 is connected to a 14V power supply. The other end of resistor R50 is connected to the collector of transistor Q15. The base of transistor Q15 is connected to one end of resistor R20 and one end of resistor R21. The other end of resistor R21 and the emitter of transistor Q15 are both grounded. The collector of transistor Q15 is connected to one end of resistor R19, which serves as the drive terminal to control the on / off state of the corresponding switching device. The other end of resistor R19 is connected to a 14V power supply. The other end of resistor R20 serves as the control terminal to receive externally provided control signals.

[0031] In one possible implementation, both detection branches are equipped with delay circuits to prevent short circuits from occurring when both detection branches are selected simultaneously.

[0032] In one possible implementation, the delay circuit includes a first diode, a second diode, a fourth resistor, and a fifth resistor. The cathode of the first diode is connected to the drive terminal of the corresponding interlock unit and one end of the fifth resistor. The other end of the fifth resistor is connected to the anode of the second diode. The cathode of the second diode is connected to one end of the fourth resistor, which is also connected to the trigger pin of the corresponding switching device. The other end of the fourth resistor is connected to the anode of the first diode.

[0033] Specifically, the delay circuit in the first detection branch includes diodes D8 and D7, resistors R53 and R54. The cathode of diode D8 is connected to the collector of transistor Q16 and one end of resistor R54. The other end of resistor R54 is connected to the anode of diode D7. The cathode of diode D7 is connected to one end of resistor R53, which is also connected to the trigger pin of the corresponding switching device. The other end of resistor R53 is connected to the anode of diode D8. The delay circuit in the second detection branch includes diodes D5 and D6, resistors R52 and R51. The cathode of diode D5 is connected to the collector of transistor Q15 and one end of resistor R52. The other end of resistor R52 is connected to the anode of diode D6. The cathode of diode D6 is connected to one end of resistor R51, which is also connected to the trigger pin of the corresponding switching device. The other end of resistor R51 is connected to the anode of diode D5.

[0034] In one possible implementation, the switching device is a MOSFET; the gates of the MOSFETs in the first detection branch and the second detection branch are respectively connected to the negative terminals of the second diodes in the corresponding delay circuits; the drain of the MOSFET in the first detection branch is connected to a high-level reference source; the source of the MOSFET in the second detection branch is connected to a low-level reference source; and the source of the MOSFET in the first detection branch and the drain of the MOSFET in the second detection branch are connected together. This terminal serves as the output terminal of the core detection module.

[0035] Specifically, the switching device in the first detection branch is a MOSFET Q26, with its gate connected to the cathode of diode D7, and this terminal grounded through capacitor C6; the drain of MOSFET Q26 is connected to a high-level reference source. The switching device in the second detection branch is a MOSFET Q25, with its gate connected to the cathode of diode D6, and this terminal grounded through capacitor C5; the source of MOSFET Q25 is connected to a low-level reference source, and the source of MOSFET Q26 is connected to the drain of MOSFET Q25. This terminal serves as the output of the core detection module, which is connected to a low-level active signal circuit and / or a high-level active signal circuit. Preferably, both a low-level active signal circuit and a high-level active signal circuit are connected simultaneously to improve utilization. The low-level active signal circuit includes resistors R58, R59, and R60; the high-level active signal circuit includes resistors R57, R61, and R62.

[0036] More specifically, the high-level reference source is set to 5.3V, and the low-level reference source is set to 1.8V.

[0037] This specific embodiment is merely an explanation of the present utility model and is not intended to limit the present utility model. After reading this specification, those skilled in the art can make modifications to this embodiment without contributing any inventive step, but as long as they are within the scope of the claims of the present utility model, they are protected by patent law.

Claims

1. A dual-threshold polarity configurable digital input detection circuit, characterized in that: It includes a core detection module, which consists of two detection branches. Each detection branch is equipped with a switching device and is connected to a high-level reference source and a low-level reference source, respectively. Through an externally provided control signal, one of the detection branches can be selected, thereby providing a high-level or low-level test signal at the output of the core detection module, realizing a polarity-configurable input detection function. The output terminal of the core detection module is connected to a low-level active signal circuit and / or a high-level active signal circuit to be tested; a voltage regulator circuit is connected between the output terminal of the core detection module and the high-level active signal circuit to be tested.

2. The dual-threshold polarity configurable digital input detection circuit according to claim 1, characterized in that: The voltage regulator circuit is built on operational amplifier U1 and amplifies the current through transistor Q18 to prevent voltage rise caused by load backflow.

3. The dual-threshold polarity configurable digital input detection circuit according to claim 2, characterized in that: The voltage regulator circuit includes a resistor R56 and a diode D15. The positive input pin of the operational amplifier U1 is connected to the output of the core detection module, and the negative input pin is connected to one end of the resistor R56. The other end of the resistor R56 is connected to the positive terminal of the diode D15, which serves as the first output detection terminal and is connected to the low-level active signal circuit to be tested. The negative terminal of the diode D15 is connected to the emitter of the transistor Q18, and the output pin of the operational amplifier U1 is connected to the base of the transistor Q18. The collector of the transistor Q18 is grounded.

4. The dual-threshold polarity configurable digital input detection circuit according to claim 3, characterized in that: Both detection branches are equipped with an interlocking unit, which includes a first transistor, a first resistor, a second resistor, and a third resistor. The base of the first transistor is connected to one end of the first resistor and one end of the second resistor. The other end of the second resistor and the emitter of the first transistor are both grounded. The collector of the first transistor is connected to one end of the third resistor, which serves as a driving terminal to control the corresponding switching device to turn on / off. The other end of the third resistor is connected to the power supply. One unused end of the first resistor in the first detection branch is connected to the collector of the first transistor in the second detection branch. The unused end of the first resistor in the second detection branch serves as a control terminal for receiving externally provided control signals.

5. The dual-threshold polarity configurable digital input detection circuit according to claim 4, characterized in that: Both detection branches are equipped with delay circuits to prevent short circuits from occurring when both detection branches are selected simultaneously.

6. The dual-threshold polarity configurable digital input detection circuit according to claim 5, characterized in that: The delay circuit includes a first diode, a second diode, a fourth resistor, and a fifth resistor. The cathode of the first diode is connected to the driving terminal of the corresponding interlocking unit and one end of the fifth resistor. The other end of the fifth resistor is connected to the anode of the second diode. The cathode of the second diode is connected to one end of the fourth resistor, which is also connected to the trigger pin of the corresponding switching device. The other end of the fourth resistor is connected to the anode of the first diode.

7. The dual-threshold polarity configurable digital input detection circuit according to claim 6, characterized in that: The switching device is a MOSFET; the gates of the MOSFETs in the first detection branch and the second detection branch are respectively connected to the negative terminals of the second diodes in the corresponding delay circuits. The drain of the MOSFET in the first detection branch is connected to a high-level reference source, and the source of the MOSFET in the second detection branch is connected to a low-level reference source. The source of the MOSFET in the first detection branch and the drain of the MOSFET in the second detection branch are connected together, and this terminal serves as the output terminal of the core detection module.

8. The dual-threshold polarity configurable digital input detection circuit according to claim 1, characterized in that: The high-level reference source is set to 5.3V, and the low-level reference source is set to 1.8V.