Chip electromagnetic test system and chip production test system
Patent Information
- Application Number
- CN202521849686.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-28
- Publication Date
- 2026-10-09
- Estimated Expiration
- 2035-08-28
AI Technical Summary
[0021]本申请实施例第一方面的有益效果是:芯片电磁测试系统包括分选机、测试机和测试座,分选机与所述测试机通信连接,分选机和所述测试机分别与所述测试座通信连接,分选机用于抓取待测芯片并将所述待测芯片放置于所述测试座上;测试机用于测试所述测试座上的所述待测芯片的电磁参数,以及对测试得到的所述电磁参数进行补偿,实现自动将待测芯片放置于测试座上,并通过测试机对测试座上的芯片进行自动化电磁测试与测试补偿。
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Figure CN224840420U_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of chip testing technology, and in particular relates to a chip electromagnetic testing system and a chip production testing system. Background Technology
[0002] With the rapid development of integrated circuit technology, the integration level and operating frequency of chips are constantly increasing, and their electromagnetic compatibility and electromagnetic radiation characteristics have become key indicators for measuring chip performance. In the chip R&D and mass production stages, accurate testing of electromagnetic parameters is a core aspect of ensuring product reliability, especially in fields with stringent electromagnetic environment requirements such as automotive electronics and aerospace. Even minor electromagnetic interference can cause system failures, making efficient and accurate electromagnetic testing increasingly urgent. Utility Model Content
[0003] In view of this, embodiments of this application provide a chip electromagnetic testing system and a chip production testing system to achieve automated electromagnetic testing and test compensation of chips.
[0004] A first aspect of this application provides a chip electromagnetic testing system, the chip electromagnetic testing system including a sorting machine, a testing machine and a testing socket, the sorting machine being communicatively connected to the testing machine, and the sorting machine and the testing machine being communicatively connected to the testing socket respectively;
[0005] The sorting machine is used to pick up the chip under test and place it on the test socket;
[0006] The testing machine is used to test the electromagnetic parameters of the chip under test on the test socket, and to compensate for the electromagnetic parameters obtained from the test.
[0007] In one embodiment, the test socket includes a load board, the load board including at least one socket for placing the chip under test and connecting to the chip under test.
[0008] In one embodiment, the sorting machine includes a drive module, a robotic arm, a pressure mechanism, and a base plate; the drive module, the robotic arm, and the pressure mechanism are respectively connected to the base plate, the drive module is respectively connected to the robotic arm and the pressure mechanism, and the sorting machine is connected to the load plate through the base plate;
[0009] The drive module is used to drive the robotic arm and the pressure mechanism;
[0010] The robotic arm is used to place the chip under test into the socket;
[0011] The pressure mechanism is used to apply pressure to the chip under test in the socket after the robotic arm places the chip under test in the socket, so as to connect the chip under test to the socket.
[0012] In one embodiment, the test machine includes a test host and a test cable. The test host is used to perform automated testing and test compensation on the chip under test in the socket to obtain test results. The test host is connected to the load board through the test cable.
[0013] In one embodiment, the chip electromagnetic testing system further includes a wireless testing device for verifying the wireless communication performance of the chip under test. The wireless testing device is connected to the test socket and the test machine.
[0014] In one embodiment, the test socket further includes a radio frequency interface, and the wireless test device includes a radio frequency module for generating radio frequency signals;
[0015] The radio frequency module is connected to the radio frequency interface of the test socket via a radio frequency connector, and is used to send the radio frequency signal to the chip under test on the test socket through the radio frequency interface.
[0016] In one embodiment, the RF connector is an SMA connector or a 2.92mm connector.
[0017] In one embodiment, the test socket further includes a thermal management module connected to the socket. The thermal management module includes an NTC sensor, a heat sink, and a microprocessor, wherein the microprocessor is connected to the NTC sensor and the heat sink respectively.
[0018] The NTC sensor is used to detect the temperature of the chip under test in the socket, the heat sink is used to dissipate heat from the chip under test in the socket, and the microprocessor is used to control the working state of the heat sink according to the signal from the NTC sensor.
[0019] In one embodiment, the chip electromagnetic testing system further includes a barcode scanner (5) connected to the tester. The barcode scanner is used to scan the target program QR code and send the address of the target program corresponding to the target program QR code to the tester.
[0020] A second aspect of this application provides a chip manufacturing testing system, which includes a chip electromagnetic testing system and a chip manufacturing system as described above. The chip electromagnetic testing system is connected to the chip manufacturing system and is used to perform automated testing and test compensation on chips produced by the chip manufacturing system as chips under test, thereby obtaining the test results of the chips under test.
[0021] The beneficial effect of the first aspect of the embodiments of this application is that the chip electromagnetic testing system includes a sorting machine, a testing machine, and a testing socket. The sorting machine is communicatively connected to the testing machine, and the sorting machine and the testing machine are respectively communicatively connected to the testing socket. The sorting machine is used to pick up the chip under test and place the chip under test on the testing socket. The testing machine is used to test the electromagnetic parameters of the chip under test on the testing socket and to compensate for the electromagnetic parameters obtained by the test, so as to realize the automatic placement of the chip under test on the testing socket and the automatic electromagnetic testing and test compensation of the chip on the testing socket by the testing machine.
[0022] It is understood that the beneficial effects of the second to fourth aspects mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here. Attached Figure Description
[0023] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0024] Figure 1 This is a schematic diagram of a chip electromagnetic testing system provided in an embodiment of this application;
[0025] Figure 2 This is a schematic diagram of a chip electromagnetic testing system provided in an embodiment of this application;
[0026] Figure 3 This is a schematic diagram of a chip electromagnetic testing system provided in an embodiment of this application;
[0027] Figure 4 This is a schematic diagram of a chip electromagnetic testing system provided in an embodiment of this application;
[0028] Figure 5 This is a schematic diagram of a chip electromagnetic testing system provided in an embodiment of this application;
[0029] Figure 6 This is a schematic diagram of a chip electromagnetic testing system provided in an embodiment of this application;
[0030] Figure 7 This is a schematic diagram of a chip production testing system provided in an embodiment of this application;
[0031] Icon labels:
[0032] Chip electromagnetic testing system-100, chip manufacturing system-200, chip manufacturing testing system-300;
[0033] Sorting machine-1, drive module-11, robotic arm-12, pressure mechanism-13, base plate-14
[0034] Test machine-2, test host-21, test cable-22,
[0035] Test socket-3, load board-31, socket-32, RF interface-33, thermal management module-34, NTC sensor-35, heat sink-36, microprocessor-37;
[0036] Wireless test equipment-4, RF module-41;
[0037] Barcode scanner-5. Detailed Implementation
[0038] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.
[0039] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.
[0040] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.
[0041] As used in this application specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if detected [the described condition or event]" may be interpreted, depending on the context, as meaning "once determined," "in response to determination," "once detected [the described condition or event]," or "in response to detection [the described condition or event]."
[0042] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.
[0043] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.
[0044] This application provides a chip electromagnetic testing system for automated electromagnetic testing and compensation of chips, resulting in accurate test results. The chip electromagnetic testing system includes a sorting machine, a testing machine, and a testing socket. The sorting machine is communicatively connected to the testing machine, and the testing socket is communicatively connected to both the sorting machine and the testing machine. The sorting machine picks up the chip under test (DUT) and places it on the testing socket. The testing machine tests the electromagnetic parameters of the DUT on the testing socket and compensates for the obtained electromagnetic parameters, thereby achieving automated electromagnetic testing and compensation of the DUT to obtain accurate test results.
[0045] like Figure 1 The present application provides a chip electromagnetic testing system 100, which includes a sorting machine 1, a testing machine 2, and a testing socket 3. The sorting machine 1 is communicatively connected to the testing machine 2, and the sorting machine 1 and the testing machine 2 are communicatively connected to the testing socket 3.
[0046] In applications, communication connections include wired connections, such as fiber optic connections, RS485 (Recommended Standard 485), USB (Universal Serial Bus), and wireless connections, such as WiFi and Bluetooth connections.
[0047] The sorting machine 1 is used to pick up the chip under test and place it on the test socket 3.
[0048] In the application, when the produced sample chips are transported through the sorter 1, the sorter uses a robotic arm and a suction nozzle to pick up the chips from the tray and place them into the test socket. The infrared detector in the test socket will identify whether there is any stacking of materials. At the same time, the photoelectric sensor of the robotic arm will record the chip transport action. After the chip is placed, a placement completion signal is sent to the tester to trigger the tester to perform electromagnetic testing on the chip in the test socket.
[0049] The tester 2 is used to test the electromagnetic parameters of the chip under test on the test socket 3, and to compensate for the electromagnetic parameters obtained by the test.
[0050] In application, the test machine automatically retrieves the verification program locally and first verifies the corresponding test environment using the chip under test, including: the contact between the chip pins and the test socket; the contact between the test probes and the load board; the contact between the load board and the test cable; and confirmation of the voltage and current output values of the test machine. The first set of verified data is automatically saved to the test machine's local storage. The test machine analyzes the electromagnetic parameters in the first set of data and automatically compares them with the corresponding second set of test parameters in the GS (Gold Sample) standard database, generating compensation coefficients. If the comparison is successful, the compensation coefficients for the electromagnetic parameters printed in the correction log are empty, and the data is saved to the test machine's local storage. If the comparison fails, the correction log automatically calculates and prints the compensation coefficients for the corresponding electromagnetic parameters that need compensation and automatically saves them to the test machine's local storage. It is understandable that the electromagnetic parameters of the sample chip measured in the laboratory environment meet the gold standard. If the electromagnetic parameters measured in the test environment do not meet the gold standard, it means that the current test environment has interfered with the electromagnetic parameter. Therefore, a compensation coefficient for the electromagnetic parameter affected by the test environment is generated to correct the electromagnetic parameter in the current test environment.
[0051] In application, the standard database is derived from the product after laboratory verification. The standard data of each electromagnetic parameter item is finally presented in a range, and the data of each electromagnetic parameter item of the sample under test after compensation are within this standard range.
[0052] In the application, the electromagnetic parameters to be tested include: the first voltage output after filtering (VOUT0_AF), the zero-crossing detection voltage after filtering (VZCR0_AF), the error voltage after filtering (VOE_AF), the positive and negative terminals of the differential output voltage after filtering (VOUTP20_AF and VOUTN20_AF), the first sub-voltage (SUB_VOUT1), the second sub-voltage (SUB_VOUT2), and the filtered voltage (SUB_VOUT_AF).
[0053] In applications, for chips of the same type, the electrical test parameters are the same. After obtaining the compensation coefficient based on the sample chip, the corresponding electromagnetic parameter control value (through the standard range) is compensated based on the compensation coefficient. For example, the control value of the electromagnetic parameter is adjusted up or down according to the compensation coefficient of the electromagnetic parameter. Electromagnetic tests are then performed directly on subsequent chips of the same type. The electromagnetic parameter test items are then judged to pass the electromagnetic test based on the compensated control value of the test parameter items.
[0054] In applications, the sorter 1 is also used to place chips that fail the electromagnetic test on the "failure return" line, which returns them to the front end of the production line for fault analysis and recycling; while placing chips that pass the test on the "outgoing" line, which enters the packaging and packaging stage, and is finally delivered to the customer.
[0055] like Figure 2 As shown, in one embodiment, the test socket includes a load board 31, the load board 31 including at least one socket 32 for placing the chip under test and connecting to the chip under test.
[0056] In applications, a socket is a physical device specifically used to secure and contact a chip. The socket is mounted on a load board and makes electrical contact with the chip's pins via probes or a conductive medium. The type of socket varies depending on the chip's package type to ensure a stable chip position and reliable electrical contact. For example, a specially designed BGA socket is required for BGA (Ball Grid Array) packages, while a corresponding QFN socket is available for QFN (Quad Flat No-leads Package) packages. Essentially, the socket can be detachable, allowing for flexible adaptation to different package types of the chip under test.
[0057] like Figure 2 As shown, in one embodiment, the sorting machine 1 includes a drive module 11, a robotic arm 12, a pressure mechanism 13, and a base plate 14; the drive module 11, the robotic arm 12, and the pressure mechanism 13 are respectively connected to the base plate 14, the drive module 11 is respectively connected to the robotic arm 12 and the pressure mechanism 13, and the sorting machine 1 is connected to the load plate 31 through the base plate 14.
[0058] In application, the base plate 14 serves as the supporting foundation for the drive module 11, robotic arm 12, and pressure mechanism 13 in the sorting machine 1. Through a stable mechanical structure, these components are integrated into a whole, ensuring the stability of their relative positions during operation and providing structural support for the precise operation of the equipment. The material can generally be a metal, such as aluminum alloy, stainless steel, or copper alloy; engineering plastics, such as polytetrafluoroethylene (PTFE), polyimide (PI), or glass fiber reinforced plastic (FR4); or composite materials, such as metal-ceramic or plastic composites.
[0059] In the application, the sorter 1 is connected to the load board 31 via the base plate 14. This connection is achieved through specific mechanical positioning structures (such as positioning pins, clips, etc.) to ensure precise alignment and stable connection between the two, preventing vibration or displacement from affecting the equipment's operation during testing. Electrical connections are also established via probes or spring pins to ensure stable and reliable electrical signal transmission between the sorter 1 and the load board 31. This provides the necessary circuit connection foundation for subsequent testing of the chip under test, ensuring accurate signal transmission during the testing process.
[0060] The drive module 11 is used to drive the robotic arm 12 and the pressure mechanism 13.
[0061] In the application, the drive module 1 plays the role of power source and control core in the operation of the sorting machine 1. Its main function is to provide driving force for the robotic arm 12 and the pressure mechanism 13, and to precisely control their operation. Through the action of the drive module 11, the robotic arm can move according to the preset program and path, and the pressure mechanism can also apply the corresponding pressure at the appropriate time, thereby ensuring that all components of the sorting machine can work in a coordinated and orderly manner, meeting the various requirements for processing and testing the chips under test.
[0062] The robotic arm 12 is used to place the chip under test into the socket 32.
[0063] The pressure mechanism 13 is used to apply pressure to the chip under test in the socket 32 after the robotic arm 12 places the chip under test in the socket 32, so that the chip under test is connected to the socket 32.
[0064] In the application, the pressure mechanism 13 applies appropriate pressure to the chip under test (DUT) in the socket 32. This pressure ensures a tight and reliable connection between the DUT and the socket 32. This connection is not only physically secure but, more importantly, ensures a good electrical connection between the chip's pins and the corresponding contact points of the socket. This guarantees smooth signal transmission during subsequent testing, ensuring the accuracy and reliability of the test results. The pressure needs to be precisely adjusted according to different types of chips and sockets to ensure a good connection while avoiding excessive pressure that could damage the chip.
[0065] like Figure 2 As shown, in one embodiment, the test machine 2 includes a test host 21 and a test cable 22. The test host 21 is used to perform automated testing and test compensation on the chip under test in the socket 32 to obtain test results. The test host 21 is connected to the load board 31 through the test cable 22.
[0066] In this application, the host computer is a computer capable of running test programs (such as LabVIEW or TestStand) and coordinating the test process. Test cables are used to transmit test signals generated by the host computer to the chip under test (DUT) and to transmit the DUT's response signals back to the host computer.
[0067] like Figure 3 As shown, in one embodiment, the chip electromagnetic testing system 100 further includes a wireless testing device 4, which is used to verify the wireless communication performance of the chip under test. The wireless testing device 4 is connected to the test socket 3 and the test machine 2.
[0068] In the application, the wireless test device 4 establishes connections with both the test socket 3 and the test machine 2, forming a collaborative test link. The connection with the test socket 3 allows it to directly interact with the chip under test (DUT) placed in the socket 32, accurately capturing the chip's wireless communication behavior. The connection with the test machine 2 enables the reception of test commands, the uploading of test data, and the coordinated control of the test process: the test machine 2 can send wireless test-related parameter configurations to the wireless test device 4, and the wireless test device 4 feeds back the raw data collected during the test to the test machine 2, which then performs comprehensive analysis and result determination, forming a complete test closed loop.
[0069] In this application, the wireless test device 4 specifically uses LitePoint equipment. LitePoint is a well-known provider of wireless communication test solutions in the industry. Its equipment is known for its high precision, high reliability, and wide compatibility, and can support testing of various wireless communication protocols such as Wi-Fi, Bluetooth, cellular networks (such as 5G and 4G), NFC, and Zigbee.
[0070] When using the LitePoint device as the wireless test device 4, its workflow is as follows: Under the control of the test unit 2, the LitePoint device simulates various real wireless communication scenarios (such as different signal strengths, multi-device interference environments, etc.), sends specific wireless test signals to the chip under test, and receives the response signals returned by the chip; through the built-in high-precision RF analysis module, the LitePoint device can measure key parameters such as signal frequency, power, modulation quality, and bit error rate, and transmit these data to the test host 21 in real time; the test host 21 analyzes and compensates for the data in combination with the preset test standards (such as eliminating the influence of electromagnetic interference in the test environment), and finally determines whether the wireless communication performance of the chip under test meets the standards.
[0071] like Figure 4 As shown, in one embodiment, the test socket 3 further includes an RF interface 33, and the wireless test device 4 includes an RF module 41, which is used to generate RF signals;
[0072] The radio frequency module 41 is connected to the radio frequency interface 33 of the test socket via a radio frequency connector, and is used to send the radio frequency signal to the chip under test on the test socket 3 through the radio frequency interface 33.
[0073] In the application, the test 3 RF interface 33 is a physical interface specifically designed for transmitting RF signals. It is associated with the socket 32 and can accurately transmit externally input RF signals to the chip under test placed in the socket 32, while also exporting the RF signals emitted by the chip. The RF interface is designed to match the transmission characteristics of RF signals, featuring low loss and high shielding to reduce signal attenuation or interference during transmission and ensure signal integrity.
[0074] In applications, the radio frequency module 41 of the wireless test equipment 4 can generate radio frequency signals of specific frequencies, power, and modulation methods according to test requirements. These signals simulate the wireless signals that the chip under test may receive or transmit in actual operation (such as Wi-Fi 2.4GHz / 5GHz signals, Bluetooth 2.4GHz signals, etc.). The performance of the radio frequency module 41 directly determines the test accuracy, therefore it has the characteristics of wide frequency range, high signal purity, and large adjustable parameter range to meet the test requirements of different types of wireless chips.
[0075] In one embodiment, the RF connector is an SMA connector or a 2.92mm connector.
[0076] In applications, the SMA connector, or Sub-Miniature Version A connector, is a widely used small-to-medium-sized RF connector. Its structural design provides excellent signal transmission stability in the low-to-mid-frequency bands. Its advantages include relatively low cost, high connection reliability, and strong versatility, meeting the testing requirements of most mainstream wireless communication technologies. Specifically, the SMA connector is suitable for scenarios with frequencies below 18GHz, such as Wi-Fi 6 (operating primarily in the 2.4GHz and 5GHz bands), Wi-Fi 6E (adding the 6GHz band), Bluetooth (2.4GHz band), and low-frequency UWB (ultra-wideband, frequencies below 6-8GHz) technologies. In these applications, the SMA connector effectively reduces signal loss and reflection, ensuring the integrity of the test signal and providing a stable connection guarantee for the performance verification of low-to-mid-frequency wireless chips.
[0077] In applications, the 2.92mm connector is a high-precision, high-frequency RF connector. Its design is optimized for high-frequency signal transmission, offering a wider frequency coverage and superior high-frequency performance. Compared to SMA connectors, it maintains lower insertion loss and better impedance matching at higher frequencies, making it suitable for high-frequency scenarios exceeding 18GHz. Typical applications include testing emerging wireless technologies such as Wi-Fi 7 (supporting higher frequency bands above 6GHz, with some versions covering bands above 10GHz), 5G millimeter wave (frequency at 24GHz and above), and high-frequency UWB (frequency potentially reaching above 20GHz). These high-frequency technologies demand extremely high stability and accuracy in signal transmission. The 2.92mm connector, with its precise structure and high-frequency adaptability, effectively reduces distortion of high-frequency signals during transmission, ensuring the accuracy of test data and meeting the testing requirements of high-end high-frequency wireless chips.
[0078] In applications, the choice between SMA connectors and 2.92mm connectors primarily depends on the operating frequency band of the wireless communication technology supported by the chip under test (DUT): SMA connectors are preferred for low-to-mid-frequency scenarios, balancing cost and performance; while 2.92mm connectors are required for high-frequency scenarios to meet the stringent requirements of high-frequency signal transmission. This differentiated selection design allows the test system to flexibly adapt to the testing needs of different types of wireless chips, ensuring the professionalism and reliability of the testing.
[0079] like Figure 5As shown, in one embodiment, the test socket 3 further includes a thermal management module 34, which is connected to the socket 32. The thermal management module includes an NTC sensor 35, a heat sink 36, and a microprocessor 37, which is connected to the NTC sensor 35 and the heat sink 36 respectively.
[0080] The NTC sensor 35 is used to detect the temperature of the chip under test in the socket 32, the heat sink 36 is used to dissipate heat from the chip under test in the socket 32, and the microprocessor 37 is used to control the working state of the heat sink 36 according to the signal from the NTC sensor 35.
[0081] In applications, the NTC sensor (Negative Temperature Coefficient Sensor) 35 is attached to the socket 32 or the surface of the chip under test, enabling real-time sensing of temperature changes during the testing process. The resistance of the NTC sensor decreases as temperature increases; this characteristic allows it to convert temperature signals into electrical signals, providing raw data for subsequent temperature monitoring. Through the NTC sensor 35, the electromagnetic chip testing system 100 can accurately capture the chip's real-time temperature, including the initial ambient temperature, the heating process during operation, and whether there is a risk of overheating.
[0082] In applications, the heat sink 36 includes heat dissipation fins, a fan, or a thermoelectric cooler, which quickly dissipates the heat generated by the chip under test during operation through heat conduction, convection, or forced air cooling. When the chip temperature rises due to continuous operation or high-load testing, the heat sink 36 can intervene in time to prevent the chip from overheating and causing performance abnormalities or damage, ensuring the safety and stability of the testing process.
[0083] In the application, the microprocessor 37 establishes an electrical connection with the NTC sensor 35 and the heat sink 36, forming a closed-loop control logic. The specific workflow is as follows: the microprocessor 37 receives the temperature signal transmitted by the NTC sensor 35 in real time and converts it into a specific temperature value; then, it compares this value with a preset temperature threshold (such as the maximum normal operating temperature of the chip, the ambient temperature required by the test standard, etc.); if the chip temperature is detected to be close to or exceed the threshold, the microprocessor 37 immediately sends a command to the heat sink 36 to start or enhance its operation (such as increasing fan speed, activating semiconductor cooling function, etc.) to accelerate heat dissipation; when the temperature drops to a safe range, the microprocessor 37 then controls the heat sink 36 to reduce power or stop working to balance heat dissipation efficiency and energy consumption. This dynamic temperature control mechanism can adaptively adjust the heat dissipation intensity according to the real-time heating state of the chip, avoiding energy waste caused by excessive heat dissipation and accurately preventing the chip from affecting test results due to abnormal temperature. This is particularly important for the stable operation of high-performance chips (such as 5G RF chips, Wi-Fi 7 chips, etc.) under high-load testing scenarios, ensuring the authenticity and reliability of test data, while extending the lifespan of the test socket and the chip.
[0084] like Figure 6 As shown, in one embodiment, the chip electromagnetic testing system 100 further includes a barcode scanner 5, which is connected to the testing machine 2. The barcode scanner 5 is used to scan the target program QR code and send the address of the target program corresponding to the target program QR code to the testing machine 2.
[0085] In the application, the barcode scanner 5 establishes an electrical or data connection with the test machine 2 (the core of which is the test host 21) (common connection methods include USB, Ethernet, or serial port, which must match the interface protocol of the test machine). This connection is not a simple physical interface, but forms an "information transmission link": the QR code data collected by the barcode scanner can be transmitted to the test machine in real time without distortion, providing a basis for subsequent test program calls. Unlike manually entering program numbers or addresses, the barcode scanner significantly reduces the error of manual intervention through the quick operation of "scanning," while shortening the preparation time before testing, making it particularly suitable for mass production scenarios that require frequent switching between different chip test programs.
[0086] In application, the "target program QR code" is a "program identifier carrier" pre-generated for different testing needs (such as different chip models, different test items: basic electrical performance testing, radio electromagnetic testing, stability testing, etc.). The QR code does not directly store the complete test program (the program size is too large to embed in a QR code), but rather stores the "unique address information" of the test program within the system. This could be the local storage path of the test machine (e.g., "D: / TestPrograms / WiFi7_Chip_V1.2.bin"), a shared address on a local area network server (e.g., " / / Server / TestLib / 5G_MMwave_V2.0"), or a link to a cloud-based testing platform. The barcode scanner 5 uses optical scanning (image recognition) technology to quickly parse the address information within the QR code. The entire process takes only 0.5-2 seconds, and the recognition accuracy is extremely high (the error rate can be less than 0.01% as long as the QR code is clear and unobstructed), avoiding the character mis-typing and omission problems that may occur when manually entering the address.
[0087] In the application, after the barcode scanner parses the address information, it packages the address data and sends it to the test host 21 of the test machine 2 via a preset communication protocol (such as USB HID protocol or TCP / IP protocol). After receiving the address, the test host 21 automatically triggers the "program call flow": first, it verifies the validity of the address (such as checking whether the program exists in the local path and whether the server address is accessible); if the address is valid, the test host 21 loads the target test program from the corresponding address and automatically completes the program initialization (such as parameter configuration and interface adaptation); after the program is loaded, the test host 21 can control components such as the sorting machine 1 and the wireless test device 4 to start the test process for the chip under test.
[0088] Understandably, in chip mass production testing scenarios, the same production line may need to test chips with multiple packages and functions (such as simultaneously testing Bluetooth, Wi-Fi, and 5G chips). Each chip corresponds to a different test program. Through a "one code, one program" design, operators only need to scan the corresponding chip's program QR code, and the testing machine can automatically switch programs without manually uninstalling the old program and installing the new one, improving switching efficiency by 5-10 times. When the test program needs to be updated (such as fixing vulnerabilities or optimizing test algorithms), only the address pointed to by the QR code needs to be updated (such as switching the old version address to the new version address), without the need for complex reconfiguration of the barcode scanner or testing machine. Operators can call the latest program by scanning the same QR code, avoiding test result deviations caused by "using the old version program".
[0089] This application also provides a chip manufacturing testing system for performing real-time automated electromagnetic testing and compensation on chips produced by the chip manufacturing system, thereby obtaining accurate electromagnetic test results for the generated chips. The chip manufacturing testing system provided in this application includes a connected chip electromagnetic testing system 100 and a chip manufacturing system. The chip electromagnetic testing system is used to automatically test and compensate for chips produced by the chip manufacturing system as chips under test, obtaining the test results for the chips produced by the chip manufacturing system. Figure 7 As shown in the figure, this application provides a chip production testing system. The chip production testing system 300 includes a chip electromagnetic testing system 100 and a chip production system 200 as described above. The chip electromagnetic testing system 100 is connected to the chip production system 200. The chip electromagnetic testing system 100 is used to perform automated testing and test compensation on the chip produced by the chip production system 200 as the chip under test, and obtain the test results of the chip under test.
[0090] In the embodiments provided in this application, it should be understood that the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be electrical, mechanical or other forms.
[0091] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0092] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.
Claims
1. A chip electromagnetic testing system, characterized in that, The chip electromagnetic testing system (100) includes a sorter (1), a tester (2) and a test socket (3). The sorter (1) is communicatively connected to the tester (2), and the sorter (1) and the tester (2) are communicatively connected to the test socket (3) respectively. The sorting machine (1) is used to pick up the chip under test and place the chip under test on the test socket (3); The tester (2) is used to test the electromagnetic parameters of the chip under test on the test socket (3) and to compensate for the electromagnetic parameters obtained by the test.
2. The chip electromagnetic testing system as described in claim 1, characterized in that, The test socket (3) includes a load board (31), the load board (31) includes at least one socket (32), the socket (32) is used to place the chip under test and connect to the chip under test.
3. The chip electromagnetic testing system as described in claim 2, characterized in that, The sorting machine (1) includes a drive module (11), a robotic arm (12), a pressure mechanism (13), and a base plate (14); the drive module (11), the robotic arm (12), and the pressure mechanism (13) are respectively connected to the base plate (14), the drive module (11) is respectively connected to the robotic arm (12) and the pressure mechanism (13), and the sorting machine (1) is connected to the load plate (31) through the base plate (14); The drive module (11) is used to drive the robotic arm (12) and the pressure mechanism (13); The robotic arm (12) is used to place the chip under test into the socket (32); The pressure mechanism (13) is used to apply pressure to the chip under test in the socket (32) after the robotic arm (12) places the chip under test in the socket (32), so that the chip under test is connected to the socket (32).
4. The chip electromagnetic testing system as described in claim 2, characterized in that, The test machine (2) includes a test host (21) and a test cable (22). The test host (21) is used to perform automated testing and test compensation on the chip under test in the socket (32) to obtain test results. The test host (21) is connected to the load board (31) through the test cable (22).
5. The chip electromagnetic testing system as described in claim 1, characterized in that, The chip electromagnetic testing system (100) also includes a wireless testing device (4), which is used to verify the wireless communication performance of the chip under test. The wireless testing device (4) is connected to the test socket (3) and the test machine (2).
6. The chip electromagnetic testing system as described in claim 5, characterized in that, The test socket (3) also includes a radio frequency interface (33), and the wireless test device (4) includes a radio frequency module (41), which is used to generate radio frequency signals; The radio frequency module (41) is connected to the radio frequency interface (33) of the test socket via a radio frequency connector, and is used to send the radio frequency signal to the chip under test on the test socket (3) through the radio frequency interface (33).
7. The chip electromagnetic testing system as described in claim 6, characterized in that, The RF connector is an SMA connector or a 2.92mm connector.
8. The chip electromagnetic testing system as described in claim 2, characterized in that, The test socket (3) also includes a thermal management module (34), which is connected to the socket (32). The thermal management module includes an NTC sensor (35), a heat sink (36), and a microprocessor (37). The microprocessor (37) is connected to the NTC sensor (35) and the heat sink (36) respectively. The NTC sensor (35) is used to detect the temperature of the chip under test in the socket (32), the heat sink (36) is used to dissipate heat from the chip under test in the socket (32), and the microprocessor (37) is used to control the working state of the heat sink (36) according to the signal from the NTC sensor (35).
9. The chip electromagnetic testing system as described in any one of claims 1 to 8, characterized in that, The chip electromagnetic testing system (100) also includes a barcode scanner (5), which is connected to the tester (2). The barcode scanner (5) is used to scan the target program QR code and send the address of the target program corresponding to the target program QR code to the tester (2).
10. A chip manufacturing testing system, characterized in that, The chip production testing system (300) includes a chip electromagnetic testing system (100) and a chip production system (200) as described in any one of claims 1 to 9. The chip electromagnetic testing system (100) is connected to the chip production system (200). The chip electromagnetic testing system (100) is used to perform automated testing and test compensation on the chip produced by the chip production system (200) as the chip under test, and to obtain the test results of the chip under test.