Chip testing board and chip testing assembly

Abstract

The present disclosure relates to the technical field of chip detection, and provides a chip test board and a chip test assembly. The chip test board has opposite upper and lower surfaces; the upper surface of the chip test board is provided with a first pad, which is used to establish electrical connection with a chip in a chip clamp; a through hole with an upper port electrically connected to the first pad is arranged in the chip test board directly below the first pad, and the through hole completely penetrates the chip test board along the thickness direction of the chip test board; a second pad is arranged on the lower surface of the chip test board corresponding to the lower port of the through hole, the second pad is a pad after pad etching process, and a three-proofing coating and a back plate are sequentially arranged directly below the second pad. The chip test board and the chip test assembly provided by the present disclosure can reduce the electric leakage phenomenon of the chip test board in the chip test process.

Description

Technical Field

[0001] This disclosure relates to the field of chip testing technology, and in particular to a chip test board and a chip test assembly. Background Technology

[0002] Before mass production, chips need to be frequently tested using chip sockets. When a user places a chip in the socket, they press the socket to open it and place or remove the chip. This results in the chip test board being subjected to pressure each time the socket is pressed. Because the chip test board is relatively large and thin, it may crack or break under frequent use.

[0003] In addition, multiple aging tests are required before mass production of chips. In some aging tests, the chip test board holding the chip fixture needs to operate continuously for extended periods in an environment with high temperatures of 110°C to 130°C, high humidity of 85%, and atmospheric pressure of 1 to 2 kPa. During these tests, the chip test board may experience problems such as leakage and current limiting. X-ray images of the chip test board show that chip test boards exhibiting leakage show varying degrees of material collapse, missing material, indentation, and deformation at the edges of the pads on the bottom surface.

[0004] How to prevent chip test boards from being damaged during testing and aging experiments is a technical problem that urgently needs to be solved. Utility Model Content

[0005] In view of this, the present disclosure provides a chip test board and a chip test assembly to solve the technical problem of chip test boards being damaged during testing in the prior art.

[0006] To achieve the above objectives, the technical solution adopted in this disclosure is: A first aspect of this disclosure provides a chip test board having an upper surface and a lower surface opposite to each other. The upper surface of the chip test board has a first pad for establishing an electrical connection with a chip in a chip fixture. A through hole, with its upper port electrically connected to the first pad, is located directly below the first pad and completely penetrates the chip test board along its thickness direction. A second pad is located on the lower surface of the chip test board corresponding to the lower port of the through hole. The second pad is a pad that has undergone a pad etching process to remove the pad. A conformal coating and a backplate are sequentially disposed directly below the second pad.

[0007] In some embodiments, the height of the second pad protruding downward from the bottom plane of the main body of the chip test board is no more than 5 μm, and the difference between the diameter of the second pad and the diameter of the through hole cross-section is less than or equal to 0.2 μm.

[0008] In some embodiments, the through hole is a metal through hole, and the through hole is filled with insulating resin. The insulating resin fills the cavity of the through hole and its upper surface is flush with the lower surface of the first pad.

[0009] In some embodiments, the backplate includes an insulating layer and a support plate, the insulating layer being disposed near the second pad.

[0010] In some embodiments, the backplate is fixedly connected to the chip test board by means of snap-fit, screw fastening or adhesive bonding.

[0011] In some embodiments, the number of pins on the first pad is equal to and corresponds one-to-one with the number of pins on the chip in the chip fixture.

[0012] In some embodiments, the thickness of the conformal coating ranges from 25 μm to 100 μm.

[0013] In some embodiments, a high-temperature resistant insulating tape is also provided directly below the area where the second pad is located and between it and the conformal coating.

[0014] In some embodiments, the conformal coating includes a resin matrix and a pressure-resistant additive, wherein the resin matrix includes epoxy resin or polyurethane resin; and the pressure-resistant additive includes alumina, silicon carbide, or nano-silica.

[0015] A second aspect of this disclosure provides a chip testing assembly, which includes a chip testing board according to a first aspect of this disclosure and at least one chip fixture. The chip fixture is disposed on the chip testing board, and one end of a probe of the chip testing board is electrically connected to the chip fixture, while the other end of the probe is electrically connected to a chip in the chip fixture.

[0016] The beneficial effects of this disclosed embodiment compared with the prior art are: by sequentially setting a three-proof coating and a back plate on the bottom surface of the main body of the chip test board, it is possible to prevent moisture from adhering to the chip test board and causing short circuits, and it is also possible to prevent the chip test board from being damaged when pressing the chip clamp, thereby preventing leakage of the chip test board. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the structure of a chip test board provided in an embodiment of this disclosure; Figure 2 This is a schematic diagram of another chip test board provided in an embodiment of this disclosure; Figure 3 This is a schematic diagram of the structure of another chip test board provided in this embodiment of the present disclosure; Figure 4 This is a schematic diagram of a chip testing component provided in an embodiment of this disclosure. Detailed Implementation

[0019] To make the technical problems, technical solutions, and beneficial effects to be solved by this disclosure clearer, the disclosure will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only for explaining this disclosure and are not intended to limit this disclosure.

[0020] In the description of this disclosure, it should be understood that the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are used only for the convenience of describing this disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this disclosure. Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this disclosure, unless otherwise stated, "a plurality of" means two or more.

[0021] In related technologies, chip test boards are used to provide precise circuit interfaces and stimulus environments for verifying the electrical characteristics, functional logic testing, and reliability assessment of chips. Their design needs to be deeply adapted to the chip's circuit architecture, signal characteristics, and testing requirements. The main body of a chip test board is generally a PCB (Printed Circuit Board), which has two sides. The top side is connected to the chip fixture, and the bottom side can hold devices or connect to digital test boards.

[0022] The chip test board has chip pads on both its bottom and top surfaces. The top and bottom chip pads are electrically connected via through-holes in the chip test board. A chip fixture is used to hold the chip, ensuring that the chip's pins are electrically connected to the chip pads on the top surface of the chip test board via probes on the fixture.

[0023] In related technologies, a waterproof coating can be applied to the bottom pads of a chip test board. However, when subjected to pressure, the thickness of the waterproof coating may fall below the process requirements. Furthermore, during chip aging tests, the waterproof coating may blister, delaminate, or crack, potentially causing leakage and current limiting issues on the chip test board.

[0024] To address the above technical problems, this disclosure provides a chip test board and a chip test assembly.

[0025] The chip test board and chip test assembly according to embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings.

[0026] Figure 1 This is a schematic diagram of the structure of a chip test board provided in an embodiment of this disclosure; Figure 2 This is a schematic diagram of another chip test board provided in an embodiment of this disclosure; Figure 3 This is a schematic diagram of the structure of another chip test board provided in this embodiment of the disclosure; Figure 4 This is a schematic diagram of a chip testing component provided in an embodiment of this disclosure. The following is in conjunction with... Figures 1 to 4 The chip test board and chip test components provided in the embodiments of this disclosure will be described together.

[0027] The chip test board of this disclosure is used to support a chip fixture located above it and to achieve electrical connection between the chip fixture and a test controller. Specifically, the chip test board has an upper surface and a lower surface; the upper surface of the chip test board is provided with a first pad, which is used to establish an electrical connection with the chip in the chip fixture; a through hole is provided in the chip test board directly below the first pad, the upper port of which is electrically connected to the first pad, and the through hole completely penetrates the chip test board along the thickness direction; a second pad is provided on the lower surface of the chip test board corresponding to the lower port of the through hole, the second pad is a pad after being de-coated by a pad etching process, and a conformal coating and a backplate are sequentially disposed directly below the second pad.

[0028] like Figure 1As shown, the chip test board includes a main body 110, a second pad disposed on the bottom surface of the main body, and a conformal coating 120 and a backplate 130 sequentially disposed directly below the second pad. When using this chip test board for chip testing, the chip's pins are electrically connected to the first pad on the top surface of the chip test board via probes on the chip fixture. The first pad is as shown... Figure 1 The top pad 112 of the through-hole 111 shown is the through-hole 111 electrically connected to the first pad. The top pad 112 can be understood as a test connection point, which needs to be electrically connected to different test lines. This can be achieved through vias or blind vias, but the latter is more expensive. Therefore, in this embodiment, the test connection point is electrically connected to the test lines through vias, i.e., through-holes. When the test connection point is electrically connected to different test lines through through-holes, the bottom pad of the through-hole may become contaminated with moisture, allowing moisture to enter the through-hole. This could lead to leakage in the test circuit of the chip test board electrically connected to the through-hole and its bottom pad, i.e., the second pad.

[0029] With the continuous increase in chip integration and iterative innovation in manufacturing processes, chip packages are becoming smaller while the number of pins is increasing significantly, leading to a continuous narrowing of pin pitch. This trend is an inevitable result of the semiconductor industry's evolution towards high performance and miniaturization. Smaller pin pitches make chip test boards more prone to leakage and short circuits. To avoid leakage on chip test boards for chips with small pin pitches, the technical solution in this disclosure involves etching and removing the pads on the bottom surface of the chip test board during the PCB manufacturing process.

[0030] In some embodiments, the number of pins on the first pad is equal to and corresponds one-to-one with the number of pins on the chip in the chip fixture, so that the chip test board has the ability to test all pins on the chip in the chip fixture.

[0031] The technical solution of this disclosure reduces the possibility of moisture entering the through-hole and causing leakage in the test circuit of the chip test board. A conformal coating is applied to the bottom surface of the chip test board to prevent moisture from entering and adhering to the bottom surface of the chip test board in high-temperature, high-humidity, and high-pressure environments, which could lead to short circuits. A backplate is disposed on the bottom surface of the chip test board. When the user places the chip on the chip holder, the pressure on the chip holder also applies pressure to the chip test board. The backplate protects the chip test board and ensures even force distribution.

[0032] By adopting the technical solution of this disclosure embodiment, when pressing the chip clamp, the presence of the back plate can make the pressing pressure on the chip test board more uniform, the three-proof coating has the function of waterproofing and vapor removal, and the removal of the bottom pad of the through hole can further protect the chip test board from moisture, thereby avoiding short circuit of the chip test board, thus protecting the chip test board and preventing leakage of the chip test board.

[0033] After the pad removal process, the height of the second pad protruding downward from the bottom plane of the main body of the chip test board is no more than 5 μm, and the difference between the diameter of the second pad and the diameter of the through hole cross section is less than or equal to 0.2 μm, thereby enhancing the insulation performance of the chip test board.

[0034] In some embodiments of this disclosure, the through hole is a metal through hole, and the through hole is filled with insulating resin. The insulating resin fills the cavity of the through hole and its upper surface is flush with the lower surface of the first pad. This solution also helps to enhance the insulation performance of the chip test board.

[0035] like Figure 1 As shown, the bottom surface is the lower surface of the main body 110 of the chip test board. The conformal coating 120 is disposed below the main body 110, and the backplate 130 is disposed below the conformal coating 120. In actual production, the bottom surface of the main body 110 can be set facing upwards, and the conformal coating 120 and the backplate 130 can be disposed sequentially from bottom to top above the bottom surface.

[0036] Conformal coating is a special protective material applied to the surface of printed circuit boards. Its core functions are moisture resistance, mildew resistance, and salt spray resistance, while also providing comprehensive protection against dust, insulation, and chemical corrosion. In this embodiment, the conformal coating includes a resin matrix and a compression-resistant additive. The resin matrix can be epoxy resin or polyurethane resin. The compression-resistant additive can be alumina, silicon carbide, or nano-silica. Epoxy resin has advantages such as high hardness and strong chemical corrosion resistance, while polyurethane resin has advantages such as wear resistance and chemical solvent resistance. Using epoxy resin or polyurethane resin as the resin matrix can enhance the wear resistance or corrosion resistance of the conformal coating. Nano-silica can improve compression resistance, silicon carbide can improve extrusion resistance, and alumina can prevent local deformation and improve wear resistance. Using alumina, silicon carbide, or nano-silica as fillers can improve the extrusion resistance of the conformal coating.

[0037] In this embodiment, the thickness of the three-proof coating ranges from 25 μm to 100 μm. Too thin a coating will not provide waterproofing, while too thick a coating will affect the flatness of the backplate installation.

[0038] In addition, a high-temperature resistant insulating tape can be placed directly below the area where the second pad is located and between it and the conformal coating to further enhance the insulation performance of the chip test board.

[0039] In the embodiments disclosed herein, such as Figure 3 As shown, the backplate includes an insulating layer 131 and a support plate 132, with the insulating layer 131 disposed near the second pad. The support plate may include aluminum alloy, copper, or stainless steel. Specifically, the main material of the support plate can be a metallic material, such as aluminum alloy, copper, or stainless steel, or it can be an engineering plastic or composite material. When the main material of the support plate is an engineering plastic or composite material, reinforcing ribs or local reinforcing structures can be provided on the main material. The material of the reinforcing ribs or local reinforcing structures can be a metallic material, such as aluminum alloy, copper, or stainless steel. Backplates containing aluminum alloy, copper, or stainless steel can better resist circuit board deformation caused by mounting stress.

[0040] When different protection methods are used on the chip test board, the leakage current in the aging test varies. Experiments show that removing the bottom pads of the through holes on the bottom surface of the chip test board body, and sequentially applying a conformal coating and a backplate on the bottom surface of the body, provides better leakage current protection.

[0041] In this embodiment, the backplate can be fixedly installed to the chip test board by snap-fit, screw fastening, or adhesive bonding. Figure 2 As shown, the backplate can be fixed to the chip test board by screws. The bottom surface of the chip test board has a bottom pad 213 for through holes 211 for screw mounting. The top pad 212 of the through holes 211 and the bottom pad 213 are also retained to facilitate secure screw mounting.

[0042] In addition, the backplate can also be fixedly connected to the main body of the chip test board by snap-fitting and bonding. All of the above solutions can achieve a stable connection between the backplate and the main body.

[0043] In this embodiment of the disclosure, the insulating material of the top and bottom surfaces of the main body of the chip test board includes epoxy resin, FR-4, or polyimide to ensure the insulation performance of the chip test board.

[0044] When a backplane is installed, the bottom surface of the chip test board is coated with a three-proof coating. This can prevent the chip test board from cracking and causing electrical damage due to frequent pressing during chip testing. It can also ensure that the chip test board will not leak current during chip aging tests.

[0045] The bottom pads of the chip test board are etched to remove the copper foil. After etching, the bottom surface of the chip test board is essentially level, allowing the backplane to apply pressure evenly across the entire area. Before etching, the pads were significantly higher than the bottom substrate layer of the chip test board, and the conformal coating had fluidity, resulting in noticeable variations in its actual thickness. After etching, the bottom surface of the chip test board is level, and the conformal coating has sufficient thickness to prevent leakage.

[0046] When etching the pads on the bottom surface of a chip test board, the following steps can be performed sequentially: pretreatment, dry film lamination, exposure, development, pattern electroplating, film removal, etching, and tin stripping.

[0047] During pretreatment, the PCBs to be remanufactured need to undergo surface pretreatment in a cleanroom. This involves removing surface contaminants and oxide layers through chemical cleaning and other methods, while micro-etching and other processes are used to appropriately increase the surface roughness of the copper foil, enhancing the adhesion between the subsequent dry film and the copper foil surface.

[0048] When performing dry film lamination, positive dry film is usually selected because it can better meet the design requirements of outer layer patterns, edge wrapping, large component holes, and dense circuitry. During the lamination process, the polyethylene protective film of the dry film is first peeled off. Then, under heat and pressure, the photoresist layer is bonded to the surface of the copper foil of the copper-clad laminate. Heating softens the photoresist layer in the dry film, and the pressure of the hot press rollers and the adhesive in the photoresist force the dry film to adhere tightly to the copper foil, completing the dry film lamination process.

[0049] During exposure, the film with the circuit pattern is first precisely aligned with the PCB with the pressed dry film to ensure accurate pattern positioning. Then, under ultraviolet light, the light-transmitting parts of the dry film undergo photopolymerization and solidify, while the opaque parts do not react, leaving the soluble portions for subsequent development processes.

[0050] During development, a weakly alkaline developer can be used to dissolve and remove the unexposed dry film, exposing the areas of the copper foil surface that need to be etched. The exposed and cured areas remain on the copper foil, forming the resist pattern. After development, a quality inspection is performed to ensure that the pattern accuracy and integrity meet the requirements.

[0051] During pattern electroplating, a thickened copper layer can be formed on the exposed copper foil area to enhance the conductivity and mechanical strength of the circuit. A layer of tin is then plated onto this thickened copper layer as a resist layer for subsequent etching processes, protecting the circuit pattern from corrosion during etching.

[0052] During the stripping process, chemical agents can be used to remove the dry film. At this time, the tin layer on the circuit is retained, while the unwanted copper foil areas that were originally covered by the dry film are exposed, preparing for etching.

[0053] During etching, the etchant can be used to remove the exposed unwanted copper foil, leaving the circuit parts that have been thickened by pattern plating and protected by a tin layer, forming a precise outer circuit pattern.

[0054] When stripping the solder, the solder layer that acts as an anti-corrosion layer on the circuit needs to be removed to expose the pure copper circuit. At this point, the outer circuit pattern is complete.

[0055] Etching away the pads on the bottom surface of the chip test board significantly improves the flatness of the backplane area, eliminating pad bulges and resulting in better cleaning and more uniform conformal coating. Furthermore, it avoids pressure between the protruding pads and the backplane, ensuring a flatter backplane area and more even stress distribution when pressing on the backplane.

[0056] According to the chip test board provided in this embodiment, by sequentially setting a three-proof coating and a backplate on the bottom surface of the main body of the chip test board, moisture can be prevented from adhering to the chip test board and causing short circuits, and the chip test board can also be prevented from being damaged when pressing the chip clamp, thereby preventing leakage of the chip test board.

[0057] like Figure 4 As shown in the illustration, this application also provides a chip testing assembly, including a chip testing board 100 and at least one chip fixture 200 as described above. The chip fixture 200 is disposed on the chip testing board 100. For example, multiple chip fixtures 200 are disposed on the top surface of the chip testing board 100 to load the chip under test through the chip fixture 100. Specifically, one end of the probe of the chip testing board is electrically connected to the chip fixture, and the other end of the probe is electrically connected to the chip in the chip fixture. The chip testing board is electrically connected to a digital measurement board 300. The digital measurement board 300 can be used as a measurement controller or electrically connected to a test controller.

[0058] The chip test board is the chip test board in the above technical solution, which includes the main body 110, the three-proof coating 120, and the backplane 130.

[0059] Specifically, the chip fixture is used to place the chip under test (DUT) so that the DUT is electrically connected to the chip test board. The chip test board is used to carry and connect the DUT. The test controller includes a digital measurement board and a controller. The chip test board is connected to the digital measurement board via spring pins or cables to establish an electrical connection, enabling the test control signals to be accurately transmitted from the digital measurement board to the DUT, and the test result signals to be accurately transmitted from the DUT to the digital measurement board. The test controller then processes the test result signals, thus enabling the testing of the DUT.

[0060] The three-proof coating on the chip test board is applied to the bottom surface of the chip test board to protect it and prevent moisture from entering and adhering to the chip test board under high temperature, high humidity and high pressure environments, which could cause the chip test board to short circuit.

[0061] The backplate on the chip test board is used to set on the bottom surface of the chip test board. When the user places the chip on the chip fixture, the chip fixture will be pressed, and the chip test board will also be subjected to a pressing force. The backplate can protect the chip test board and make the chip test board evenly stressed.

[0062] According to the chip testing assembly provided in the embodiments of this disclosure, including the chip testing board in the above technical solution, by sequentially providing a three-proof coating and a back plate on the bottom surface of the main body of the chip testing board, it is possible to prevent moisture from adhering to the chip testing board and causing short circuits, and also to prevent the chip testing board from being damaged when pressing the chip clamp, thereby preventing leakage of the chip testing board.

[0063] The above description is merely a preferred embodiment of this disclosure and is not intended to limit this disclosure. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A chip test board, characterized in that, The chip test board has an upper surface and a lower surface. The upper surface of the chip test board is provided with a first pad, which is used to establish an electrical connection with the chip in the chip fixture. The chip test board is provided with a through hole at its upper port, which is electrically connected to the first pad, and the through hole completely penetrates the chip test board along its thickness direction. The lower surface of the chip test board is provided with a second pad at the lower port of the through hole. The second pad is a pad that has been de-coated by a pad etching process. A conformal coating and a backplate are sequentially arranged below the second pad.

2. The chip test board according to claim 1, characterized in that, The second pad protrudes downward from the bottom plane of the main body of the chip test board by a height not greater than 5 μm, and the difference between the diameter of the second pad and the diameter of the through hole cross-section is less than or equal to 0.2 μm.

3. The chip test board according to claim 1, characterized in that, The through hole is a metal through hole, and the through hole is filled with insulating resin. The insulating resin fills the cavity of the through hole and its upper surface is flush with the lower surface of the first pad.

4. The chip test board according to claim 1, characterized in that, The backplate includes an insulating layer and a support plate, with the insulating layer disposed near the second pad.

5. The chip test board according to claim 4, characterized in that, The backplate is fixedly connected to the chip test board by means of snap-fit, screw fastening or adhesive bonding.

6. The chip test board according to claim 1, characterized in that, The number of pins on the first pad is equal to the number of pins on the chip in the chip fixture, and they correspond one-to-one.

7. The chip test board according to any one of claims 1 to 6, characterized in that, The thickness of the three-proof coating ranges from 25 μm to 100 μm.

8. The chip test board according to claim 7, characterized in that, A high-temperature resistant insulating tape is also provided directly below the area where the second pad is located and between it and the conformal coating.

9. The chip test board according to claim 8, characterized in that, The three-proof coating includes a resin matrix and a pressure-resistant additive. The resin matrix includes epoxy resin or polyurethane resin; the pressure-resistant additive includes alumina, silicon carbide or nano-silica.

10. A chip testing component, characterized in that, The device includes a chip test board as described in any one of claims 1 to 9 and at least one chip fixture, wherein the chip fixture is disposed on the chip test board, one end of a probe of the chip test board is electrically connected to the chip fixture, and the other end of the probe is electrically connected to a chip in the chip fixture.

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