An adjustable connector for battery management system commissioning

CN224840455UActive Publication Date: 2026-10-09DR OCTOPUS INTELLIGENT TECH (SHANGHAI) CO LTD
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Patent Information

Application Number
CN202522183094.7
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-10-15
Publication Date
2026-10-09
Estimated Expiration
2035-10-15

AI Technical Summary

Benefits of technology

[0015]本实用新型提出的用于用于电池管理系统调试的可调接插件,仅需多个数字电位器芯片即可实现多个串联电池的电芯模拟电压和多个模拟热敏电阻。这些数字电位器芯片可以被封装在很小的空间里,例如封装在用于电池管理系统调试的从板线束端的接插件上,从而避免了的较多数量的线束,相比传统方案节省了大量的接线束时间,方便了程序开发过程的调试,也节省了大量的开发时间,降低了维护复杂度和维护成本。

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Abstract

The utility model provides a kind of adjustable connector for battery management system debugging belongs to battery technical field, comprising: connector body, inside integrated have: multiple voltage analog unit, the signal output end of digital potentiometer chip among them is electrically connected with the voltage acquisition pin corresponding on connector body;Multiple resistance analog unit, the signal output end of digital potentiometer chip among them is electrically connected to the temperature acquisition pin corresponding on connector body;Multiple step voltage transformation circuit, input end connects power supply, and output end outputs multiple different voltage grades, and multiple different voltage grades are respectively the power supply end of digital potentiometer chip in multiple voltage analog unit Power supply;Main control module, including single-chip microcomputer chip, single-chip microcomputer chip is electrically connected with the control end of digital potentiometer chip in multiple voltage analog unit and multiple resistance analog unit respectively by serial peripheral interface, reduces maintenance complexity and maintenance cost.
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Description

Technical Field

[0001] This invention relates to the field of battery technology, and in particular to an adjustable connector for debugging a battery management system. Background Technology

[0002] The number of new energy vehicles, especially pure electric vehicles, is growing rapidly. The battery pack is the heart of a new energy vehicle, and the battery management system, as the software of the battery pack, plays an equally crucial role.

[0003] The main functions of a battery management system (BMS) include battery balancing management, thermal management, and intelligent charging control. This requires the BMS to monitor key parameters such as battery voltage, current, and temperature in real time to ensure the battery operates within a safe range. Traditional BMS software debugging requires a complete battery system or a battery simulation system. The battery system is connected to the BMS slave board via a large number of wiring harnesses. However, each project has different requirements, and the wiring methods for the slave boards vary. Each simulated battery test bench can only meet the needs of one project, making it impossible to use a single wiring harness for multiple projects. This results in complex and costly wiring harness maintenance. Utility Model Content

[0004] This invention provides an adjustable connector for debugging a battery management system, which reduces maintenance complexity and cost.

[0005] In a first aspect, this utility model provides an adjustable connector for debugging a battery management system, comprising: The connector body has a plug portion that matches the slave board interface of the battery management system, and the connector body integrates the following internally: Multiple voltage simulation units, each including a digital potentiometer chip operating in potentiometer mode, wherein the signal output terminals of the multiple digital potentiometer chips operating in potentiometer mode are electrically connected to the corresponding voltage acquisition pins on the connector body; Multiple resistance simulation units, each including a digital potentiometer chip operating in variable resistance mode, wherein the signal output terminals of the multiple digital potentiometer chips operating in variable resistance mode are electrically connected to the corresponding temperature acquisition pins on the connector body. A multi-stage transformer circuit, wherein the input terminal of the multi-stage transformer circuit is connected to a power supply, and the output terminal of the multi-stage transformer circuit outputs multiple different voltage levels, wherein the multiple different voltage levels respectively supply power to the power supply terminal of the digital potentiometer chip in the multiple voltage analog units; The main control module includes a microcontroller chip, which is electrically connected to the control terminal of the digital potentiometer chip in the plurality of voltage analog units and the plurality of resistance analog units through a serial peripheral interface.

[0006] In some embodiments, in the plurality of voltage simulation units, the second potential terminal of the (n+1)th digital potentiometer chip is connected to the first potential terminal of the nth digital potentiometer chip to simulate the voltage of the (n+1)th cells in the series battery pack, where n is a positive integer.

[0007] In some embodiments, in the plurality of voltage analog units, the first potential terminal of the digital potentiometer chip is connected to the power supply of the corresponding voltage level output by the multi-stage transformer circuit, the second potential terminal of the digital potentiometer chip serves as a reference ground terminal, and the sliding terminal of the digital potentiometer chip serves as the signal output terminal.

[0008] In some embodiments, the multi-stage transformer circuit includes multiple transformers connected in series, each transformer corresponding to a voltage analog unit. The first output terminal of the transformer is connected to the power supply terminal of the corresponding digital potentiometer chip, and the second output terminal of the transformer is connected to the reference ground terminal of the corresponding digital potentiometer chip.

[0009] In some embodiments, in the plurality of resistor analog units, the first potential terminal of the digital potentiometer chip is left floating, the second potential terminal of the digital potentiometer chip serves as a reference ground terminal, and the sliding terminal of the digital potentiometer chip serves as the signal output terminal.

[0010] In some embodiments, the chip select terminal of the digital potentiometer chip is connected to the serial peripheral interface of the microcontroller chip through a serial data expansion chip.

[0011] In some embodiments, it also includes: An optocoupler isolation module is disposed between the serial peripheral interface of the microcontroller chip and the control terminal of the digital potentiometer chip in the plurality of voltage analog units.

[0012] In some embodiments, it also includes: A wireless communication module is electrically connected to the microcontroller chip.

[0013] In some embodiments, the wireless communication module is a Bluetooth module or a Wi-Fi module.

[0014] In some embodiments, the main control module is disposed on a control circuit board, the digital potentiometer chip is disposed on an analog output circuit board, and the multi-stage transformer circuit is disposed on a power conversion circuit board; wherein, the control circuit board, the analog output circuit board, and the power conversion circuit board are stacked and fixed in layers within the internal space of the connector body.

[0015] The adjustable connector proposed in this invention for debugging a battery management system requires only a few digital potentiometer chips to simulate the cell voltages of multiple series-connected batteries and multiple analog thermistors. These digital potentiometer chips can be packaged in a very small space, for example, on the connector at the wiring harness end of the board used for debugging the battery management system, thereby avoiding a large number of wiring harnesses. Compared with traditional solutions, this saves a lot of wiring harness time, facilitates debugging during program development, saves a lot of development time, and reduces maintenance complexity and maintenance costs. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this utility model. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of the structure of an adjustable connector for debugging a battery management system provided by this utility model.

[0018] Figure 2 This is a schematic diagram of the pin structure of a slave board for a battery management system provided by this utility model. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of this utility model clearer, the technical solutions of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this utility model.

[0020] Figure 1 This is a structural schematic diagram of an adjustable connector for debugging a battery management system provided by this utility model. Figure 1As shown, the adjustable connector for debugging the battery management system includes: a connector body, which has a plug-in portion that matches the slave board interface of the battery management system; the connector body internally integrates: multiple voltage simulation units 1, each voltage simulation unit 1 including a digital potentiometer chip 2 operating in potentiometer mode, the signal output terminal PW0 of the multiple digital potentiometer chips 2 operating in potentiometer mode being electrically connected to the corresponding voltage acquisition pin on the connector body; and multiple resistance simulation units 3, each resistance simulation unit 3 including a digital potentiometer chip 2 operating in variable resistance mode, and multiple digital potentiometer chips 2 operating in variable resistance mode. The signal output terminal PW0 of the voltage regulator chip 2 is electrically connected to the corresponding temperature acquisition pin on the connector body; the multi-stage transformer circuit 4 has its input terminal connected to the power supply VDD0, and its output terminal outputs multiple different voltage levels, which power the power supply terminal VDD of the digital potentiometer chips 2 in the multiple voltage analog units 1; the main control module includes a microcontroller chip 5, which is electrically connected to the control terminals of the digital potentiometer chips 2 in the multiple voltage analog units 1 and the multiple resistance analog units 3 through a serial peripheral interface.

[0021] Specifically, the connector body is the physical shell and basic structure. Its front end has a plug-in portion whose shape perfectly matches the interface on the Battery Management System (BMS) board, allowing for direct plugging and unplugging like a regular wiring harness connector. The connector body integrates the following functional units: Voltage Analog Unit 1: Its core is a digital potentiometer chip 2 operating in potentiometer mode, which is also a digital-to-analog converter chip. Its function is to generate adjustable analog voltage signals. The signal output terminal PW0 of each digital potentiometer chip 2 is connected to the corresponding voltage acquisition pin on the connector body casing. When this connector body is plugged into the battery management system, these voltage acquisition pins act as the positive terminal of a virtual battery cell, reporting the voltage value to the battery management system.

[0022] The resistance simulation unit 3 is primarily composed of a digital potentiometer chip 2 operating in variable resistance mode. Its function is to generate adjustable analog resistance signals. The signal output terminal PW0 of each digital potentiometer chip 2 is connected to a corresponding temperature acquisition pin on the connector housing. These temperature acquisition pins act as one end of a virtual thermistor, reporting different resistance values ​​to the battery management system to simulate temperature changes.

[0023] Multi-stage transformer circuit 4: This is a power supply system. It takes a main power supply VDD0 as input and generates multiple different and stable voltage levels, such as, but not limited to, 5V, 10V, 15V, etc. Each voltage level is dedicated to powering a digital potentiometer chip 2 in the voltage analog unit 1.

[0024] The main control module is a single-chip microcomputer 5. Through the Serial Peripheral Interface (SPI), including the chip select terminal CSI, the clock terminal SCK, and the data terminal SI, it sends command data to all digital potentiometer chips 2, including the voltage analog unit 1 and the resistance analog unit 3, to precisely control the output value of all digital potentiometer chips 2.

[0025] The overall working principle is as follows: Command Reception and Parsing: The user sets the desired simulated battery voltage and temperature values ​​via a host computer, such as, but not limited to, a computer or mobile phone software. This command can be sent, for example, via the wireless communication module 8 to the main control module inside the device, i.e., the microcontroller chip 5. The microcontroller chip 5 receives and parses the command, calculating the specific values ​​that each digital potentiometer chip 2 needs to output.

[0026] Precision Signal Generation: The microcontroller chip 5 sends control data to each of the digital potentiometer chips 2 via the serial peripheral interface bus. For voltage analog operation: It controls the digital potentiometer chip 2 operating in potentiometer mode. Internally, the digital potentiometer chip 2 functions as an adjustable resistor voltage divider. Based on the received digital value, the signal output terminal PW0 of the digital potentiometer chip 2 generates a precise voltage between the reference ground terminal VSS and the power supply terminal VDD. For resistance analog operation: It controls the digital potentiometer chip 2 operating in variable resistance mode. Internally, the digital potentiometer chip 2 functions as an adjustable resistor. Based on the received digital value, the resistance value between the signal output terminal PW0 of the digital potentiometer chip 2 and the reference ground terminal VSS changes precisely.

[0027] Cascaded Voltage Supply: The multi-stage transformer circuit 4 is the cornerstone of the entire voltage simulation system. It provides an independent, incremental operating voltage for each digital potentiometer chip 2 used for voltage simulation. For example, it provides 5V to the digital potentiometer chip 2 simulating the first cell, 10V to the digital potentiometer chip 2 simulating the second cell, and the ground potential of the digital potentiometer chip 2 simulating the first cell is the 5V output of the first chip, and so on, providing 90V to the digital potentiometer chip 2 simulating, for example, the 18th cell. In this way, each digital potentiometer chip 2 operates within a preset small voltage range, but when the outputs of the digital potentiometer chips 2 are connected in series, they can collectively simulate the voltage of each cell in a high-voltage battery pack without using a real 90V power supply.

[0028] Signal Output and Interaction: The generated analog voltage and resistance signals are directly output through the pins of the connector body. When the connector is inserted into the battery management system (BMS) slave board, these pins are connected to the BMS acquisition circuitry. The BMS reads these fully controllable virtual signals generated by the digital potentiometer chip 2, just like it reads a real battery and temperature sensor, thus completing the debugging process.

[0029] Figure 2 This is a schematic diagram of the pin structure of a slave board for a battery management system provided by this utility model. (Combined with...) Figure 1 and Figure 2 The slave board of the battery management system (BMS) monitors information such as cell voltage and temperature of the modules and transmits this information to the main board. It also features battery balancing capabilities. Communication between the slave board and the main board typically uses CAN (Controller Area Network) or daisy-chain communication. Half of the pins on the slave board connector are used for voltage acquisition, and the other half are used for module temperature acquisition. Taking the acquisition of voltage from 18 cells and temperature from 5 modules in one AFE (Analog Front End) module of the BMS as an example, the pin definitions are as follows: Figure 2 As shown in the figure. Among them, pins 1 and 2 are the reference ground of the cell voltage, pins 3 to 20 correspond to the module voltage, that is, cell voltage 1 to 18, pins 21 to 25 correspond to the reference ground of the module temperature, and pins 26 to 30 correspond to the positive signal terminal of the module temperature. The reference ground and the positive signal terminal correspond to the two ends of the thermistor.

[0030] To acquire the cell voltage of the battery module, pins 1 and 2 only need to be grounded, and pins 3 to 20 need to simulate voltages from, but not limited to, 1.7V to 5V. To acquire the module temperature of the battery module, pins 21 to 25 only need to be grounded, and pins 26 to 30 need to simulate resistances from 5KΩ to 100kΩ. The battery management system can calculate the corresponding temperature value using a formula based on the acquired resistance value. To achieve the above functions without traditional wiring, this application designs a wireless connector for debugging the battery management system. The connector's wiring harness plug is the same as a traditional plug, but the difference is that the exposed wiring harness section integrates multiple chips so that each pin can simulate a voltage from 0V to 5V and a resistance from 0kΩ to 100kΩ.

[0031] In some embodiments, the adjustable connector for debugging the battery management system further includes a wireless communication module 8, which is electrically connected to the microcontroller chip 5. Exemplarily, the wireless communication module 8 is a Bluetooth module or a Wi-Fi module. That is, the functional chips mentioned in the foregoing embodiments are packaged together and fixed to the connector at the wire harness end. The microcontroller chip 5 communicates with a host computer through the wireless communication module 8 and receives control signals from the host computer via wireless devices such as Bluetooth or WiFi, modifying the voltage corresponding to the cell voltage pin and the resistance corresponding to the temperature pin.

[0032] Digital potentiometer chip 2 is, for example, but not limited to, a chip that provides MCP41010 signals. For digital potentiometer chip 2, refer to... Figure 1 Pin 1 is the chip select signal pin. After the digital potentiometer chip 2 is powered on, a low level must be applied to this pin to write data to the chip. Pin 2 is the clock signal pin. When the microcontroller chip 5 writes data to the digital potentiometer chip 2, it needs to provide a clock signal to pin 2, such as, but not limited to, generating 16 consecutive pulses on this pin. Pin 3 is the data pin, which receives the serial data signal from the microcontroller chip 5. Pin 4 is the ground pin. Pin 8 is used to connect the power supply line, corresponding to the power supply terminal VDD of the digital potentiometer chip 2. Taking a single digital potentiometer chip 2 as an example, pin 8 can be connected to a voltage from, but not limited to, 2.7V to 5.5V.

[0033] Pins 5, 6, and 7 are the potentiometers inside the digital potentiometer chip 2. Taking one digital potentiometer chip 2 as an example, this potentiometer has 256 tap positions, corresponding to 8-bit digital signals. The specific movement position of the signal output terminal PW0 is determined by the data written by the microcontroller chip 5 through the serial peripheral interface. In potentiometer mode, when the data written to pin 3 is 0, the sliding terminal, i.e., the signal output terminal PW0, will move to the second potential terminal PB0 and output 0V; when the data written to pin 3 is 255, the signal output terminal PW0 will move to the first potential terminal PA0 and output the corresponding 5V, realizing voltage simulation. In sliding resistor mode, i.e., variable resistor mode, when the data written to pin 3 is 0, the signal output terminal PW0 will move to the second potential terminal PB0 and output 0KΩ; when the data written to pin 3 is 255, the signal output terminal PW0 will move to the first potential terminal PA0 and output 100KΩ, realizing temperature resistance simulation.

[0034] In some embodiments, such as Figure 1 As shown, in the multiple voltage simulation units 1, the second potential terminal PB0 of the (n+1)th digital potentiometer chip 2 is connected to the first potential terminal PA0 of the nth digital potentiometer chip 2 to simulate the voltage of the (n+1)th cells in the series battery pack, where n is a positive integer.

[0035] Specifically, to simulate the cell voltage of 18 cells connected in series, 18 MCP41010 digital potentiometer chips 2 need to be connected in series. In multiple voltage simulation units 1, the second potential terminal PB0 of the (n+1)th digital potentiometer chip 2 is connected to the first potential terminal PA0 of the nth digital potentiometer chip 2. This achieves, for example, the reference voltage of the 18th digital potentiometer chip 2, i.e., the voltage connected to the second potential terminal PB0, which is the operating voltage of the 17th digital potentiometer chip 2, i.e., the voltage connected to the first potential terminal PA0. Both are 85V. The other digital potentiometer chips 2 are analogous to this, ultimately simulating the voltage of n+1 cells in a series-connected battery pack.

[0036] In some embodiments, such as Figure 1 As shown, in the multiple voltage simulation units 1, the first potential terminal PA0 of the digital potentiometer chip 2 is connected to the power supply of the corresponding voltage level output by the multi-stage transformer circuit 4, the second potential terminal PB0 of the digital potentiometer chip 2 serves as the reference ground terminal VSS, and the sliding terminal of the digital potentiometer chip 2 serves as the signal output terminal PW0.

[0037] In some embodiments, such as Figure 1 As shown, the multi-stage transformer circuit 4 includes multiple transformers 6 connected in series. The transformers 6 are configured in a one-to-one correspondence with the voltage simulation unit 1. The first output terminal A of the transformer 6 is connected to the power supply terminal VDD of the corresponding digital potentiometer chip 2, and the second output terminal B of the transformer 6 is connected to the reference ground terminal VSS of the corresponding digital potentiometer chip 2.

[0038] Specifically, the first output terminal A of transformer 6 is the end of the output coupling coil of transformer 6 that transmits a positive signal, and the second output terminal B of transformer 6 is the end of the output coupling coil of transformer 6 that transmits a negative signal. Taking multiple voltage analog units 1 including 18 digital potentiometer chips 2 as an example, the multi-stage transformer circuit 4 can, for example but not limited to, generate a power supply with multiple voltage levels increasing from 0V to 90V in 5V increments to power the 18 digital potentiometer chips 2. For example, the operating voltage of the first-stage digital potentiometer chip 2 is 5V, the operating voltage of the second-stage digital potentiometer chip 2 is 10V, the operating voltage of the third-stage digital potentiometer chip 2 is 15V, and so on, with the operating voltage of the eighteenth-stage digital potentiometer chip 2 being 90V. The voltage output of the signal output terminal PW0 of each digital potentiometer chip 2 relative to its second potential terminal PB0 can be controlled via the serial peripheral interface of the microcontroller chip 5. Figure 1 V1 to V18 are shown in the figure, which respectively simulate the voltages of the first cell to the eighteenth cell.

[0039] In some embodiments, such as Figure 1 As shown, the adjustable connector for debugging the battery management system also includes: an optocoupler isolation module 7, which is located between the serial peripheral interface of the microcontroller chip 5 and the control terminal of the digital potentiometer chip 2 in the multiple voltage analog units 1.

[0040] Specifically, because the operating voltage of the digital potentiometer chip 2 operating in potentiometer mode is mismatched with the operating voltage of the microcontroller chip 5, an optocoupler isolation module 7 is set between the serial peripheral interface of the microcontroller chip 5 and the control terminals of the digital potentiometer chips 2 in the multiple voltage analog units 1. Specifically, three optocouplers are set for each digital potentiometer chip 2 to isolate the chip select terminal (CSI), clock terminal (SCK), and data terminal (SI), respectively, ultimately enabling the microcontroller chip 5 to directly control 18 serially connected digital potentiometer chips 2. To facilitate later debugging, the microcontroller chip 5 can also communicate with the host computer via Bluetooth or wireless WiFi, thereby avoiding the need for a large number of AFE acquisition harnesses on the slave board. It should be noted that the internal structure of the optocoupler isolation module 7 and its specific connection relationship with the corresponding modules are determined by... Figure 1 It is clearly shown, so I will not repeat it here.

[0041] In some embodiments, such as Figure 1 As shown, in the multiple resistor simulation units 3, the first potential terminal PA0 of the digital potentiometer chip 2 is left floating, the second potential terminal PB0 of the digital potentiometer chip 2 serves as the reference ground terminal VSS, and the sliding terminal of the digital potentiometer chip 2 serves as the signal output terminal PW0.

[0042] Specifically, in variable resistor mode, i.e., sliding resistor mode, microcontroller chip 5 can directly control digital potentiometer chip 2. Since the first potential terminal PA0 is floating and not connected to the power supply terminal VDD, the signal output terminal PW0 outputs a resistance state from 0KΩ to 100KΩ, which can be directly used to simulate the output of a controllable thermistor, for example... Figure 1 The resistors R1 to R5 are shown.

[0043] This invention proposes a wireless connector for debugging battery management system software. For example, the male connector of this wireless connector is plugged into the female connector of the battery management system slave board. Only a few digital potentiometer chips 2 are needed to simulate the cell voltage of 18 series-connected batteries and 5 analog thermistors. These digital potentiometer chips 2 can be packaged in a very small space. This application packages the digital potentiometer chips 2 onto a connector at the wiring harness end of the slave board for debugging the battery management system. This connector can be easily plugged into the onboard connector, thus avoiding a large number of wiring harnesses. Compared with traditional solutions, this saves a significant amount of wiring harness time, facilitates debugging during program development, and saves a considerable amount of development time.

[0044] In some embodiments, the chip select terminal of the digital potentiometer chip 2 is connected to the serial peripheral interface of the microcontroller chip 5 through a serial data expansion chip.

[0045] Specifically, the basic requirement of SPI communication is that the standard SPI communication protocol requires the master device, i.e., the microcontroller chip 5, to provide each slave device, i.e., the digital potentiometer chip 2, with an independent chip select line. When a chip select line of the microcontroller chip 5 outputs a low level, the corresponding digital potentiometer chip 2 is selected and begins to respond to the clock and data signals issued by the microcontroller chip 5, while other digital potentiometer chips 2 ignore these signals. Figure 1 The adjustable connector for debugging the battery management system shown exemplarily designs 23 digital potentiometer chips 2, which requires the microcontroller chip 5 to have 23 SPI communication channels, resulting in a shortage of port resources for the microcontroller chip 5.

[0046] Therefore, the chip select pin of digital potentiometer chip 2 can be latched and expanded via a serial data expansion chip, such as, but not limited to, the 74HC164 model, and connected to the serial peripheral interface of microcontroller chip 5 to achieve control of multiple digital potentiometer chips 2 by a single microcontroller chip 5. Specifically, microcontroller chip 5 uses only a few SPI lines to connect to the input pin of this serial data expansion chip. The output pin of the serial data expansion chip is extended to multiple parallel output lines. Each output line is connected to the chip select pin of one digital potentiometer chip 2.

[0047] In some embodiments, the main control module is disposed on the control circuit board, the digital potentiometer chip 2 is disposed on the analog output circuit board, and the multi-stage transformer circuit 4 is disposed on the power conversion circuit board; wherein, the control circuit board, the analog output circuit board and the power conversion circuit board are stacked and fixed in layers in the internal space of the connector body.

[0048] Specifically, the control circuit board is dedicated to mounting and supporting the main control module, namely the microcontroller chip 5 and its peripheral circuits; the analog output circuit board is dedicated to mounting and supporting all the digital potentiometer chips 2; and the power conversion circuit board is dedicated to mounting and supporting the multi-stage transformer circuit 4. The control circuit board, analog output circuit board, and power conversion circuit board are stacked and fixed in layers within the connector body, greatly saving space and condensing a function that originally required a large chassis into a portable connector. The structure is compact, stable, and has good vibration resistance, making it suitable for industrial environments. It facilitates heat dissipation and electromagnetic shielding. It can separate the heat-generating power board from the sensitive signal processing board.

[0049] The adjustable connector for battery management system debugging provided in this application embodiment can simulate the voltage of a battery cell and the sensing temperature of a thermistor by controlling the voltage of each pin of the connector through a host computer, thereby avoiding the problems of cumbersome and difficult maintenance and debugging. The adjustable connector for battery management system debugging is small in size, low in cost, and flexible and simple to operate. It should be noted that this application embodiment does not limit the specific number of simulated battery cells and thermistors, which can be determined according to the specific project requirements.

[0050] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model, and not to limit it. Although this utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this utility model.

Claims

1. An adjustable connector for debugging a battery management system, characterized in that, include: The connector body has a plug portion that matches the slave board interface of the battery management system, and the connector body integrates the following internally: Multiple voltage simulation units, each including a digital potentiometer chip operating in potentiometer mode, wherein the signal output terminals of the multiple digital potentiometer chips operating in potentiometer mode are electrically connected to the corresponding voltage acquisition pins on the connector body; Multiple resistance simulation units, each including a digital potentiometer chip operating in variable resistance mode, wherein the signal output terminals of the multiple digital potentiometer chips operating in variable resistance mode are electrically connected to the corresponding temperature acquisition pins on the connector body. A multi-stage transformer circuit, wherein the input terminal of the multi-stage transformer circuit is connected to a power supply, and the output terminal of the multi-stage transformer circuit outputs multiple different voltage levels, wherein the multiple different voltage levels respectively supply power to the power supply terminal of the digital potentiometer chip in the multiple voltage analog units; The main control module includes a microcontroller chip, which is electrically connected to the control terminal of the digital potentiometer chip in the plurality of voltage analog units and the plurality of resistance analog units through a serial peripheral interface.

2. The adjustable connector for debugging a battery management system according to claim 1, characterized in that, In the plurality of voltage simulation units, the second potential terminal of the (n+1)th digital potentiometer chip is connected to the first potential terminal of the nth digital potentiometer chip to simulate the voltage of the (n+1)th cells in the series battery pack, where n is a positive integer.

3. The adjustable connector for debugging a battery management system according to claim 1, characterized in that, In the plurality of voltage analog units, the first potential terminal of the digital potentiometer chip is connected to the power supply of the corresponding voltage level output by the multi-stage transformer circuit, the second potential terminal of the digital potentiometer chip serves as the reference ground terminal, and the sliding terminal of the digital potentiometer chip serves as the signal output terminal.

4. The adjustable connector for debugging a battery management system according to claim 1, characterized in that, The multi-stage transformer circuit includes multiple transformers connected in series. Each transformer corresponds to a voltage simulation unit. The first output terminal of the transformer is connected to the power supply terminal of the corresponding digital potentiometer chip, and the second output terminal of the transformer is connected to the reference ground terminal of the corresponding digital potentiometer chip.

5. The adjustable connector for debugging a battery management system according to claim 1, characterized in that, In the plurality of resistor analog units, the first potential terminal of the digital potentiometer chip is left floating, the second potential terminal of the digital potentiometer chip serves as a reference ground terminal, and the sliding terminal of the digital potentiometer chip serves as the signal output terminal.

6. The adjustable connector for debugging a battery management system according to any one of claims 1-5, characterized in that, The chip select terminal of the digital potentiometer chip is connected to the serial peripheral interface of the microcontroller chip through a serial data expansion chip.

7. The adjustable connector for debugging a battery management system according to any one of claims 1-5, characterized in that, Also includes: An optocoupler isolation module is disposed between the serial peripheral interface of the microcontroller chip and the control terminal of the digital potentiometer chip in the plurality of voltage analog units.

8. The adjustable connector for debugging a battery management system according to any one of claims 1-5, characterized in that, Also includes: A wireless communication module is electrically connected to the microcontroller chip.

9. The adjustable connector for debugging a battery management system according to claim 8, characterized in that, The wireless communication module is a Bluetooth module or a Wi-Fi module.

10. The adjustable connector for debugging a battery management system according to any one of claims 1-5, characterized in that, The main control module is mounted on the control circuit board, the digital potentiometer chip is mounted on the analog output circuit board, and the multi-stage transformer circuit is mounted on the power conversion circuit board; wherein, the control circuit board, the analog output circuit board, and the power conversion circuit board are stacked and fixed in layers within the internal space of the connector body.