A low power photonic integrated device structure

Abstract

The utility model discloses a kind of low-power consumption photonic integrated device structures, it is related to the technical field of semiconductor optoelectronic integrated device, the device structure includes substrate, cantilever beam grating layer, two gain layers and two modulator layers of symmetrical distribution, cladding layer and electrical contact layer, cladding layer and electrical contact layer constitute shallow ridge waveguide structure, two gain layers of symmetrical distribution and middle cantilever beam grating layer jointly constitute double-end resonant cavity structure, the structure shares unified grating and hot tuning platform to realize the continuous, synchronization and high-precision control of cavity mode wavelength, cooperate two sides symmetrical integrated high-speed modulator layer, realize the equalization modulation and phase synchronization of double-end output;The utility model technical scheme is by symmetrical integrated gain layer, grating layer and modulator layer, can obtain synchronous scanning, low drift and high-quality laser output of strong anti-interference, simultaneously using the efficient hot tuning function of cantilever beam grating layer, significantly reduce power consumption.

Description

Technical Field

[0001] This utility model relates to the technical field of semiconductor optoelectronic integrated devices, and more specifically, to a low-power photonic integrated device structure. Background Technology

[0002] With the rapid development of optical communication technology, the performance requirements of optical devices in data transmission modules are continuously increasing. On the one hand, optical devices must support higher transmission rates to meet the needs of data center interconnection, high-bandwidth optical links, and advanced modulation formats; on the other hand, the power consumption of optical devices needs to be further reduced to achieve efficient on-chip integration with electrical chips, while meeting the development trend of high-speed, high-density optoelectronic integration. Furthermore, with the continuous enrichment of communication protocols and network standards, different standards are placing increasingly stringent requirements on the center wavelength, tuning range, and stability of the transmitting end light source, requiring lasers to maintain continuous, controllable, and low-drift wavelength tuning characteristics over a wide range.

[0003] To meet the diverse needs of optical modules for different types of light sources, existing tunable lasers typically employ single-end gain structures, multiple independent cavities, or multi-plate grating structures. However, these structures generally suffer from the following problems:

[0004] 1) Since the gain region, phase region, and modulation region are all single-ended, the integration density is low and the utilization rate of gain materials is low; 2) Existing thermal tuning often relies on high current drive, resulting in high power consumption. Furthermore, due to insufficient thermal isolation in the grating region, the wavelength tuning efficiency is low, which cannot meet the requirements of low-power on-chip systems; 3) The modulator and laser cavity are mostly heterogeneous or asymmetric integrated structures, which makes it impossible to achieve synchronous modulation of dual-ended outputs. This makes it difficult to apply to coherent link bidirectional compensation, dual-ended interconnection, or sensitive fiber optic sensing systems that have extremely high requirements for synchronization and interference suppression. Utility Model Content

[0005] The purpose of this invention is to address the significant shortcomings of existing technologies in synchronous dual-end output, consistency control, and low-power tuning by providing a low-power photonic integrated device. This device combines a cantilever beam-type dual-end output tunable laser with an electro-absorption modulator. The cantilever beam structure enables low-current heating for wavelength tuning, resulting in stable and accurate wavelength output. The dual-end integrated electro-absorption modulator enhances signal strength, and the dual-end output allows for a shared grating tuning area, improving the integration of the optical device and meeting the high-performance and low-power requirements of high-speed optical communication systems.

[0006] The technical solution of this utility model is: to provide a low-power photonic integrated device structure, which includes: a substrate, a first gain layer, a second gain layer, a grating layer, a first modulator layer, a second modulator layer, a cladding layer, and an electrical contact layer;

[0007] The first modulator layer, the first gain layer, the grating layer, the second gain layer, and the second modulator layer are arranged closely above the substrate in a predetermined direction and are located in the same plane. The cladding layer and the electrical contact layer are arranged from bottom to top above the entire functional layer composed of the first modulator layer, the first gain layer, the grating layer, the second gain layer, and the second modulator layer. The corresponding P-side electrodes are respectively arranged above the electrical contact layers corresponding to the first gain layer and the second gain layer. A heating resistor is arranged above the electrical contact layer corresponding to the middle part of the grating layer. P-side electrodes are arranged above the electrical contact layers corresponding to both sides of the grating layer. N-side electrodes are arranged below the substrate.

[0008] The cladding and electrical contact layer together form a shallow ridge waveguide structure. This shallow ridge waveguide structure is laterally positioned at the center of the entire functional layer's upper surface. A cantilever beam structure is laterally positioned in the middle of the grating layer, and the cantilever beam structure is located directly below the shallow ridge waveguide structure.

[0009] Furthermore, a first modulator region, a first gain region, a first phase region, a grating region, a second phase region, a second gain region, and a first modulator region are sequentially arranged on the substrate along a predetermined direction, with adjacent regions being closely connected.

[0010] Furthermore, the grating layer is disposed on the entire region on the substrate consisting of the first phase region, the grating region, and the second phase region, with the grating region located at the center of the substrate; periodically arranged micro-reflective structures are disposed above the grating layer within the grating region, and the surface above the grating layer within the first and second phase regions maintains its original flat structure.

[0011] Furthermore, the first gain layer and the second gain layer are respectively disposed in the first gain region and the second gain region of the substrate. The first gain region and the second gain region have equal areas and are symmetrical about the center of the substrate. The first gain layer and the second gain layer are used to provide a light source and a gain medium.

[0012] Furthermore, the first gain layer comprises, from bottom to top, a first lower confinement layer, a first multiple quantum well layer, and a first upper confinement layer. The first multiple quantum well layer is the carrier recombination and photon generation region. The first lower confinement layer and the first upper confinement layer are used to form the lower and upper potential barriers of the quantum well, respectively. The structure and function of the second gain layer are the same as those of the first gain layer.

[0013] Furthermore, the first modulator layer and the second modulator layer are respectively disposed in the first modulator region and the second modulator region of the substrate. The gate areas of the first modulator region and the second modulator region are equal and symmetrical about the center of the substrate. The first modulator layer and the second modulator layer are used to perform electro-absorption modulation on the optical signal.

[0014] Furthermore, the first modulator layer comprises, from bottom to top, a second lower confinement layer, a second multiple quantum well layer, and a second upper confinement layer. The second multiple quantum well layer is an active absorption layer, and the second lower confinement layer and the second upper confinement layer are used to form the lower and upper potential barriers of the quantum well, respectively. The structure and function of the second modulator layer are the same as those of the first modulator layer.

[0015] Furthermore, the cantilever beam structure consists of a cantilever arm at the central position and air slots symmetrically distributed on both sides. The cantilever arm is located directly below the shallow ridge waveguide structure, and its upper surface is wider than the shallow ridge waveguide structure by a predetermined distance. The air slots are hexagonal slot structures.

[0016] Furthermore, an electrical isolation trench is provided on the electrical contact layer, and the electrical isolation trench is located between two adjacent regions arranged in a predetermined direction on the substrate.

[0017] Furthermore, P-plane electrodes are respectively disposed above the electrical contact layers corresponding to the first gain region, the first phase region, the second phase region, and the second gain region. A heating resistor is disposed above the electrical contact layer corresponding to the grating region. A positive electrode and a negative electrode are disposed at both ends of the heating resistor. An N-plane electrode is disposed on the entire surface below the substrate after thinning treatment. A silicon nitride thin film is also disposed above the electrical contact layer. The silicon nitride thin film is located below each P-plane electrode and the heating resistor.

[0018] The beneficial effects of this utility model are:

[0019] The technical solution of this utility model integrates two symmetrically distributed gain layers and a cantilever beam grating layer located in the middle on the same substrate. Together, they form a resonant cavity structure for dual-end synchronous amplification and tuning. High-speed modulators are symmetrically integrated on both sides of this dual-end resonant cavity structure. By utilizing the shared unified grating and thermal tuning platform of the dual-end structure, continuous, synchronous, and high-precision control of the cavity mode wavelength can be achieved. With the high-speed modulators symmetrically distributed on both sides, balanced modulation and phase synchronization of the dual-end output can be achieved, thereby obtaining high-quality laser output with synchronous scanning, low drift, and strong anti-interference. The technical solution of this utility model reduces the alignment error caused by multiple gratings and multiple cavity structures by symmetrically integrating the gain layer, grating layer, and modulator layer. At the same time, the cantilever beam grating layer achieves efficient thermal tuning of the effective refractive index and wavelength in the cavity, significantly reducing power consumption while reducing tuning current. Attached Figure Description

[0020] The advantages of the above and additional aspects of this utility model will become apparent and readily understood in the description of the embodiments in conjunction with the following drawings, wherein:

[0021] Figure 1 This is a schematic diagram of a low-power photonic integrated device structure according to an embodiment of the present invention;

[0022] Figure 2 This is a schematic diagram of the growth gain layer material according to an embodiment of the present invention;

[0023] Figure 3 This is a schematic diagram of the gain layer material after removing the dual-end modulator region according to an embodiment of the present invention;

[0024] Figure 4 This is a schematic diagram of the growth of modulator material in the dual-end modulator region according to an embodiment of the present invention;

[0025] Figure 5 This is a schematic diagram of the gain layer material after removing the double-ended phase region and grating region according to an embodiment of the present invention;

[0026] Figure 6 This is a schematic diagram of the growth of grating layer material after docking in the double-ended phase region and grating region according to an embodiment of the present invention;

[0027] Figure 7 This is a schematic diagram of the entire surface after the cladding and electrical contact layer have been grown according to an embodiment of the present invention;

[0028] Figure 8 This is a side view of an inverted shallow ridge waveguide structure according to an embodiment of the present invention;

[0029] Figure 9 This is a top view of a cantilever beam structure according to an embodiment of the present invention;

[0030] Figure 10 This is a side-section schematic diagram of a cantilever beam structure according to an embodiment of the present invention;

[0031] Figure 11 This is a top view of a low-power photonic integrated device structure according to an embodiment of the present invention.

[0032] Among them, 10-substrate, 11-first gain layer, 111-first lower confinement layer, 112-first multiple quantum well layer, 113-first upper confinement layer, 12-second gain layer, 13-grating layer, 131-micro-reflective structure, 132-cantilever arm, 133-air groove, 14-first modulator layer, 141-second lower confinement layer, 142-second multiple quantum well layer, 143-second upper confinement layer, 15-second modulator layer, 16-cladding layer, 17-electrical contact layer, 171-electrical isolation trench, 18-P-side electrode, 19-heating resistor, 191-positive electrode, 192-negative electrode, 20-N-side electrode, 21-mask. Detailed Implementation

[0033] To better understand the above-mentioned objectives, features, and advantages of this utility model, the present utility model will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that, unless otherwise specified, the embodiments of this utility model and the features thereof can be combined with each other.

[0034] In the following description, many specific details are set forth in order to provide a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Therefore, the scope of protection of the present invention is not limited to the specific embodiments disclosed below.

[0035] like Figure 1 As shown, this embodiment provides a low-power photonic integrated device structure, which includes: a substrate 10, a first gain layer 11, a second gain layer 12, a grating layer 13, a first modulator layer 14, a second modulator layer 15, a cladding layer 16, and an electrical contact layer 17.

[0036] The first modulator layer 14, the first gain layer 11, the grating layer 13, the second gain layer 12, and the second modulator layer 15 are arranged closely above the substrate 10 in a preset direction and are located in the same plane. The cladding layer 16 and the electrical contact layer 17 are arranged from bottom to top above the functional layer composed of the first modulator layer 14, the first gain layer 11, the grating layer 13, the second gain layer 12, and the second modulator layer 15. The corresponding P-side electrodes are respectively arranged above the electrical contact layers 17 corresponding to the first gain layer 11 and the second gain layer 12. The heating resistor is arranged above the electrical contact layer 17 corresponding to the middle part of the grating layer 13. The P-side electrodes are arranged above the electrical contact layers 17 corresponding to both sides of the grating layer 13. The N-side electrodes are arranged below the substrate 10.

[0037] The upper surface of substrate 10 is sequentially divided along a predetermined direction into a first modulator region (marked 1), a first gain region (marked 2), a first phase region (marked 3), a grating region (marked 4), a second phase region (marked 5), a second gain region (marked 6), and a first modulator region (marked 7), with adjacent regions closely connected. The grating region is located at the center of the upper surface of substrate 10. The first and second phase regions have equal areas and are symmetrically arranged on both sides of the grating region. The first and second gain regions have equal areas and are symmetrically arranged on both sides of the entire region composed of the grating region and the two phase regions. The first and second modulator regions have equal areas and are symmetrically arranged on both sides of the entire region composed of the grating region, the two phase regions, and the two gain regions, with adjacent regions closely connected. In this embodiment, the predetermined direction is represented as follows: Figure 11 The direction shown is from left to right.

[0038] The first gain layer 11 and the second gain layer 12 are respectively disposed in the first gain region and the second gain region of the substrate 10. The first gain region and the second gain region have equal areas and are symmetrical about the center of the substrate 10. The first gain layer 11 and the second gain layer 12 are respectively used to provide a light source and a gain medium for the device to emit light. The two gain layers can generate photon gain by injecting current, enabling the device to emit tunable light signals. Furthermore, applying different DC voltages can also excite multiple lasers of different wavelengths, meeting the device's requirement for multiple wavelengths.

[0039] Specifically, the first gain layer 11 includes, from bottom to top, a first lower confinement layer 111, a first multi-quantum well layer 112, and a first upper confinement layer 113. The first multi-quantum well layer 112 is the carrier recombination and photon generation region. The first lower confinement layer 111 and the first upper confinement layer 113 are used to form the lower and upper potential barriers of the quantum well, respectively, to restrict the movement of carriers in the quantum well, prevent diffusion, and ensure the stability of the optical field and carrier distribution. The structure and function of the second gain layer 12 are the same as those of the first gain layer 11, and will not be described in detail here.

[0040] It should be noted that by symmetrically setting two gain regions at both ends of the grating region and the two-phase region, the light field can form a symmetrical resonant structure along both sides of the device, thus forming two independent yet coherently coupled wavelength-tunable lasers. Relying on the common grating region, these two lasers can achieve double-end face light output, which can not only meet the application requirements of the device under different transmission directions and different link topologies, but also facilitate the flexible configuration of the light source in multi-channel or bidirectional communication scenarios.

[0041] The first modulator layer 14 and the second modulator layer 15 are respectively disposed in the first modulator region and the second modulator region of the substrate 10 by a docking growth method. The first modulator layer 14 is located on the side of the first gain layer 11 away from the center of the substrate 10, and the second modulator layer 15 is located on the side of the second gain layer 12 away from the center of the substrate 10. The gate areas of the first modulator region and the second modulator region are equal and symmetrical about the center of the substrate 10. The first modulator layer 14 and the second modulator layer 15 are respectively used to perform electro-absorption modulation on the optical signal.

[0042] Specifically, the first modulator layer 14 includes, from bottom to top, a second lower confinement layer 141, a second multiple quantum well layer 142, and a second upper confinement layer 143. The second multiple quantum well layer 142 is an active absorption layer used to absorb and modulate optical signals under the action of an external electric field. The second lower confinement layer 141 and the second upper confinement layer 143 are used to form the lower and upper potential barriers of the quantum well, respectively, to restrict the movement of charge carriers in the quantum well, prevent diffusion, and ensure the stability of the optical field and charge carrier distribution. The structure and function of the second modulator layer 15 are the same as those of the first modulator layer 14, and will not be described in detail here.

[0043] The photofluorescence wavelength of the second quantum well layer 142 is shorter than that of the first quantum well layer 112 by a predetermined wavelength value, which is in the range of 40-70 nm. The photofluorescence wavelength of the quantum well layer in the second modulator layer 15 is the same as that of the second quantum well layer 142, and the photofluorescence wavelength of the quantum well layer in the second gain layer 12 is the same as that of the first quantum well layer 112.

[0044] The first modulator layer 14 and the second modulator layer 15 are used to realize the electro-absorption modulation of the optical signal. Specifically, applying a reverse voltage (e.g., 0-3V) to the modulator region can cause a wavelength redshift, enhance the absorption capability of the emitted laser, and achieve controllable attenuation of the light intensity. On this basis, an radio frequency signal is superimposed on the reverse bias voltage, causing the electric field at both ends of the modulator to change rapidly with time, resulting in a periodic change in the absorption coefficient. When the applied radio frequency signal is at a high level, the total reverse voltage increases, the absorption is enhanced, and the output light intensity is weakened. When the radio frequency signal is at a low level, the total reverse voltage decreases, the absorption is weakened, and the output light intensity is enhanced. Through this electric field modulation, the high and low levels of the electrical signal can be corresponding to the "0" and "1" states of the optical signal, respectively, thereby realizing high-speed intensity modulation of continuous laser and improving the optical signal transmission rate and modulation accuracy. When the modulator is working, it can support optical signal modulation and transmission rates of more than 100 Gbps (i.e., 100 billion bits per second).

[0045] In this embodiment, the process of docking and growing the first modulator layer 14 and the second modulator layer 15 includes: covering the gain layer material of the first gain region, the first phase region, the grating region, the second phase region and the second gain region with a SiO2 mask 21; etching and removing the active layer material of the first modulator region and the second modulator region using a reactive ion etching device; and etching and removing the residual gain layer material using an H2SiO4 solution. Then, using a metal-organic chemical vapor deposition device, the modulator layer material is docked and grown layer by layer from bottom to top in the first modulator region and the second modulator region respectively to form the first modulator layer 14 and the second modulator layer 15 with the same structure. The first modulator layer 14 includes, from bottom to top, a second lower confinement layer 141, a second multiple quantum well layer 142 and a second upper confinement layer 143, and the SiO2 mask 21 is removed.

[0046] The SiO2 mask 21 can be fabricated by etching, including the following steps: growing a SiO2 thin film layer with a thickness of 200 nm on the surface using plasma chemical vapor deposition equipment, and fabricating a predetermined pattern on the SiO2 thin film layer using photolithography and wet etching to cover the material layers that do not need to be removed; after completing the selective removal of other material layers, removing the SiO2 thin film layer by wet etching or dry etching.

[0047] The grating layer 13 is disposed on the substrate 10 in the entire region consisting of the first phase region, the grating region, and the second phase region by a butt joint growth method. The grating layer 13 is located in the center of the entire substrate 10 and is disposed between the first gain layer 11 and the second gain layer 12. The grating region is located between the first phase region and the second phase region. The grating layer 13 in the grating region is etched above to form periodically arranged micro-reflective structures 131, which are used to construct feedback coupling (i.e., the grating reflects light of a specific wavelength back, so that it couples with the propagating light to form the feedback loop required for laser oscillation) and wavelength selection (i.e., only a specific wavelength of light is reflected most strongly, and other wavelengths are reflected weakly). The grating layer 13 in the first phase region and the second phase region is kept in its original flat structure and is not etched to avoid introducing additional optical feedback in this region (to prevent the phase region from becoming a redundant mirror, only changing the phase of the light without reflection, and avoiding functional mixing), and to ensure the independence of phase modulation of the two phase regions and the continuity of the light field distribution.

[0048] The photofluorescence wavelength of the grating layer 13 is shorter than the photofluorescence wavelength of the first quantum well layer 112 by a second predetermined wavelength value, which is in the range of 100-200 nm.

[0049] In this embodiment, the process of fabricating the grating layer 13 includes: firstly, covering the first modulator layer 14, the first gain layer 11, the second gain layer 12, and the second modulator layer 15 with a SiO2 mask 21; then, using reactive ion etching equipment to etch and remove the gain layer material of the first phase region, the grating region, and the second phase region; cleaning the substrate 10 with acetone and ethanol; and using H2SiO4 solution to etch and remove the residual gain layer material; finally, using metal-organic chemical vapor deposition equipment to grow and connect the grating layer material in the region composed of the first phase region, the grating region, and the second phase region; removing the SiO2 mask 21; and etching periodically arranged micro-reflective structures 131 above the grating layer material within the grating region, ultimately forming a patterned grating layer 13.

[0050] Among them, the periodically arranged micro-reflective structures 131 on the grating layer material can be fabricated by photolithography and dry etching. The periodic patterned mask is formed by photolithography, and the microstructure is etched by reactive ion etching or deep silicon etching process. Finally, the patterned mask is removed.

[0051] The cladding layer 16 and the electrical contact layer 17 together constitute a shallow ridge waveguide structure. This shallow ridge waveguide structure is laterally positioned at the center of the upper surface of the functional layer composed of the first modulator layer 14, the first gain layer 11, the grating layer 13, the second gain layer 12, and the second modulator layer 15. It is formed by integrally etching the cladding layer 16 and the electrical contact layer 17, which are arranged on the entire surface, according to a predetermined ridge strip pattern. The cladding layer 16 is used to provide a refractive index difference in the vertical direction to effectively limit and constrain the optical mode, so that the light field is concentrated in the lower gain layer and the central region of the waveguide, thereby improving the optical coupling efficiency and gain efficiency, and reducing light leakage and propagation loss. The electrical contact layer 17 is used to achieve good ohmic contact.

[0052] It should be noted that the cladding layer 16 and the electrical contact layer 17 are formed after partial etching, as shown in the figure. Figure 7 The ridge structure shown has an etching depth limited to the area where the cladding layer 16 and the electrical contact layer 17 are located, and does not penetrate the underlying active layer (including the first modulator layer 14, the first gain layer 11, the grating layer 13, the second gain layer 12, and the second modulator layer 15). This shallow ridge waveguide structure can improve carrier injection efficiency and optimize electro-optic conversion performance through the refractive index difference in shape and current confinement. At the same time, it can also achieve lateral confinement of light waves and current, reduce optical losses, and improve the stability and reliability of the device.

[0053] In this embodiment, the cladding 16 and the electrical contact layer 17 are etched as a whole to form a shallow ridge waveguide structure. The specific process includes: firstly, a transverse strip mask is made at the central position of the electrical contact layer 17, and the entire cladding 16 and electrical contact layer 17 are etched by SiCl4 gas dry etching to form a shallow ridge structure. Then, the two sides of the shallow ridge structure are modified by HCl solution wet etching to finally form an inverted truncated shallow ridge waveguide structure that conforms to the predetermined ridge strip pattern. The etching depth is controlled within the range of the cladding 16 and the electrical contact layer 17, and does not penetrate the cladding 16 to the material layer below it.

[0054] like Figure 8 As shown, in this embodiment, the shallow ridge waveguide structure is laterally distributed along the horizontal direction from the first modulator layer 14 to the second modulator layer 15 (that is, the preset direction).

[0055] A cantilever beam structure is laterally arranged in the middle of the grating layer 13. The cantilever beam structure consists of a cantilever arm 132 at the central position and air slots 133 symmetrically distributed on both sides. The cantilever arm 132 is located directly below the shallow ridge waveguide structure, and its upper surface is wider than the shallow ridge waveguide structure by a predetermined distance, which can be set to 5 micrometers. The air slots 133 are hexagonal slot structures. The cantilever beam structure is formed by etching the grating layer 13 located below the shallow ridge waveguide structure according to a predetermined cantilever strip pattern.

[0056] In this embodiment, the process of fabricating the cantilever beam structure specifically includes: firstly, dividing the upper surface of the grating layer 13 within the grating region into positions corresponding to two symmetrically distributed air slots 133. The positions of the two air slots 133 are located on both sides close to the shallow ridge waveguide structure and arranged parallel to the shallow ridge waveguide structure. Then, a mask with a cantilever strip pattern is fabricated on the entire device using photolithography. This mask is used to cover all positions except the positions where the air slots 133 are located. The grating layer material corresponding to the positions of the air slots 133 is removed using reactive ion etching equipment and hydrobromic acid etching to form a cantilever beam structure composed of a central cantilever arm 132 and two symmetrical air slots 133 on both sides. The etching depth is controlled within the grating layer 13 and does not penetrate the grating layer 14 to the substrate 10 below it.

[0057] Electrical isolation trenches 171 are also etched on the electrical contact layer 17. The electrical isolation trenches 171 are located between two adjacent regions (first modulator region, first gain region, first phase region, grating region, second phase region, second gain region and first modulator region) arranged in a preset direction on the substrate 10, and are used to electrically isolate each region.

[0058] In this embodiment, the etching of the electrical isolation trench 171 can be carried out by photolithography and dry etching. For example, a patterned mask corresponding to the electrical isolation trench 171 can be formed by photolithography first, and then the electrical isolation trench 171 can be etched on the electrical contact layer 17 between adjacent areas by reactive ion etching or deep silicon etching process, and finally the mask can be removed.

[0059] It should be noted that the first gain layer 11, the grating layer 13 within the grating region, and the second gain layer 12 together constitute the laser resonant cavity structure. The first gain layer 11 and the second gain layer 12 are symmetrical in structure, and both can provide optical gain after the injection of driving current. They generate stimulated emission light field through carrier recombination, providing double-end gain compensation for the resonant cavity. The grating layer 13 within the grating region can provide Bragg reflection through its periodic microstructure (periodically arranged micro-reflective structures 131), realizing feedback and wavelength selection of the optical field in the cavity, ensuring stable oscillation in a specific wavelength mode. The first gain layer 11, the grating layer 13 within the grating region, and the second gain layer 12 work together to construct a symmetrical distributed feedback cavity structure, so that laser signals with selected wavelengths are simultaneously output from both ends of the device, improving coupling flexibility and adaptability to multi-directional links.

[0060] P-surface electrodes 18 are respectively disposed above the electrical contact layers 17 corresponding to the first gain region, the first phase region, the second phase region, and the second gain region. The P-surface electrodes disposed above the first gain region and the second gain region are used to input driving current into the gain layer to drive the laser resonator to oscillate and achieve stable light output. The P-surface electrodes disposed above the first phase region and the second phase region are used to input tuning current into the phase region to change the refractive index of the phase region, thereby achieving fine control of the phase of the optical signal in the cavity and enabling the output wavelength to be continuously and stably tuned.

[0061] A heating resistor 19 is disposed above the electrical contact layer 17 corresponding to the grating region. The middle part of the heating resistor 19 covers the shallow ridge waveguide structure. The two ends of the heating resistor 19 are a positive electrode 191 and a negative electrode 192, which are used to connect to the positive and negative terminals of an external power supply, respectively. The heating resistor 19 provides heating power to the grating layer 13 within the grating region through the shallow ridge waveguide structure below it, thereby changing its refractive index and reflection phase for thermal tuning, thus achieving fine wavelength tuning of the output optical signal. The heating resistor 19 is made of titanium-platinum material.

[0062] After thinning, N-face electrodes 20 are formed on the entire surface of the substrate 10. The N-face electrodes 20 are used to provide a common current loop for the entire device.

[0063] In this embodiment, the thinning process below the substrate 10 can be carried out by mechanical grinding and polishing, wet chemical etching, dry etching, etc., to ensure that the substrate thickness is uniform and the surface is flat, which is beneficial to the subsequent deposition and adhesion of the N-side electrode 20, while reducing the device resistance and improving the overall current loop efficiency.

[0064] A silicon nitride thin film with a thickness of 250 nm is also disposed above the electrical contact layer 17. This silicon nitride thin film is located below each P-side electrode 18 and the heating resistor 19 to achieve electrical insulation, surface passivation and structural protection, while suppressing surface state recombination and metal absorption, thereby improving device stability and tuning efficiency. The titanium-platinum heating resistor and the silicon nitride insulating film have a strong bonding force, and the combination of the two can improve the heating efficiency after energization.

[0065] In this embodiment, under the InP-based material system, the substrate 10 is an N-type InP substrate (indium phosphide), the first modulator layer 14 and the second modulator layer 15 are InGaAlAs (indium gallium aluminum arsenide) active materials, the first gain layer 11 and the second gain layer 12 are InGaAlAs active materials, wherein the modulator layer and the gain layer are made of the same material composition but with different proportions, which can achieve different effects, the grating layer 13 is InGaAsP (indium gallium arsenide phosphide) bulk material, the cladding layer 16 is InP cladding material, the electrical contact layer 17 is InGaAs contact layer material, the heating resistor 19 is titanium-platinum material, the P-side electrode can be titanium-gold material, and the N-side electrode can be gold-germanium-nickel alloy material.

[0066] It should be noted that this application employs two symmetrically distributed gain layers and a cantilever beam grating layer located in the middle to form a laser resonant cavity structure. The cladding and electrical contact layers are fabricated into shallow ridge waveguide structures. The two symmetrically distributed gain layers simultaneously provide optical gain, ensuring symmetrical amplification of the intracavity optical field and power balance at both ends. The shallow ridge waveguide structure enhances optical field confinement and thermal isolation to thermally tune the cantilever beam grating layer, achieving precise and controllable adjustment of the intracavity optical wavelength. The two ends of the grating layer are located in symmetrical phase regions and do not contain micro-reflective structures, allowing for the application of tuning current. Under certain conditions, the output optical signal is independently phase modulated, enabling the laser output wavelength to be scanned continuously and stably. Simultaneously, this application also symmetrically integrates two modulator layers on both sides of the entire laser resonant cavity structure. These modulator layers apply independent modulation to the optical signal within the cavity, achieving precise control of the optical signal amplitude. This allows the entire device to output modulated, dual-end synchronized laser signals. With the combined action of the symmetrically distributed gain layers and modulator layers, symmetrical amplification of the intracavity optical field, synchronous wavelength scanning, and synchronous modulation control can be achieved, resulting in high-precision, low-interference optical signal output.

[0067] The device structure described in this application, comprising two symmetrically distributed gain layers and a modulator layer at both ends, and a shared cantilever beam grating layer at the center, can be applied to scenarios requiring strict wavelength consistency and synchronous tunability, such as coherent link bidirectional compensation, fiber optic sensor array demodulation, on-chip bidirectional interconnection, and frequency-locked systems. Because the two gain regions share a unified grating structure and thermal tuning platform, and the two ends of the grating structure are located in symmetrical phase regions, the intracavity phase can be independently adjusted, enabling continuous fine-tuning and precise synchronous control of the cavity mode wavelength. This ensures that the output light at both ends remains highly synchronized and mode-consistent during scanning, minimizing wavelength drift. Combined with the symmetrically arranged modulator layer, it achieves balanced modulation and phase synchronization in both outputs, significantly improving system stability, anti-interference capability, and measurement accuracy. Furthermore, by symmetrically integrating two gain layers and two modulator layers on the same substrate and sharing a cantilever beam grating layer, not only is the number of gratings reduced, avoiding alignment and registration errors between multiple independent devices, but process consistency is also improved, the manufacturing process is simplified, mass production efficiency is increased, and the manufacturing cost of a single device is reduced.

[0068] In this embodiment, the low-power photonic integrated device structure of this application is tested, and the specific steps are as follows:

[0069] By applying an 80 mA DC current to the first gain region and the second gain layer 12 through the P-side electrode, stimulated emission is generated, and the device emits light normally, outputting a laser signal. A current of 0-50 mA is applied to the heating resistor 19 (gradually changing from 0 to 50 mA) to locally heat the grating region, achieving mode selection and thermal tuning of the laser wavelength. A current of 0-20 mA is applied to the first and second phase regions through the P-side electrode to assist the grating region in achieving continuous wavelength tuning. Then, a reverse voltage is applied to the modulator region to achieve absorption modulation. At the same time, an RF signal is superimposed on the reverse voltage to achieve "0" and "1" modulation of the optical signal. The output laser signal intensity is adjusted to a preset value for experimental observation. Finally, the center wavelength of the laser output is measured at each current point from 0-50 mA, the tuning range of the wavelength as a function of the current is recorded, and the overall transmission rate of the device is tested.

[0070] The test results show that wavelength tuning of more than 12 nm can be achieved with a phase current in the range of 0-20 mA, while traditional current tuning methods require 0-80 mA to achieve the same wavelength tuning range. Therefore, this invention significantly reduces power consumption. Driven by the reverse voltage in the modulator region and the superimposed high-speed radio frequency signal, this device with integrated high-speed absorption modulator can achieve a data transmission rate of more than 100 Gbps.

[0071] The units in this utility model device can be merged, divided, or reduced according to actual needs.

[0072] In this utility model, the terms "installation," "connection," "linking," and "fixing" should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; "linking" can be a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of these terms in this utility model according to the specific circumstances.

[0073] The shapes of the components in the accompanying drawings are schematic and may differ from their actual shapes. The drawings are only used to illustrate the principle of this utility model and are not intended to limit this utility model.

[0074] Although the present invention has been disclosed in detail with reference to the accompanying drawings, it should be understood that these descriptions are merely exemplary and not intended to limit the application of the present invention. The scope of protection of the present invention is defined by the appended claims and may include various modifications, alterations, and equivalents made to the invention without departing from the scope and spirit of the present invention.

Claims

1. A low-power photonic integrated device structure, characterized in that, The low-power photonic integrated device structure includes: a substrate (10), a first gain layer (11), a second gain layer (12), a grating layer (13), a first modulator layer (14), a second modulator layer (15), a cladding layer (16), and an electrical contact layer (17). The first modulator layer (14), the first gain layer (11), the grating layer (13), the second gain layer (12), and the second modulator layer (15) are arranged closely above the substrate (10) in a preset direction and are located in the same plane. The cladding layer (16) and the electrical contact layer (17) are arranged from bottom to top above the entire functional layer composed of the first modulator layer (14), the first gain layer (11), the grating layer (13), the second gain layer (12), and the second modulator layer (15). The corresponding P-side electrodes are respectively arranged above the electrical contact layers (17) corresponding to the first gain layer (11) and the second gain layer (12). The heating resistor is arranged above the electrical contact layer (17) corresponding to the middle part of the grating layer (13). The P-side electrodes are arranged above the electrical contact layers (17) corresponding to both sides of the grating layer (13). The N-side electrodes are arranged below the substrate (10). The cladding (16) and the electrical contact layer (17) together form a shallow ridge waveguide structure. The shallow ridge waveguide structure is laterally positioned at the center of the entire functional layer. A cantilever beam structure is laterally positioned in the middle of the grating layer (13), and the cantilever beam structure is located directly below the shallow ridge waveguide structure.

2. The low-power photonic integrated device structure as described in claim 1, characterized in that, The substrate (10) is provided with a first modulator region, a first gain region, a first phase region, a grating region, a second phase region, a second gain region and a first modulator region in sequence along a preset direction, and two adjacent regions are closely connected.

3. The low-power photonic integrated device structure as described in claim 2, characterized in that, The grating layer (13) is disposed on the substrate (10) in the entire region consisting of the first phase region, the grating region and the second phase region, with the grating region located in the center of the substrate (10); a periodically arranged micro-reflective structure (131) is disposed above the grating layer (13) within the grating region, and the surface above the grating layer (13) within the first phase region and the second phase region maintains the original flat structure.

4. The low-power photonic integrated device structure as described in claim 2, characterized in that, The first gain layer (11) and the second gain layer (12) are respectively disposed in the first gain region and the second gain region of the substrate (10). The first gain region and the second gain region have equal areas and are symmetrical about the center of the substrate (10). The first gain layer (11) and the second gain layer (12) are used to provide a light source and a gain medium.

5. The low-power photonic integrated device structure as described in claim 4, characterized in that, The first gain layer (11) includes, from bottom to top, a first lower confinement layer (111), a first multi-quantum well layer (112), and a first upper confinement layer (113). The first multi-quantum well layer (112) is the carrier recombination and photon generation region. The first lower confinement layer (111) and the first upper confinement layer (113) are used to form the lower and upper potential barriers of the quantum well, respectively. The structure and function of the second gain layer (12) are the same as those of the first gain layer (11).

6. The low-power photonic integrated device structure as described in claim 2, characterized in that, The first modulator layer (14) and the second modulator layer (15) are respectively disposed in the first modulator region and the second modulator region of the substrate (10). The gate areas of the first modulator region and the second modulator region are equal and symmetrical about the center of the substrate (10). The first modulator layer (14) and the second modulator layer (15) are used to perform electro-absorption modulation on the optical signal.

7. The low-power photonic integrated device structure as described in claim 6, characterized in that, The first modulator layer (14) includes, from bottom to top, a second lower confinement layer (141), a second multiple quantum well layer (142), and a second upper confinement layer (143). The second multiple quantum well layer (142) is an active absorption layer. The second lower confinement layer (141) and the second upper confinement layer (143) are used to form the lower and upper barriers of the quantum well, respectively. The structure and function of the second modulator layer (15) are the same as those of the first modulator layer (14).

8. The low-power photonic integrated device structure as described in claim 1, characterized in that, The cantilever beam structure consists of a cantilever arm (132) at the central position and air slots (133) symmetrically distributed on both sides. The cantilever arm (132) is located directly below the shallow ridge waveguide structure, and its upper surface is wider than the shallow ridge waveguide structure by a predetermined distance. The air slots (133) are hexagonal slot structures.

9. The low-power photonic integrated device structure as described in claim 2, characterized in that, An electrical isolation trench (171) is provided on the electrical contact layer (17), and the electrical isolation trench (171) is located at the position between two adjacent regions arranged in a preset direction on the substrate (10).

10. The low-power photonic integrated device structure as described in claim 2, characterized in that, A P-side electrode (18) is disposed above the electrical contact layer (17) corresponding to the first gain region, the first phase region, the second phase region, and the second gain region, respectively. A heating resistor (19) is disposed above the electrical contact layer (17) corresponding to the grating region. A positive electrode (191) and a negative electrode (192) are disposed at both ends of the heating resistor (19). An N-side electrode (20) is disposed on the entire surface of the substrate (10) after thinning treatment. A silicon nitride thin film is also disposed above the electrical contact layer (17). The silicon nitride thin film is located below each P-side electrode (18) and the heating resistor (19).

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