Multi-channel chronograph device based on break-make, make-break targets

CN224840812UActive Publication Date: 2026-10-09NANJING ZHUOLIZHI MEASURE&CONTROL TECH CO LTD
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Patent Information

Application Number
CN202522628956.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-12-11
Publication Date
2026-10-09
Estimated Expiration
2035-12-11

AI Technical Summary

Technical Problem

但是在测试过程中,由于获取的数据少及难以读取准确的有效数据;现有断/通靶、通/断靶各通道之间易受到干扰,测试的信号不准确,实验现场的布场过程也比较繁琐

Benefits of technology

本实用新型提供的一种基于断/通、通/断靶的多通道测时仪装置,该装置利用信号隔离模块对断/通、通/断靶的输出信号进行隔离输入,防止通道之间的信号干扰,由屏幕选择通靶或者断靶、工作模式、时间分辨率,测量的时间显示在屏幕上或发送到上位机中,便于数据采集。

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Patent Text Reader

Abstract

The utility model provides a multichannel time measuring instrument device based on break / pass, pass / break target, include: signal conditioning unit, the number of signal conditioning unit is greater than or equal to the output channel number of multichannel break pass, pass break target, signal conditioning unit includes signal isolation input module, pass break target selection module, signal processing module, screen display module and communication module, signal isolation input module, pass break target selection module, signal processing module, screen display module connect in proper order, screen display module passes through communication module and host computer data connection and will data transmission to host computer, and the convenient data acquisition can manually select pass target or pass target through screen display module, select time resolution and show each passageway time.
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Description

Technical Field

[0001] This utility model relates to the accurate measurement of fragment velocity in an explosion field, and in particular to a multi-channel timing device based on a cut-off / connected and connected / cut-off target. Background Technology

[0002] In explosion fields, open / closed targets and closed / open targets are commonly used to test parameters such as the velocity distribution characteristics of fragments. Before the fragment penetrates the target, the circuit is open; when the fragment contacts the target, the circuit becomes closed and generates a signal. Conversely, before the fragment penetrates the target, the circuit becomes closed; when the fragment contacts the target, the circuit becomes open and generates a signal. The time difference between these signals is measured to determine parameters such as velocity distribution characteristics. However, during testing, the available data is limited and it is difficult to obtain accurate and valid data. Existing open / closed targets and closed / open targets are susceptible to interference between their channels, resulting in inaccurate test signals. Furthermore, the setup process at the experimental site is cumbersome. Therefore, existing open / closed and closed / open target testing devices cannot meet the testing requirements and cannot provide an accurate and reliable test signal. Utility Model Content

[0003] The purpose of this invention is to provide a multi-channel timing device based on an on / off and on / off target. This device can be quickly set up at the test site. The time between the output signals of the multi-channel on / off and on / off targets is measured and displayed on the screen or transmitted to a host computer, facilitating data acquisition.

[0004] To achieve the above objectives, the technical solution adopted by this utility model is as follows: A multi-channel timing device based on open / closed targets, characterized in that it includes a signal conditioning unit, the number of which is greater than or equal to the number of output channels of the multi-channel open / closed targets. Each signal conditioning unit includes a signal isolation input module, an open / closed target selection module, a signal processing module, a screen display module, and a communication module. The output channels of the multi-channel open / closed targets are connected to the signal isolation input module, which is connected to the signal processing module. The signal processing module is connected to the screen display module, which is connected to a host computer via the communication module for data upload. The open / closed target selection module is connected to the signal processing module to select either an open / closed target or a closed / closed target as the output signal.

[0005] Furthermore, at least three signal conditioning units are provided.

[0006] Furthermore: the signal isolation input module includes an optocoupler isolation chip U1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first capacitor C1, a first diode D1, a first BNC input interface, a first transistor Q1, and a first LED. The VCC pin of the optocoupler isolation chip U1, one end of the first resistor R1, the third resistor R3, and the fifth resistor R5 are connected to the power supply VCC. The other end of the first resistor R1 is connected to the Anode pin of the optocoupler isolation chip U1. One end of the second resistor R2 is connected to the optocoupler isolation chip U1. The second resistor R2 is connected to the positive pin of the first BNC circuit, and the negative pin of the first BNC circuit is connected to the power supply GND. The other end of the first capacitor C1 is connected to the power supply GND. The other end of the third resistor R3 is connected to one end of the fourth resistor R4. The other end of the fourth resistor R4 is connected to the base of the first transistor Q1. The other end of the fifth resistor R5 and one end of the sixth resistor R6 are connected to the collector of the first transistor Q1. The other end of the sixth resistor R6 is connected to the positive pin of the first LED. The negative pin of the first LED is connected to the power supply GND. The emitter of the first transistor Q1 is connected to the power supply GND.

[0007] Furthermore: The on / off target selection module includes an analog switch chip U2, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a second LED, and a second capacitor C2. The VCC pin of the analog switch chip U2, one end of the seventh resistor R7, and one end of the second capacitor C2 are connected to the power supply VCC. The other end of the seventh resistor R7 is connected to the B1 pin of the analog switch chip U2. One end of the eighth resistor R8 is connected to the power supply GND, and the other end of the eighth resistor R8 is connected to the B1 pin of the analog switch chip U2. One end of the ninth resistor R9 is connected to the S pin of the analog switch chip U2, and the other end of the second capacitor C2 is connected to the power supply GND. One end of the tenth resistor R10 is connected to the A pin of the analog switch chip U2, and the other end of the tenth resistor R10 is connected to the positive terminal of the second LED. The negative terminal of the second LED is connected to the power supply GND, and the GND pin of the analog switch chip U2 is connected to the power supply GND.

[0008] Furthermore: the signal processing module includes an FPGA chip.

[0009] Furthermore, the screen display module includes a display screen through which the target can be manually selected, the time resolution can be adjusted, and the time of each channel can be displayed.

[0010] Furthermore: the communication module includes a first USB interface, a second diode D2, a serial port chip U3, an eleventh resistor R11, a twelfth resistor R12, a third capacitor C3, and a fourth capacitor C4. The GND pin of the first USB interface is connected to the power supply GND. The VBUS pin of the first USB interface is connected to the VCC pin of the serial port chip U3. The CC1 and CC2 pins of the first USB interface are connected to one end of the eleventh resistor R11 and the twelfth resistor R12. The DP1 and DP2 pins of the first USB interface are connected to the UD+ pin of the serial port chip U3. The DN1 and DN2 pins of the first USB interface are connected to the UD- pin of the serial port chip U3. The GND pin of the serial port chip U3 is connected to the power supply GND. The VCC pin of the serial port chip U3 is connected to one end of the fourth capacitor C4. The V3 pin of the serial port chip U3 is connected to one end of the third capacitor C3. The other ends of the third capacitor C3 and the fourth capacitor C4 are connected to the power supply GND.

[0011] The device of this application includes n (n≥3) signal conditioning units, and the number of signal conditioning units is greater than or equal to the number of output channels of the multi-channel on / off target. Each signal conditioning unit includes a signal isolation input module, an on / off target selection module, a signal processing module, a screen display module, and a communication module. The signal isolation input module, on / off target selection module, signal processing module, and screen display module are connected sequentially. The screen display module is connected to the host computer via a communication module. The isolation input module enables high-speed optical coupling isolation of the output signals from the on / off and on / off targets, preventing signal interference between channels. The on / off target selection module selects either the on / off or on / off target as the output signal. The signal processing module conditions the input signal and outputs a pulse signal with a specified pulse width. The screen display module allows manual selection of the on / off target, selection of time resolution, and display of the time for each channel. The communication module transmits data to the host computer for convenient data acquisition.

[0012] Compared with the prior art, the beneficial effects of this utility model are as follows: This utility model provides a multi-channel timing device based on a disconnect / connect and connect / disconnect target. The device uses a signal isolation module to isolate the output signals of the disconnect / connect and connect / disconnect targets to prevent signal interference between channels. The device allows selection of the connect or disconnect target, working mode, and time resolution via a screen. The measured time is displayed on the screen or sent to a host computer for easy data acquisition. Attached Figure Description

[0013] Figure 1 This is a structural block diagram of a multi-channel timing device based on a disconnect / connect and connect / disconnect target provided in this utility model embodiment; Figure 2The input signal circuit diagram of the multi-channel timing device based on the on / off and on / off targets provided in this utility model embodiment; Figure 3 This utility model provides a circuit diagram for the on / off target selection of a multi-channel timing device based on on / off and on / off targets. Detailed Implementation

[0014] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments: This utility model provides a multi-channel timing device based on open / close and closed / open targets, aiming to solve problems such as signal interference, unstable testing, and inconvenient setup during open / close and closed / open target testing. The specific technical solution is as follows: like Figure 1-3As shown, the multi-channel timing device based on open / closed targets proposed in this application includes a signal conditioning unit. The number of signal conditioning units is greater than or equal to the number of output channels of the multi-channel open / closed targets. Each signal conditioning unit includes a signal isolation input module, an open / closed target selection module, a signal processing module, a screen display module, and a communication module. The output channels of the multi-channel open / closed targets are connected to the signal isolation input module, which is connected to the signal processing module. The signal processing module is connected to the screen display module, which is connected to a host computer via the communication module for data upload. The open / closed target selection module is connected to the signal processing module to select either an open / closed target or a closed / closed target as the output signal. At least three signal conditioning units are provided. The signal isolation input module includes an optocoupler isolation chip U1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first capacitor C1, a first diode D1, a first BNC input interface, a first transistor Q1, and a first LED. The VCC pin of the optocoupler isolation chip U1, one end of the first resistor R1, the third resistor R3, and the fifth resistor R5 are connected to the power supply VCC. The other end of the first resistor R1 is connected to the Anode pin of the optocoupler isolation chip U1. One end of the second resistor R2 is connected to the optocoupler isolation chip... The Cathode pin of U1 is connected to the first BNC positive pin, the first BNC negative pin is connected to the power supply GND, the other end of the first capacitor C1 is connected to the power supply GND, the other end of the third resistor R3 is connected to one end of the fourth resistor R4, the other end of the fourth resistor R4 is connected to the base of the first transistor Q1, the other end of the fifth resistor R5 and one end of the sixth resistor R6 are connected to the collector of the first transistor Q1, the other end of the sixth resistor R6 is connected to the positive pin of the first LED, the negative pin of the first LED is connected to the power supply GND, and the emitter of the first transistor Q1 is connected to the power supply GND. The on / off target selection module includes an analog switch chip U2, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a second LED, and a second capacitor C2. The VCC pin of the analog switch chip U2, one end of the seventh resistor R7, and one end of the second capacitor C2 are connected to the power supply VCC. The other end of the seventh resistor R7 is connected to the B1 pin of the analog switch chip U2. One end of the eighth resistor R8 is connected to the power supply GND, and the other end of the eighth resistor R8 is connected to the B1 pin of the analog switch chip U2. One end of the ninth resistor R9 is connected to the S pin of the analog switch chip U2, and the other end of the second capacitor C2 is connected to the power supply GND. One end of the tenth resistor R10 is connected to the A pin of the analog switch chip U2, and the other end of the tenth resistor R10 is connected to the positive terminal of the second LED. The negative terminal of the second LED is connected to the power supply GND, and the GND pin of the analog switch chip U2 is connected to the power supply GND. The signal processing module includes an FPGA chip.The screen display module includes a display screen, through which the target can be manually selected (either through or through), the time resolution, and the time of each channel can be displayed. The communication module includes a first USB interface, a second diode D2, a serial port chip U3, an eleventh resistor R11, a twelfth resistor R12, a third capacitor C3, and a fourth capacitor C4. The GND pin of the first USB interface is connected to the power supply GND. The VBUS pin of the first USB interface is connected to the VCC pin of the serial port chip U3. The CC1 and CC2 pins of the first USB interface are connected to one end of the eleventh resistor R11 and the twelfth resistor R12. The DP1 and DP2 pins of the first USB interface are connected to the UD+ pin of the serial port chip U3. The DN1 and DN2 pins of the first USB interface are connected to the UD- pin of the serial port chip U3. The GND pin of the serial port chip U3 is connected to the power supply GND. The VCC pin of the serial port chip U3 is connected to one end of the fourth capacitor C4. The V3 pin of the serial port chip U3 is connected to one end of the third capacitor C3. The other ends of the third capacitor C3 and the fourth capacitor C4 are connected to the power supply GND.

[0015] The device of this application includes n (n≥3) signal conditioning units, and the number of signal conditioning units is greater than or equal to the number of output channels of the multi-channel on / off target. Each signal conditioning unit includes a signal isolation input module, an on / off target selection module, a signal processing module, a screen display module, and a communication module. The signal isolation input module, on / off target selection module, signal processing module, and screen display module are connected sequentially. The screen display module is connected to the host computer via a communication module. The isolation input module isolates the output signals of the on / off and on / off targets to prevent signal interference between channels; the on / off target selection module selects either the on / off or on / off target as the output signal; the signal processing module conditions the input signal and outputs a pulse signal with a specified pulse width; the screen display module allows manual selection of the on / off target, selection of time resolution, and display of the time for each channel; and the communication module transmits data to the host computer for convenient data acquisition.

[0016] As a preferred embodiment, the serial port chip has the product model CH340N.

[0017] As a preferred embodiment, the product model of the optocoupler isolation chip is TLP2362.

[0018] As a preferred embodiment, the product model of the FPGA chip is EP4CE10F17C8.

[0019] Preferably, the transistor chip is model S8050. The diode chip is model SMBJ5.0A.

[0020] This utility model provides a multi-channel timing device based on a disconnect / connect and connect / disconnect target. The device uses a signal isolation module to isolate the output signals of the disconnect / connect and connect / disconnect targets to prevent signal interference between channels. The device allows selection of the connect or disconnect target, working mode, and time resolution via a screen. The measured time is displayed on the screen or sent to a host computer for easy data acquisition.

[0021] The above description is merely a preferred embodiment of the present utility model and is not intended to limit the present utility model in any other way. Any modifications or equivalent changes made based on the technical essence of the present utility model shall still fall within the scope of protection claimed by the present utility model.

Claims

1. A multi-channel timing device based on a disconnect / connect and connect / disconnect target, characterized in that, The system includes a signal conditioning unit, the number of which is greater than or equal to the number of output channels of the multi-channel on / off and on / off targets. Each signal conditioning unit includes a signal isolation input module, an on / off target selection module, a signal processing module, a screen display module, and a communication module. The output channels of the multi-channel on / off and on / off targets are connected to the signal isolation input module, which is connected to the signal processing module. The signal processing module is connected to the screen display module, which is connected to the host computer via the communication module to upload data. The on / off target selection module is connected to the signal processing module to select either an on / off target or an on / off target as the output signal.

2. The multi-channel timing device based on a disconnect / connect and connect / disconnect target according to claim 1, characterized in that, At least three signal conditioning units are provided.

3. The multi-channel timing device based on a disconnect / connect and connect / disconnect target according to claim 1, characterized in that, The signal isolation input module includes an optocoupler isolation chip U1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first capacitor C1, a first diode D1, a first BNC input interface, a first transistor Q1, and a first LED. The VCC pin of the optocoupler isolation chip U1, one end of the first resistor R1, the third resistor R3, and the fifth resistor R5 are connected to the power supply VCC. The other end of the first resistor R1 is connected to the Anode pin of the optocoupler isolation chip U1. One end of the second resistor R2 is connected to the optocoupler isolation chip... The Cathode pin of U1 is connected to the first BNC positive pin, the first BNC negative pin is connected to the power supply GND, the other end of the first capacitor C1 is connected to the power supply GND, the other end of the third resistor R3 is connected to one end of the fourth resistor R4, the other end of the fourth resistor R4 is connected to the base of the first transistor Q1, the other end of the fifth resistor R5 and one end of the sixth resistor R6 are connected to the collector of the first transistor Q1, the other end of the sixth resistor R6 is connected to the positive pin of the first LED, the negative pin of the first LED is connected to the power supply GND, and the emitter of the first transistor Q1 is connected to the power supply GND.

4. The multi-channel timing device based on a disconnect / connect and connect / disconnect target according to claim 1, characterized in that, The on / off target selection module includes an analog switch chip U2, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a second LED, and a second capacitor C2. The VCC pin of the analog switch chip U2, one end of the seventh resistor R7, and one end of the second capacitor C2 are connected to the power supply VCC. The other end of the seventh resistor R7 is connected to the B1 pin of the analog switch chip U2. One end of the eighth resistor R8 is connected to the power supply GND, and the other end of the eighth resistor R8 is connected to the B1 pin of the analog switch chip U2. One end of the ninth resistor R9 is connected to the S pin of the analog switch chip U2, and the other end of the second capacitor C2 is connected to the power supply GND. One end of the tenth resistor R10 is connected to the A pin of the analog switch chip U2, and the other end of the tenth resistor R10 is connected to the positive terminal of the second LED. The negative terminal of the second LED is connected to the power supply GND, and the GND pin of the analog switch chip U2 is connected to the power supply GND.

5. The multi-channel timing device based on a disconnect / connect and connect / disconnect target according to claim 1, characterized in that, The signal processing module includes an FPGA chip.

6. The multi-channel timing device based on a disconnect / connect and connect / disconnect target according to claim 1, characterized in that, The screen display module includes a display screen through which the target can be manually selected (either through or through), the time resolution, and the time of each channel can be displayed.

7. The multi-channel timing device based on a disconnect / connect and connect / disconnect target according to claim 1, characterized in that, The communication module includes a first USB interface, a second diode D2, a serial port chip U3, an eleventh resistor R11, a twelfth resistor R12, a third capacitor C3, and a fourth capacitor C4. The GND pin of the first USB interface is connected to the power supply GND. The VBUS pin of the first USB interface is connected to the VCC pin of the serial port chip U3. The CC1 and CC2 pins of the first USB interface are connected to one end of the eleventh resistor R11 and the twelfth resistor R12. The DP1 and DP2 pins of the first USB interface are connected to the UD+ pin of the serial port chip U3. The DN1 and DN2 pins of the first USB interface are connected to the UD- pin of the serial port chip U3. The GND pin of the serial port chip U3 is connected to the power supply GND. The VCC pin of the serial port chip U3 is connected to one end of the fourth capacitor C4. The V3 pin of the serial port chip U3 is connected to one end of the third capacitor C3. The other ends of the third capacitor C3 and the fourth capacitor C4 are connected to the power supply GND.