Serial port switching circuit and serial port switching box

Abstract

The utility model provides a kind of serial port switching circuit and serial port switching box, wherein, serial port switching circuit includes USB interface, TTL interface, RS485 interface, RS232 interface, first conversion circuit, second conversion circuit, third conversion circuit and isolation protection circuit, first conversion circuit converts USB signal into TTL signal, second conversion circuit and third conversion circuit convert TTL signal into RS485 signal and RS232 signal respectively, isolation protection circuit realizes power isolation, and TTL signal transmission is carried out with second conversion circuit or third conversion circuit respectively, improve communication reliability, by setting serial port switching circuit, USB signal can be converted into a variety of serial port signals, and different physical interfaces are matched, when debugging device, without carrying a variety of different types, different physical interface debugging cable, improve debugging efficiency.

Description

Technical Field

[0001] This utility model belongs to the field of serial port conversion technology, and particularly relates to a serial port conversion circuit and a serial port conversion box. Background Technology

[0002] In the fields of substation automation systems and industrial control, serial communication technology (including RS-232, RS-485, etc.) remains an important communication method in equipment-level communication, traditional remote control systems, and relay protection devices due to its simple structure, high reliability, and strong anti-interference capabilities. As the core interface for equipment commissioning and maintenance, the control console interfaces of various intelligent devices commonly adopt serial communication technology to realize functions such as local parameter configuration, firmware upgrades, and operational status monitoring. It is a key channel for maintenance personnel to perform equipment commissioning and maintenance.

[0003] However, existing serial port debugging technologies have the following technical shortcomings in practical implementation: Inconsistent signal level standards: Current industrial equipment primarily uses three serial communication level standards: TTL, RS-232, and RS-485 differential signals. Traditional test cables typically only support a single signal standard, necessitating the carrying of multiple different types of cables during on-site testing. This not only increases the burden on equipment but also significantly reduces testing efficiency.

[0004] Diverse Physical Interface Types: Equipment from different manufacturers uses significantly different physical interface types, including RS232 connectors, RJ45 interfaces, and pin-type interfaces. This inconsistency necessitates that debugging personnel equip themselves with debugging cables featuring various physical interfaces. In actual debugging processes, interface incompatibility frequently occurs, severely hindering the smooth progress of the debugging work. Utility Model Content

[0005] The purpose of this invention is to provide a serial port adapter circuit, which aims to solve the problems of low debugging efficiency and interface mismatch in traditional serial port debugging.

[0006] A first aspect of this utility model provides a serial port adapter circuit, comprising: The USB interface is used to connect to the host computer. A first conversion circuit is connected to the USB interface, and the first conversion circuit is used to convert the USB signal of the USB interface into a first TTL signal and a second TTL signal. A TTL interface is connected to the first end of the first conversion circuit, and is used to connect the first device to be debugged and transmit the first TTL signal. The second conversion circuit is used to convert the second TTL signal into an RS485 signal; The third conversion circuit is used to convert the second TTL signal into an RS232 signal; An isolation protection circuit is provided, wherein a first terminal of the isolation protection circuit is connected to a second terminal of the first conversion circuit, and a second terminal of the isolation protection circuit is connected to a first terminal of the second conversion circuit and a first terminal of the third conversion circuit, respectively. The isolation protection circuit is used to perform power isolation transmission of the second TTL signal, and to transmit the second TTL signal with the second conversion circuit or with the third conversion circuit. An RS485 interface is connected to the second end of the second conversion circuit for connecting the second device to be debugged and transmitting the RS485 signal. The RJ45 interface and RS232 interface are respectively connected to the second end of the third conversion circuit, and are used to connect the third device to be debugged and transmit the RS232 signal.

[0007] Optionally, the isolation protection circuit includes: A digital isolation circuit, wherein a first terminal of the digital isolation circuit is connected to a second terminal of the first conversion circuit, a first transmitting terminal of the digital isolation circuit is connected to a first receiving terminal of the second conversion circuit and a first receiving terminal of the third conversion circuit, and the digital isolation circuit is used to electrically isolate a second TTL signal with a first voltage into a second TTL signal with a second voltage, wherein the first voltage of the digital isolation circuit is greater than the second voltage; A power isolation circuit, connected to both the USB interface and the digital isolation circuit, is used to convert the power supply voltage of the USB interface into the second voltage. The isolation protection circuit also includes: The logic circuit has a first receiving end connected to the first transmitting end of the second conversion circuit, a second receiving end connected to the first transmitting end of the third conversion circuit, and a transmitting end connected to the first receiving end of the digital isolation circuit. The logic circuit is used to perform an AND operation on the level of the first transmitting end of the second conversion circuit and the level of the first transmitting end of the third conversion circuit, and output the calculated level signal to the digital isolation circuit. When the second conversion circuit and the third conversion circuit are not working, the first transmitting terminal of the second conversion circuit and the first transmitting terminal of the third conversion circuit are set to high level.

[0008] Optionally, the digital isolation circuit includes a digital isolator, a first resistor, a second resistor, and a third resistor; The second transmitting end and the second receiving end of the digital isolator are respectively connected to the second end of the first conversion circuit. The first transmitting end of the digital isolator, the first end of the first resistor, and the first end of the second resistor are connected. The first end of the first resistor is connected to the first receiving end of the second conversion circuit. The first end of the first resistor is connected to the first receiving end of the third conversion circuit. The first receiving end of the digital isolator is connected to the first end of the third resistor. The second end of the third resistor is connected to the transmitting end of the logic circuit. The first power supply end of the digital isolator is connected to the output end of the power isolation circuit.

[0009] Optionally, the power isolation circuit includes a power isolation chip, a fourth resistor, a first capacitor, and a second capacitor. The positive voltage input terminal of the power isolation chip, the first terminal of the first capacitor, and the power terminal of the USB interface are connected. The negative voltage input terminal of the power isolation chip, the second terminal of the first capacitor, and the first ground terminal are connected. The positive voltage output terminal of the power isolation chip, the first terminal of the second capacitor, and the first terminal of the fourth resistor are connected to form the power output terminal of the power isolation circuit. The negative voltage output terminal of the power isolation chip, the second terminal of the second capacitor, the second terminal of the fourth resistor, and the second ground terminal are connected.

[0010] Optionally, the logic circuit includes an AND gate, a fifth resistor, and a sixth resistor; The power supply terminal of the AND gate is connected to the power output terminal of the power isolation circuit. The first input terminal of the AND gate is connected to the first terminal of the fifth resistor. The second input terminal of the AND gate is connected to the first terminal of the sixth resistor. The output terminal of the AND gate is connected to the first receiving terminal of the digital isolation circuit. The second terminal of the fifth resistor is connected to the first transmitting terminal of the second conversion circuit. The second terminal of the sixth resistor is connected to the first transmitting terminal of the third conversion circuit.

[0011] Optionally, the first conversion circuit includes a first conversion chip, a seventh resistor, an eighth resistor, a ninth resistor, and a tenth resistor; The first signal terminal and the second signal terminal of the first conversion chip are respectively connected to the DP terminal and the DN terminal of the USB interface. The first transmitting terminal and the first receiving terminal of the first conversion chip are respectively connected to the TTL interface through the seventh resistor and the eighth resistor. The second transmitting terminal of the first conversion chip is connected to the second receiving terminal of the digital isolation circuit through the ninth resistor. The second receiving terminal of the first conversion chip is connected to the second transmitting terminal of the digital isolation circuit through the tenth resistor.

[0012] Optionally, the second conversion circuit includes a second conversion chip, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a first transient diode, and a second transient diode; The first transmitting end of the second conversion chip is connected to the first receiving end of the logic circuit, the first receiving end of the second conversion chip is connected to the first transmitting end of the digital isolation circuit, the first signal end of the second conversion chip, the first end of the eleventh resistor, the first end of the twelfth resistor, the first end of the first transient diode, and the first port of the RS485 interface are connected, the second signal end of the second conversion chip, the second end of the eleventh resistor, the first end of the thirteenth resistor, the first end of the second transient diode, and the second port of the RS485 interface are connected, the first end of the twelfth resistor is connected to the power output end of the power isolation circuit, and the second end of the thirteenth resistor, the second end of the first transient diode, and the second end of the second transient diode are connected to the second ground end.

[0013] Optionally, the third conversion circuit includes a third conversion chip, a fourteenth resistor, a fifteenth resistor, a third transient diode, and a fourth transient diode; The first transmitting end of the third conversion chip is connected to the second receiving end of the logic circuit. The first receiving end of the third conversion chip is connected to the first transmitting end of the digital isolation circuit. The second transmitting end of the third conversion chip is connected to the first end of the fourteenth resistor. The second end of the fourteenth resistor, the first end of the third transient diode, and the first port of the RS232 interface are connected. The second receiving end of the third conversion chip is connected to the first end of the fifteenth resistor. The second end of the fifteenth resistor, the first end of the fourth transient diode, and the second port of the RS232 interface are connected. The second ends of the third transient diode and the second ends of the fourth transient diode are connected to the second ground terminal.

[0014] Optionally, the RJ45 interface includes: The first RJ45 interface is used to connect a network security monitoring device; The second RJ45 interface is used to connect to the network switch; The second RJ45 interface includes a network cable input interface and a network cable output interface connected together. The network cable input interface is used to connect to the network switch via a network cable, and the network cable output interface is used to connect to the host computer via a network cable.

[0015] A second aspect of this utility model provides a serial port adapter box, including the serial port adapter circuit described above.

[0016] The beneficial effects of this utility model embodiment compared with the prior art are as follows: The above-mentioned serial port conversion circuit includes a USB interface, a TTL interface, an RS485 interface, an RS232 interface, a first conversion circuit, a second conversion circuit, a third conversion circuit, and an isolation protection circuit. The first conversion circuit converts the USB signal into a TTL signal, while the second and third conversion circuits convert the TTL signal into an RS485 signal and an RS232 signal, respectively. The isolation protection circuit achieves power isolation and transmits TTL signals with either the second or third conversion circuit. By setting up the serial port conversion circuit, the conversion of USB signals to various serial port signals can be realized, and different physical interfaces can be matched. When debugging equipment, it is not necessary to carry multiple debugging cables of different types and different physical interfaces, which improves debugging efficiency. Attached Figure Description

[0017] Figure 1 A schematic diagram of the first structure of the serial port adapter circuit provided in this embodiment of the utility model; Figure 2 A schematic diagram of a second structure of the serial port adapter circuit provided in an embodiment of this utility model; Figure 3 A circuit diagram of the RJ45 interface provided for an embodiment of this utility model; Figure 4 A schematic diagram of a third structure of the serial port adapter circuit provided in an embodiment of this utility model; Figure 5 A circuit diagram of the digital isolation circuit and logic circuit provided for embodiments of this utility model; Figure 6 A circuit diagram of the power isolation circuit provided in an embodiment of this utility model; Figure 7 A circuit diagram of the first conversion circuit provided in an embodiment of this utility model; Figure 8 A circuit diagram of the second conversion circuit provided in an embodiment of this utility model; Figure 9 A circuit diagram of the third conversion circuit provided in an embodiment of this utility model; Figure 10 This is a schematic diagram of the fourth structure of the serial port adapter circuit provided in this embodiment of the utility model. Detailed Implementation

[0018] To make the technical problems, technical solutions, and beneficial effects of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present utility model and are not intended to limit the present utility model.

[0019] The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this utility model, "a plurality of" means two or more, unless otherwise explicitly specified.

[0020] The first aspect of this utility model embodiment provides a serial port adapter circuit 100.

[0021] like Figure 1 As shown, in this embodiment, the serial port adapter circuit 100 includes: USB interface 10 is used to connect to the host computer; The first conversion circuit 20 is connected to the USB interface 10 and is used to convert the USB signal of the USB interface 10 into a first TTL signal and a second TTL signal. TTL interface 30 is connected to the first end of the first conversion circuit 20 and is used to connect the first device to be debugged and transmit the first TTL signal. The second conversion circuit 50 is used to convert the second TTL signal into an RS485 signal; The third conversion circuit 70 is used to convert the second TTL signal into an RS232 signal; The isolation protection circuit 40 has its first terminal connected to the second terminal of the first conversion circuit 20, and its second terminal connected to the first terminal of the second conversion circuit 50 and the first terminal of the third conversion circuit 70, respectively. The isolation protection circuit 40 is used to perform power isolation transmission of the second TTL signal, and to transmit the second TTL signal with the second conversion circuit 50 or with the third conversion circuit 70. RS485 interface 60 is connected to the second end of the second conversion circuit 50 and is used to connect the second device to be debugged and transmit RS485 signals. The RJ45 interface 90 and the RS232 interface 80 are respectively connected to the second end of the third conversion circuit 70, and are used to connect the third device to be debugged to transmit RS232 signals.

[0022] In this embodiment, the USB interface 10 can be connected to a host computer such as a laptop or computer to achieve high-speed data transmission. The USB signal transmitted by the USB interface 10 can be transmitted to the first conversion circuit 20, where the USB signal is converted to a TTL signal, and dual TTL signals are output. One of the signals is transmitted to the TTL interface 30, and the other is transmitted to the isolation protection circuit 40. The TTL signal level is usually 0V (low level) and 3.3V or 5V (high level). TTL signals are suitable for short-distance communication. The TTL interface 30 can be connected to a first device under test that has a corresponding TTL interface 30. The host computer can perform data debugging on the first device under test through the USB interface 10, the first conversion circuit 20, and the TTL interface 30. The first device under test determines the value of each data bit by judging the level of the TTL signal.

[0023] The isolation protection circuit 40 provides high-voltage electrical isolation for the TTL signal, such as 3.75kV electrical isolation, and provides a low-voltage isolation voltage on the output side, converting the high-voltage signal to a low-voltage signal. The TTL signal is transmitted through the isolation protection circuit 40 to the second conversion circuit 50 and the third conversion circuit 70 respectively. The second conversion circuit 50 converts the TTL signal to an RS485 signal, converting the isolated second TTL signal to an RS485 signal. The RS485 signal is a differential signal, using two data lines to transmit the signal, and supports half-duplex and full-duplex communication. In half-duplex communication, data transmission and reception alternate. In full-duplex communication, data transmission and reception can occur simultaneously. Through differential signal transmission, it has better anti-interference capability and longer transmission distance. The RS485 signal is transmitted to the RS485 interface 60, which has two corresponding pin terminals. The RS485 interface 60 can be connected to a second device under test with a matching interface. The host computer can perform data debugging on the second device under test through the USB interface 10, the first conversion circuit 20, the isolation protection circuit 40, the second conversion circuit 50, and the RS485 interface 60.

[0024] The third conversion circuit 70 converts the TTL signal to the RS232 signal, converting the isolated second TTL signal into an RS232 signal. The RS232 signal is a single-ended signal with a voltage range of ±12V. The RS232 signal supports full-duplex operation, allowing simultaneous data transmission and reception. The RS232 signal can be transmitted to the RS232 interface 80 and the RJ45 interface 90, respectively. The RS232 interface 80 can be connected to a third device under test with a matching interface. The host computer can perform data debugging on the third device under test through the USB interface 10, the first conversion circuit 20, the isolation protection circuit 40, the third conversion circuit 70, and the RS232 interface 80. The RS232 interface 80 can use a DB9 or DB25 connector.

[0025] The RJ45 interface 90 can be a dedicated interface for network security, a dedicated interface for network switches, etc. The third device to be debugged can be a network security monitoring device, a network switch, etc. The dedicated interface for network security can be connected to the network security monitoring device, and the dedicated interface for network switches can be connected to the network switch. The host computer can perform data debugging on the network switch and the network security monitoring device through the USB interface 10, the first conversion circuit 20, the isolation protection circuit 40, the third conversion circuit 70, and the RJ45 interface 90, and realize functions such as local parameter setting, firmware upgrade, and operation status monitoring.

[0026] In an alternative embodiment, such as Figure 2 and Figure 3 As shown, the RJ45 interface 90 includes: The first RJ45 interface 91 is used to connect the network security monitoring device 200; The second RJ45 interface 92 is used to connect to the network switch 300; The second RJ45 interface 92 includes a network cable input interface RP2 and a network cable output interface RP1 connected to each other. The network cable input interface RP2 is used to connect to the network switch 300 via a network cable, and the network cable output interface RP1 is used to connect to the host computer via a network cable.

[0027] In this embodiment, the first RJ45 interface 91 serves as a dedicated network security interface for connecting the network security monitoring device 200, and the second RJ45 interface 92 serves as a dedicated interface for connecting the network switch 300. The host computer can perform data debugging on the network security monitoring device 200 through the USB interface 10, the first conversion circuit 20, the isolation protection circuit 40, the third conversion circuit 70, and the first RJ45 interface 91, or the host computer can perform data debugging on the network switch 300 through the USB interface 10, the first conversion circuit 20, the isolation protection circuit 40, the third conversion circuit 70, and the second RJ45 interface 92.

[0028] Among them, the second RJ45 interface 92 adopts a one-to-two structure, such as Figure 3 As shown, the network cable input interface RP2 is used to connect to the network port debugging port of the network switch 300, and the network cable output port RP1 is used to connect to the serial port debugging port of the network switch 300. The network cable input interface RP2 is connected to the network cable output interface RP1. During operation, the network cable input interface RP2 is connected to the network port debugging port of the network switch 300 via a network cable, and the USB interface 10 is connected to the host computer. The host computer configures the network page of the network switch 300. Simultaneously, the network cable output interface RP1 is connected to the serial port debugging port of the network switch 300 via a network cable and prints debugging logs in real time. The second RJ45 interface 92 adopts a one-to-two structure, which can replace the one-to-two adapter cable, simplifying the wiring structure.

[0029] During equipment debugging, the serial port adapter circuit 100 enables individual device debugging. At the same time, one of the first debugging device, the second debugging device, and the third debugging device can be connected or plugged into the corresponding interface. The USB interface 10 connects to the host computer. The host computer can perform data debugging on the first debugging device through the USB interface 10, the first conversion circuit 20, and the TTL interface 30. Alternatively, the host computer can perform data debugging on the second debugging device through the USB interface 10, the first conversion circuit 20, the isolation protection circuit 40, the second conversion circuit 50, and the RS485 interface 60. Or, the host computer can perform data debugging on the third debugging device through the USB interface 10, the first conversion circuit 20, the isolation protection circuit 40, the third conversion circuit 70, and the RS232 interface 80.

[0030] The USB interface 10 may adopt a Type-C interface, a Type-B interface, or other interfaces. In an optional embodiment, the USB interface 10 adopts a Type-C interface.

[0031] The isolation protection circuit 40 can be a corresponding isolation circuit, protection circuit, etc. In an optional embodiment, such as Figure 4 As shown, the isolation protection circuit 40 includes: Digital isolation circuit 41, the first end of digital isolation circuit 41 is connected to the second end of first conversion circuit 20, the first transmitting end of digital isolation circuit 41 is connected to the first receiving end of second conversion circuit 50 and the first receiving end of third conversion circuit 70 respectively, digital isolation circuit 41 is used to electrically isolate the second TTL signal of the first voltage into the second TTL signal of the second voltage X1VDD, the first voltage of digital isolation circuit 41 is greater than the second voltage X1VDD; The power isolation circuit 42 is connected to the USB interface 10 and the digital isolation circuit 41 respectively, and is used to convert the power supply voltage VDD of the USB interface 10 into a second voltage X1VDD.

[0032] When the second conversion circuit 50 and the third conversion circuit 70 are not working, the first transmitting terminal of the second conversion circuit 50 and the first transmitting terminal of the third conversion circuit 70 are set to high level.

[0033] In this embodiment, the USB interface 10, the first conversion circuit 20, the TTL interface 30, the digital isolation circuit 41, the second conversion circuit 50, the third conversion circuit 70, the RS485 interface 60, the RS232 interface 80, and the RJ45 interface 90 all use serial two-wire transmission. The USB interface 10 typically includes a DP terminal, a DN terminal, a power terminal, and a ground terminal. When connected to debugging equipment such as a host computer, the power terminal can input the supply voltage VDD. The positive differential port and the negative differential port are used to send and receive USB signals. The first transmitting end and the first receiving end of the first conversion circuit 20 are respectively connected to the TTL interface 30 and used to transmit the first TTL signal. The second transmitting end and the second receiving end of the first conversion circuit 20... The first transmitting end of the digital isolation circuit 41 is connected to the second transmitting end and the second receiving end of the second conversion circuit 50 and the first receiving end of the third conversion circuit 70, respectively. The first receiving end of the digital isolation circuit 41 is connected to the transmitting end of the logic circuit 43. The first receiving end and the second receiving end of the logic circuit 43 are connected to the first transmitting end of the second conversion circuit 50 and the third transmitting end of the third conversion circuit 70, respectively. The second transmitting end and the second receiving end of the second conversion circuit 50 are connected to the RS485 interface 60, respectively. The second transmitting end and the second receiving end of the third conversion circuit 70 are connected to the RS232 interface 80 and the RJ45 interface 90, respectively.

[0034] Digital isolation circuit 41 is used to achieve high-voltage isolation of the second TTL signal, converting the high-voltage first voltage second TTL signal into a low-voltage second voltage X1VDD second TTL signal. Power isolation circuit 42 provides the independent power supply second voltage X1VDD to the isolation side of digital isolation circuit 41 to avoid common-mode noise coupling through the power supply. The isolation side of digital isolation circuit 41 transmits the second TTL signal to the second conversion circuit 50 and the third conversion circuit 70 to achieve power isolation.

[0035] Meanwhile, since RS485 and RS232 signals need to transmit and receive data when they are in half-duplex or full-duplex mode, when the second conversion circuit 50 and the third conversion circuit 70 are directly connected to the digital isolation circuit 41 and transmit the second TTL signal, the first transmitting end of the digital isolation circuit 41 is connected to the first receiving end of the second conversion circuit 50 and the first receiving end of the third conversion circuit 70, respectively, and the first receiving end of the digital isolation circuit 41 is connected to the first transmitting end of the second conversion circuit 50 and the first transmitting end of the third conversion circuit 70, respectively.

[0036] When the second conversion circuit 50 and the third conversion circuit 70 are not in operation and are in an idle state, that is, when the second conversion circuit 50 and the third conversion circuit 70 are not connected to the device to be debugged through the corresponding interface, the first transmitting end of the second conversion circuit 50 and the first transmitting end of the second conversion circuit 70 are both kept at a high level, the first receiving end of the digital isolation circuit 41 is at a high level, and the first receiving end of the digital isolation circuit 41 is active low. At this time, no data transmission is performed. When debugging of the device to be debugged is selected, one of the conversion circuits of the second conversion circuit 50 and the third conversion circuit 70 is connected to the corresponding device to be debugged through the corresponding interface. Since the first receiving end of the digital isolation circuit 41 is connected to both the first transmitting end of the second conversion circuit 50 and the first transmitting end of the third conversion circuit 70, when one conversion circuit sends data, the first transmitting end of the other conversion circuit is at a high level, causing the first receiving end of the digital isolation circuit 41 to still be at a high level, resulting in data transmission failure and inability to debug the connected device to be debugged.

[0037] To address this issue, in an optional embodiment, the isolation protection circuit 40 further includes: The logic circuit 43 has a first receiving end connected to the first transmitting end of the second conversion circuit 50, a second receiving end connected to the first transmitting end of the third conversion circuit 70, and a transmitting end connected to the first receiving end of the digital isolation circuit 41. The logic circuit 43 is used to perform an AND operation on the level of the first transmitting end of the second conversion circuit 50 and the level of the first transmitting end of the third conversion circuit 70, and output the calculated level signal to the digital isolation circuit 41.

[0038] When debugging the device to be debugged, one of the second conversion circuit 50 and the third conversion circuit 70 is connected to the corresponding device to be debugged through the corresponding interface. For example, the second conversion circuit 50 is connected to the second device to be debugged through the RS485 interface 60, while the RS232 interface 80 or the RJ45 interface 90 is not connected to the third device to be debugged. At this time, the first transmitting end of the second conversion circuit 50 switches from high level to low level, while the first transmitting end of the third conversion circuit 70 remains at high level. The low level of the first transmitting end of the second conversion circuit 50 and the high level of the first transmitting end of the third conversion circuit 70 are ANDed by the logic circuit 43, and the low-level data is output to the digital isolation circuit 41, which is not affected by the high level of the first transmitting end of the other conversion circuit when it is idle. The digital isolation circuit 41 transmits the received second TTL signal data to the first conversion circuit 20, and then transmits it to the host computer through the first conversion circuit 20 and the USB interface 10, realizing the data transmission and reception between the corresponding device to be debugged and the debugging device, and performing data debugging to improve the reliability of data transmission.

[0039] The digital isolation circuit 41 can employ corresponding isolation chips, isolators, etc.; the logic circuit 43 can employ corresponding logic gates, etc.; and the power isolation circuit 42 can employ corresponding power isolation chips U3, converters, etc. In an optional embodiment, such as... Figure 5 and Figure 6 As shown, the digital isolation circuit 41 includes a digital isolator U1, a first resistor R1, a second resistor R2, and a third resistor R3; The second transmitting terminal OUTA and the second receiving terminal INB of the digital isolator U1 are respectively connected to the second terminal of the first conversion circuit 20. The first transmitting terminal OUTB of the digital isolator U1 is connected to the first terminal of the first resistor R1 and the first terminal of the second resistor R2. The first terminal of the first resistor R1 is connected to the first receiving terminal of the second conversion circuit 50. The first terminal of the first resistor R1 is connected to the first receiving terminal of the third conversion circuit 70. The first receiving terminal INA of the digital isolator U1 is connected to the first terminal of the third resistor R3. The second terminal of the third resistor R3 is connected to the transmitting terminal of the logic circuit 43. The first power supply terminal of the digital isolator U1 is connected to the output terminal of the power isolation circuit 42.

[0040] The power isolation circuit 42 includes a power isolation chip U3, a fourth resistor R4, a first capacitor C1, and a second capacitor C2. The positive voltage input terminal of the power isolation chip U3, the first terminal of the first capacitor C1, and the power supply terminal of the USB interface 10 are connected. The negative voltage input terminal of the power isolation chip U3, the second terminal of the first capacitor C1, and the first ground terminal GND are connected. The positive voltage output terminal of the power isolation chip U3, the first terminal of the second capacitor C2, and the first terminal of the fourth resistor R4 are connected to form the power output terminal of the power isolation circuit 42. The negative voltage output terminal of the power isolation chip U3, the second terminal of the second capacitor C2, the second terminal of the fourth resistor R4, and the second ground terminal X1GND are connected.

[0041] Logic circuit 43 includes AND gate U2, fifth resistor R5 and sixth resistor R6; The power supply terminal of AND gate U2 is connected to the power output terminal of power isolation circuit 42. The first input terminal A of AND gate U2 is connected to the first terminal of the fifth resistor R5. The second input terminal B of AND gate U2 is connected to the first terminal of the sixth resistor R6. The output terminal Y of AND gate U2 is connected to the first receiving terminal of digital isolation circuit 41. The second terminal of the fifth resistor R5 is connected to the first transmitting terminal of the second conversion circuit 50. The second terminal of the sixth resistor R6 is connected to the first transmitting terminal of the third conversion circuit 70.

[0042] In this embodiment, the power isolation circuit 42 is connected to the positive voltage input terminal of the USB interface 10 and inputs the power supply voltage VDD. The power isolation circuit 42 converts the power supply voltage VDD into a second voltage X1VDD and provides it to the isolation side of the digital isolator U1. The second transmitting terminal and the second receiving terminal of the first conversion circuit 20 are respectively connected to the second receiving terminal INB and the second transmitting terminal OUTA of the digital isolator U1, and realize the data transmission and reception of the second TTL signal.

[0043] Digital isolator U1 provides high-voltage signal isolation and converts the second TTL signal into a second TTL signal with a second voltage X1VDD. The first transmitting terminal OUTB of digital isolator U1 is connected to the first receiving terminal and the second receiving terminal of the second conversion circuit 50 through the first resistor R1 and the second resistor R2, respectively. It also sends the data of the second TTL signal after power isolation to the second conversion circuit 50 and the third conversion circuit 70 through the first resistor R1 and the second resistor R2. At the same time, the first receiving terminal INA of digital isolator U1 is connected to the output terminal of AND gate U2 through the third resistor R3.

[0044] The first input terminal A of AND gate U2 is connected to the first transmitting terminal of the second conversion circuit 50 through the fifth resistor R5, and the second input terminal B of AND gate U2 is connected to the first transmitting terminal of the third conversion circuit 70 through the sixth resistor R6. When debugging the device to be debugged is selected, one of the conversion circuits of the second conversion circuit 50 and the third conversion circuit 70 is connected to the corresponding device to be debugged through the corresponding interface, while the other conversion circuit is not connected to the device to be debugged through the corresponding interface. At this time, one of the first transmitting terminals of the second conversion circuit 50 and the third conversion circuit 70 is at a high level and the other is at a low level. After the two level signals are ANDed through AND gate U2, the low-level data is output to the digital isolation circuit 41, which is not affected by the high level of the first transmitting terminal of the other conversion circuit when it is idle. The digital isolator U1 transmits the data of the received second TTL signal to the first conversion circuit 20, and then transmits it to the host computer through the first conversion circuit 20 and the USB interface 10, realizing the data transmission and reception between the corresponding device to be debugged and the debugging device, and performing data debugging to improve the reliability of data transmission.

[0045] The power isolation circuit 42 is also equipped with a first capacitor C1 and a second capacitor C2 for filtering. The power supply terminals of the digital isolator U1 and the AND gate U2 can also be equipped with corresponding filtering capacitors. Through the filtering capacitors, the voltage signal can be filtered to reduce voltage interference.

[0046] The first conversion circuit 20, the second conversion circuit 50, and the third conversion circuit 70 can employ corresponding conversion chips and peripheral auxiliary components. In an optional embodiment, such as... Figure 7As shown, the first conversion circuit 20 includes a first conversion chip U4, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, and a tenth resistor R10. The first signal terminal UD+ and the second signal terminal UD- of the first conversion chip U4 are connected to the DP terminal and the DN terminal of the USB interface 10, respectively. The first transmitting terminal TXD0 and the first receiving terminal RXD0 of the first conversion chip U4 are connected to the TTL interface 30 through the seventh resistor R7 and the eighth resistor R8, respectively. The second transmitting terminal TXD1 of the first conversion chip U4 is connected to the second receiving terminal of the digital isolation circuit 41 through the ninth resistor R9. The second receiving terminal RXD1 of the first conversion chip U4 is connected to the second transmitting terminal of the digital isolation circuit 41 through the tenth resistor R10.

[0047] In this embodiment, the first conversion chip U4 converts the USB signals received by the first signal terminal UD+ and the second signal terminal UD- into two TTL signals. The first TTL signal is transmitted to the TTL interface 30 via the seventh resistor R7 and the second resistor R2. The second TTL signal is transmitted to the second receiving end and the second transmitting end of the digital isolation circuit 41 via the ninth resistor R9 and the tenth resistor R10.

[0048] The first conversion chip U4 is also equipped with a corresponding power supply terminal, which can be connected to the corresponding operating voltage VIO and a corresponding filter capacitor. The first conversion chip U4 can also be equipped with a corresponding reset terminal, which is connected to the corresponding reset resistor R16 and resets the chip when a reset voltage is input.

[0049] like Figure 8 As shown, in an optional embodiment, the second conversion circuit 50 includes a second conversion chip U5, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a first transient diode TVS1, and a second transient diode TVS2. The first transmitting terminal RO of the second conversion chip U5 is connected to the first receiving terminal of the logic circuit 43. The first receiving terminal DI of the second conversion chip U5 is connected to the first transmitting terminal of the digital isolation circuit 41. The first signal terminal A of the second conversion chip U5, the first terminal of the eleventh resistor R11, the first terminal of the twelfth resistor R12, the first terminal of the first transient diode TVS1, and the first port of the RS485 interface 60 are connected. The second signal terminal B of the second conversion chip U5, the second terminal of the eleventh resistor R11, the first terminal of the thirteenth resistor R13, the first terminal of the second transient diode TVS2, and the second port of the RS485 interface 60 are connected. The first terminal of the twelfth resistor R12 is connected to the power output terminal of the power isolation circuit 42. The second terminal of the thirteenth resistor R13, the second terminal of the first transient diode TVS1, and the second terminal of the second transient diode TVS2 are connected to the second ground terminal X1GND.

[0050] In this embodiment, the second conversion chip U5 receives the isolated second TTL signal through the first transmitting terminal RO and the first receiving terminal DI, and converts it into an RS485 signal. The RS485 signal is transmitted to the RS485 interface 60 through the first signal terminal A and the second signal terminal B of the second conversion chip U5. At the same time, an eleventh resistor R11 is also provided between the first signal terminal A and the second signal terminal B of the second conversion chip U5. The eleventh resistor R11 serves as a terminating resistor and is used to coordinate with the twelfth resistor R12 and the thirteenth resistor R13 to distribute the voltage between the first signal terminal A and the second signal terminal B of the second conversion chip U5. In addition, the first signal terminal A and the second signal terminal B of the second conversion chip U5 are also connected to the first transient diode TVS1 and the second transient diode TVS2, respectively, for surge protection.

[0051] In an alternative embodiment, such as Figure 9 As shown, the third conversion circuit 70 includes a third conversion chip U6, a fourteenth resistor R14, a fifteenth resistor R15, a third transient diode TVS3, and a fourth transient diode TVS4; The first transmitting terminal R1OUT of the third conversion chip U6 is connected to the second receiving terminal of the logic circuit 43. The first receiving terminal T1IN of the third conversion chip U6 is connected to the first transmitting terminal of the digital isolation circuit 41. The second transmitting terminal T1OUT of the third conversion chip U6 is connected to the first end of the fourteenth resistor R14. The second end of the fourteenth resistor R14, the first end of the third transient diode TVS3, and the first port of the RS232 interface 80 are connected. The second receiving terminal R1IN of the third conversion chip U6 is connected to the first end of the fifteenth resistor R15. The second end of the fifteenth resistor R15, the first end of the fourth transient diode TVS4, and the second port of the RS232 interface 80 are connected. The second ends of the third transient diode TVS3 and the second ends of the fourth transient diode TVS4 are connected to the second ground terminal X1GND.

[0052] In this embodiment, the first transmitting end R1OUT and the first receiving end T1IN of the third conversion chip U6 receive the isolated second TTL signal and convert it into an RS232 signal. The second transmitting end T1OUT and the second receiving end R1IN of the third conversion chip U6 transmit the RS232 signal to the RS232 interface 80 through the fourteenth resistor R14 and the fifteenth resistor R15. At the same time, the second transmitting end T1OUT and the second receiving end R1IN of the third conversion chip U6 are also connected to the third transient diode TVS3 and the fourth transient diode TVS4, respectively, for surge protection.

[0053] Furthermore, in order to power the corresponding module of the serial port adapter circuit 100, in an optional embodiment, such as... Figure 10As shown, the serial port adapter circuit 100 also includes: The power conversion circuit 110 is connected to the USB interface 10 and is used to convert the power supply voltage VDD of the USB interface 10 into the operating voltage VIO.

[0054] The power conversion circuit 110 can be a three-terminal regulator, a switching power supply circuit, etc. It can convert the power supply voltage VDD transmitted by the USB interface 10 into the working voltage VIO and provide it to the corresponding module in the serial port conversion circuit 100, such as transmitting the working voltage VIO to the isolation front end of the digital isolator U1, or transmitting the working voltage VIO to the first conversion chip U4, etc.

[0055] The power supply terminals of the second conversion chip U5 and the third conversion chip U6 are respectively connected to the power output terminal of the power isolation circuit 42 and receive the second voltage X1VDD as the working voltage VIO. The ground terminals of the second conversion chip U5 and the third conversion chip U6 are respectively connected to the second ground terminal X1GND, thereby achieving ground isolation and power isolation with the first ground terminal GND of the digital isolation circuit 41.

[0056] The beneficial effects of this utility model embodiment compared with the prior art are as follows: The serial port conversion circuit 100 includes a USB interface 10, a TTL interface 30, an RS485 interface 60, an RS232 interface 80, an RJ45 interface 90, a first conversion circuit 20, a second conversion circuit 50, a third conversion circuit 70, and an isolation protection circuit 40. The first conversion circuit 20 converts the USB signal into a TTL signal, while the second conversion circuit 50 and the third conversion circuit 70 convert the TTL signal into an RS485 signal and an RS232 signal, respectively. The isolation protection circuit 40 achieves power isolation and transmits TTL signals with either the second conversion circuit 50 or the third conversion circuit 70. By setting the serial port conversion circuit 100, the conversion of USB signals to various serial port signals can be realized, and different physical interfaces can be matched. When debugging equipment, it is not necessary to carry multiple debugging cables of different types and different physical interfaces, which improves debugging efficiency.

[0057] The second aspect of this utility model provides a serial port adapter box, which includes a serial port adapter circuit 100. The specific structure of the serial port adapter circuit 100 is as described in the above embodiments. Since this serial port adapter box adopts all the technical solutions of all the above embodiments, it has at least all the beneficial effects brought about by the technical solutions of the above embodiments, which will not be described in detail here.

[0058] The serial port adapter box also includes a housing. The surface of the housing has openings for accommodating and installing a USB interface 10, a TTL interface 30, an RS485 interface 60, an RS232 interface 80, and an RJ45 interface 90. Inside the housing is a circuit board for installing the aforementioned first conversion circuit 20, second conversion circuit 50, third conversion circuit 70, isolation protection circuit 40, and power conversion circuit 110. The corresponding circuits are connected to the matching interfaces via connecting wires. Additionally, corresponding indicator lights can be installed on the housing. The indicator lights are connected to the corresponding circuits on the circuit board and can be used to indicate the current connection status, communication status, and power status of the serial port adapter box.

[0059] The above-described embodiments are only used to illustrate the technical solutions of this utility model, and are not intended to limit it. Although this utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this utility model, and should all be included within the protection scope of this utility model.

Claims

1. A serial port adapter circuit, characterized in that, include: The USB interface is used to connect to the host computer. A first conversion circuit is connected to the USB interface, and the first conversion circuit is used to convert the USB signal of the USB interface into a first TTL signal and a second TTL signal. A TTL interface is connected to the first end of the first conversion circuit, and is used to connect the first device to be debugged and transmit the first TTL signal. The second conversion circuit is used to convert the second TTL signal into an RS485 signal; The third conversion circuit is used to convert the second TTL signal into an RS232 signal; An isolation protection circuit is provided, wherein a first terminal of the isolation protection circuit is connected to a second terminal of the first conversion circuit, and a second terminal of the isolation protection circuit is connected to a first terminal of the second conversion circuit and a first terminal of the third conversion circuit, respectively. The isolation protection circuit is used to perform power isolation transmission of the second TTL signal, and to transmit the second TTL signal with the second conversion circuit or with the third conversion circuit. An RS485 interface is connected to the second end of the second conversion circuit for connecting the second device to be debugged and transmitting the RS485 signal. The RJ45 interface and RS232 interface are respectively connected to the second end of the third conversion circuit, and are used to connect the third device to be debugged and transmit the RS232 signal.

2. The serial port adapter circuit as described in claim 1, characterized in that, The isolation protection circuit includes: A digital isolation circuit, wherein a first terminal of the digital isolation circuit is connected to a second terminal of the first conversion circuit, a first transmitting terminal of the digital isolation circuit is connected to a first receiving terminal of the second conversion circuit and a first receiving terminal of the third conversion circuit, and the digital isolation circuit is used to electrically isolate a second TTL signal with a first voltage into a second TTL signal with a second voltage, wherein the first voltage of the digital isolation circuit is greater than the second voltage; A power isolation circuit, connected to both the USB interface and the digital isolation circuit, is used to convert the power supply voltage of the USB interface into the second voltage. The isolation protection circuit also includes: A logic circuit, wherein the first receiving end of the logic circuit is connected to the first transmitting end of the second conversion circuit, the second receiving end of the logic circuit is connected to the first transmitting end of the third conversion circuit, and the transmitting end of the logic circuit is connected to the first receiving end of the digital isolation circuit. The logic circuit is used to perform an AND operation on the level of the first transmitting end of the second conversion circuit and the level of the first transmitting end of the third conversion circuit, and output the calculated level signal to the digital isolation circuit. When the second conversion circuit and the third conversion circuit are not working, the first transmitting terminal of the second conversion circuit and the first transmitting terminal of the third conversion circuit are set to high level.

3. The serial port adapter circuit as described in claim 2, characterized in that, The digital isolation circuit includes a digital isolator, a first resistor, a second resistor, and a third resistor; The second transmitting end and the second receiving end of the digital isolator are respectively connected to the second end of the first conversion circuit. The first transmitting end of the digital isolator, the first end of the first resistor, and the first end of the second resistor are connected. The first end of the first resistor is connected to the first receiving end of the second conversion circuit. The first end of the first resistor is connected to the first receiving end of the third conversion circuit. The first receiving end of the digital isolator is connected to the first end of the third resistor. The second end of the third resistor is connected to the transmitting end of the logic circuit. The first power supply end of the digital isolator is connected to the output end of the power isolation circuit.

4. The serial port adapter circuit as described in claim 2, characterized in that, The power isolation circuit includes a power isolation chip, a fourth resistor, a first capacitor, and a second capacitor. The positive voltage input terminal of the power isolation chip, the first terminal of the first capacitor, and the power terminal of the USB interface are connected. The negative voltage input terminal of the power isolation chip, the second terminal of the first capacitor, and the first ground terminal are connected. The positive voltage output terminal of the power isolation chip, the first terminal of the second capacitor, and the first terminal of the fourth resistor are connected to form the power output terminal of the power isolation circuit. The negative voltage output terminal of the power isolation chip, the second terminal of the second capacitor, the second terminal of the fourth resistor, and the second ground terminal are connected.

5. The serial port adapter circuit as described in claim 2, characterized in that, The logic circuit includes an AND gate, a fifth resistor, and a sixth resistor; The power supply terminal of the AND gate is connected to the power output terminal of the power isolation circuit. The first input terminal of the AND gate is connected to the first terminal of the fifth resistor. The second input terminal of the AND gate is connected to the first terminal of the sixth resistor. The output terminal of the AND gate is connected to the first receiving terminal of the digital isolation circuit. The second terminal of the fifth resistor is connected to the first transmitting terminal of the second conversion circuit. The second terminal of the sixth resistor is connected to the first transmitting terminal of the third conversion circuit.

6. The serial port adapter circuit as described in claim 2, characterized in that, The first conversion circuit includes a first conversion chip, a seventh resistor, an eighth resistor, a ninth resistor, and a tenth resistor; The first signal terminal and the second signal terminal of the first conversion chip are respectively connected to the DP terminal and the DN terminal of the USB interface. The first transmitting terminal and the first receiving terminal of the first conversion chip are respectively connected to the TTL interface through the seventh resistor and the eighth resistor. The second transmitting terminal of the first conversion chip is connected to the second receiving terminal of the digital isolation circuit through the ninth resistor. The second receiving terminal of the first conversion chip is connected to the second transmitting terminal of the digital isolation circuit through the tenth resistor.

7. The serial port adapter circuit as described in claim 2, characterized in that, The second conversion circuit includes a second conversion chip, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a first transient diode, and a second transient diode; The first transmitting end of the second conversion chip is connected to the first receiving end of the logic circuit, the first receiving end of the second conversion chip is connected to the first transmitting end of the digital isolation circuit, the first signal end of the second conversion chip, the first end of the eleventh resistor, the first end of the twelfth resistor, the first end of the first transient diode, and the first port of the RS485 interface are connected, the second signal end of the second conversion chip, the second end of the eleventh resistor, the first end of the thirteenth resistor, the first end of the second transient diode, and the second port of the RS485 interface are connected, the first end of the twelfth resistor is connected to the power output end of the power isolation circuit, and the second end of the thirteenth resistor, the second end of the first transient diode, and the second end of the second transient diode are connected to the second ground end.

8. The serial port adapter circuit as described in claim 2, characterized in that, The third conversion circuit includes a third conversion chip, a fourteenth resistor, a fifteenth resistor, a third transient diode, and a fourth transient diode; The first transmitting end of the third conversion chip is connected to the second receiving end of the logic circuit. The first receiving end of the third conversion chip is connected to the first transmitting end of the digital isolation circuit. The second transmitting end of the third conversion chip is connected to the first end of the fourteenth resistor. The second end of the fourteenth resistor, the first end of the third transient diode, and the first port of the RS232 interface are connected. The second receiving end of the third conversion chip is connected to the first end of the fifteenth resistor. The second end of the fifteenth resistor, the first end of the fourth transient diode, and the second port of the RS232 interface are connected. The second ends of the third transient diode and the second ends of the fourth transient diode are connected to the second ground terminal.

9. The serial port adapter circuit as described in any one of claims 1 to 8, characterized in that, The RJ45 interface includes: The first RJ45 interface is used to connect a network security monitoring device; The second RJ45 interface is used to connect to the network switch; The second RJ45 interface includes a network cable input interface and a network cable output interface connected together. The network cable input interface is used to connect to the network switch via a network cable, and the network cable output interface is used to connect to the host computer via a network cable.

10. A serial port adapter box, characterized in that, Includes the serial port adapter circuit as described in any one of claims 1 to 9.

Images