RS-485 bus switching device and bus communication system

Abstract

The utility model provides a kind of RS-485 bus switching device, including pulse drive circuit, two magnetic latching relays and bus interface circuit;Two double-coil magnetic latching relays are respectively A and B, and bus interface circuit is equipped with 485A, 485B differential signal interface and bus A, B interface;First pulse drive circuit is connected coil A1 and B1 respectively, controls A, B double-coil magnetic latching relay contact attraction, makes 485A and bus A, 485B and bus B connect;Second pulse drive circuit is connected coil A2 and B2 respectively, controls contact to open, realizes the shutdown of corresponding interface;The scheme can realize zero static power consumption, consumes energy when state switches, maintains state without power consumption;Realize electrical isolation, solve MOSFET body diode leakage problem.

Description

Technical Field

[0001] This utility model relates to the field of industrial communication technology, and in particular to an RS-485 bus switching device and bus communication system. Background Technology

[0002] The RS-485 bus, due to its differential transmission characteristics which provide strong common-mode interference immunity, as well as its long transmission distance (up to kilometers) and ease of multi-point networking, has been widely used in complex environments such as industrial control, intelligent buildings, security monitoring, and power data acquisition. In practical applications, it is often necessary to remotely connect and disconnect specific network nodes from the backbone bus.

[0003] In existing technologies, MOSFET switching solutions, ordinary relays, and analog switching IC solutions are commonly used, but these solutions all have certain shortcomings: When a MOSFET switching scheme is used to switch differential signal lines, the body diode inherent inside the MOSFET will form a leakage path, causing the signal to still be weakly coupled through the body diode in the off state, making it impossible to achieve complete physical isolation of the signal. While conventional relay solutions can achieve ideal physical disconnection, their coils require a continuous current to maintain the engaged state. This not only results in huge static power consumption, which is particularly noticeable in multi-point deployments, but also causes the coils to heat up during long-term power supply, affecting system reliability and lifespan. Analog switch IC solutions are expensive, have limited voltage withstand capability, and are not suitable for harsh industrial environments.

[0004] Therefore, there is an urgent need for an RS-485 bus switching device that can achieve complete shutdown and has zero static power consumption. Summary of the Invention

[0005] To address the shortcomings of existing technologies, the purpose of this invention is to propose an RS-485 bus switching device. It employs a dual-coil magnetic latching relay to achieve the switching of the 485A differential signal line with bus A and the 485B differential signal line with bus B, realizing true zero-power maintenance and complete physical shutdown, thus solving the leakage and power consumption problems of the body diode in existing technologies. This invention also provides a bus communication system.

[0006] To achieve the above objectives, the technical solution adopted by this utility model is as follows: The first aspect of this utility model provides an RS-485 bus switching device, including a pulse drive circuit, two magnetic latching relays and a bus interface circuit. The pulse driving circuit includes two first pulse driving circuits and two second pulse driving circuits; The two magnetic latching relays are a dual-coil magnetic latching relay A and a dual-coil magnetic latching relay B; The bus interface circuit includes a 485A interface for connecting the 485A differential signal line of the node device, a 485B interface for connecting the 485B differential signal line of the node device, a bus A interface for connecting the trunk bus A line, and a bus B interface for connecting the trunk bus B line. One first pulse drive circuit is connected to coil A1 of the dual-coil magnetic latching relay A, and one second pulse drive circuit is connected to coil A2 of the dual-coil magnetic latching relay A. One end of the contact of the dual-coil magnetic latching relay A is connected to a 485A interface, and the other end of the contact of the dual-coil magnetic latching relay A is connected to a bus A interface. Another first pulse drive circuit is connected to coil B1 of the dual-coil magnetic latching relay B, and another second pulse drive circuit is connected to coil B2 of the dual-coil magnetic latching relay B. One end of the contact of the dual-coil magnetic latching relay B is connected to a 485B interface, and the other end of the contact of the dual-coil magnetic latching relay B is connected to a bus B interface. After receiving the driving pulse, the first pulse driving circuit drives the coil A1 of the dual-coil magnetic latching relay A to be energized, the corresponding contacts close, and the 485A interface is connected to the bus A interface. After receiving the driving pulse, the second pulse driving circuit drives the coil A2 of the dual-coil magnetic latching relay A to be energized, the corresponding contacts open, and the 485A interface is disconnected from the bus A interface; After receiving the driving pulse, the first pulse driving circuit drives the coil B1 of the dual-coil magnetic latching relay B to be energized, the corresponding contacts close, and the 485B interface is connected to the bus B interface. After receiving the driving pulse, the second pulse driving circuit energizes the coil B2 of the dual-coil magnetic latching relay B, causing the corresponding contacts to open and the 485B interface to disconnect from the bus B interface.

[0007] A dual-coil magnetic latching relay is used to switch the 485A differential signal line to bus A and the 485B differential signal line to bus B. The dual-coil magnetic latching relay consumes energy only during state switching; once the contacts are closed or open, the permanent magnet structure maintains the state, achieving zero static power consumption. Its mechanical contacts provide true electrical isolation, fundamentally solving the signal leakage problem caused by the body diode in MOSFETs and ensuring complete and thorough signal shutdown. Furthermore, the mechanical contacts of the dual-coil magnetic latching relay have excellent high-voltage resistance and surge protection characteristics, making them suitable for complex and harsh industrial environments.

[0008] The entire solution consists of only a pulse drive circuit, a double-coil magnetic latching relay, and a bus interface circuit. It has a simple structure and ensures complete functionality while also facilitating later installation and maintenance.

[0009] In one possible embodiment, the first pulse driving circuit and the second pulse driving circuit use the same pulse driving circuit; The pulse driving circuit includes a transistor, a first pull-down resistor, a current-limiting resistor, and a diode; One end of the current-limiting resistor serves as the receiving end of the drive pulse, and the other end is connected to the base of the transistor; The current-limiting resistor is connected to the base of the transistor via the first pull-down resistor and grounded through the first pull-down resistor; The emitter of the transistor is grounded, and the collector of the transistor is connected to the power supply voltage through the diode on one hand, and through the coil of the dual-coil magnetic latching relay on the other hand.

[0010] Two independent pulse drive circuits control the closing and opening respectively. This separate design simplifies the control logic. Pull-down resistors ensure that the base of the transistor is reliably pulled low to ground potential when the control signal is floating or not established, preventing accidental conduction due to interference and enhancing the circuit's anti-interference capability.

[0011] In one possible embodiment, the bus interface circuit further includes a terminating resistor, a pull-up resistor, and a second pull-down resistor; The terminating resistor is connected in series between the 485A interface and the 485B interface; The 485A interface is connected to the VCC voltage through the pull-up resistor, and the 485B interface is connected to the GND ground terminal through the second pull-down resistor.

[0012] The aforementioned pull-up and pull-down resistor configuration ensures that the bus is in the correct logic state when idle, improving anti-interference capability and fault safety. Furthermore, by setting terminating resistors on the differential signal lines, signal reflections can be effectively suppressed, ensuring the integrity of the signal waveform and transmission quality, enabling the receiving end to accurately and stably identify data.

[0013] The second aspect of this utility model provides a bus communication system, including a backbone bus and several node communication terminals, wherein the node communication terminals connect or disconnect from the backbone bus through the RS-485 bus switching device.

[0014] The advantages of this utility model are: 1. Zero static power consumption: The dual-coil magnetic latching relay consumes energy only when switching states, and consumes no power to maintain the state; 2. Complete physical isolation: The mechanical contacts of the dual-turn magnetic latching relay provide true electrical isolation, completely solving the MOSFET body diode leakage problem; 3. High reliability: The mechanical contacts of the dual-coil magnetic latching relay have high withstand voltage and strong surge resistance, making it suitable for industrial environments; 4. Simple structure: It uses standard components, making it easy to manufacture and maintain; 5. Correct bus configuration: Integrate the correct termination matching network to ensure signal integrity. Attached Figure Description

[0015] Figure 1 This is the circuit structure diagram of this utility model. Detailed Implementation

[0016] To better understand the above-mentioned objectives, features, and advantages of this utility model, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that, unless otherwise specified, the embodiments and features described in these embodiments can be combined with each other.

[0017] Many specific details are set forth in the following description in order to provide a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Therefore, the scope of protection of the present invention is not limited to the specific embodiments disclosed below.

[0018] Example 1 This embodiment proposes an RS-485 bus switching device, referencing... Figure 1 It includes a pulse drive circuit, two magnetic latching relays, and a bus interface circuit; The pulse driving circuit includes two first pulse driving circuits, A and B, and two second pulse driving circuits, A and B. The two magnetic latching relays are a dual-coil magnetic latching relay A and a dual-coil magnetic latching relay B; The bus interface circuit includes a 485A interface for connecting the 485A differential signal line of the node device, a 485B interface for connecting the 485B differential signal line of the node device, a bus A interface for connecting the trunk bus A line, and a bus B interface for connecting the trunk bus B line. The first pulse drive circuit of path A is connected to coil A1 of the dual-coil magnetic latching relay A, and the second pulse drive circuit of path A is connected to coil A2 of the dual-coil magnetic latching relay A. One end of the contact of the dual-coil magnetic latching relay A is connected to a 485A interface, and the other end of the contact of the dual-coil magnetic latching relay A is connected to a bus A interface. The first pulse drive circuit of circuit B is connected to the coil B1 of the dual-coil magnetic latching relay B, and the second pulse drive circuit of circuit B is connected to the coil B2 of the dual-coil magnetic latching relay B. One end of the contact of the dual-coil magnetic latching relay B is connected to the 485B interface, and the other end of the contact of the dual-coil magnetic latching relay B is connected to the bus B interface. A terminating resistor is connected in series between the 485A interface and the 485B interface; After receiving the driving pulse, the first pulse driving circuit drives the coil A1 of the dual-coil magnetic latching relay A to be energized, the corresponding contacts close, and the 485A interface is connected to the bus A interface. After receiving the driving pulse, the second pulse driving circuit drives the coil A2 of the dual-coil magnetic latching relay A to be energized, the corresponding contacts open, and the 485A interface is disconnected from the bus A interface; After receiving the driving pulse, the first pulse driving circuit drives the coil B1 of the dual-coil magnetic latching relay B to be energized, the corresponding contacts close, and the 485B interface is connected to the bus B interface. After receiving the driving pulse, the second pulse driving circuit energizes the coil B2 of the dual-coil magnetic latching relay B, causing the corresponding contacts to open and the 485B interface to disconnect from the bus B interface.

[0019] Working principle: Simultaneously, control signals CTRL_AB_C (drive pulses) are sent to the first pulse drive circuits of paths A and B. After receiving the control signal CTRL_AB_C, the coil A1 of the dual-coil magnetic latching relay A is energized, the corresponding contact closes, and the 485A interface is connected to the bus A interface. At the same time, after receiving the control signal CTRL_AB_C, the coil B1 of the dual-coil magnetic latching relay B is energized, the corresponding contact closes, and the 485B interface is connected to the bus B interface. Thus, the conduction of the 485A differential signal line with bus A and the 485B differential signal line with bus B is realized.

[0020] Similarly, control signals CTRL_AB_O (drive pulses) are simultaneously sent to the second pulse drive circuits of paths A and B. Upon receiving the control signal CTRL_AB_O, the coil A2 of the dual-coil magnetic latching relay A is energized, the corresponding contact opens, and the 485A interface is disconnected from the bus A interface. Simultaneously, upon receiving the control signal CTRL_AB_O, the coil B2 of the dual-coil magnetic latching relay B is energized, the corresponding contact opens, and the 485B interface is disconnected from the bus B interface. Thus, the 485A differential signal line is disconnected from the bus A, and the 485B differential signal line is disconnected from the bus B.

[0021] Example 2 The difference between this embodiment and Embodiment 1 is that it provides specific embodiments of the pulse drive circuit, the double-turn magnetic latching relay, and the bus interface circuit. (Refer to...) Figure 1 .

[0022] Specifically, the first pulse driving circuit and the second pulse driving circuit use the same pulse driving circuit. The specific circuit structure of the pulse driving circuit is explained below using the first pulse driving circuit of channel A as an example. The pulse driving circuit includes transistor Q1, first pull-down resistor R1, current limiting resistor R3, and diode D1; One end of the current-limiting resistor R3 serves as the receiving end of the drive pulse, and the other end is connected to the base of the transistor Q1; The current-limiting resistor R3 is connected to the base of the transistor Q1 via the first pull-down resistor R1 and grounded through the first pull-down resistor R1; The emitter of transistor Q1 is grounded, and the collector of transistor Q1 is connected to the power supply voltage through diode D1 on one hand, and through coil A1 of dual-coil magnetic latching relay A on the other hand.

[0023] In this embodiment, when the current supply to the coil of the dual-coil magnetic latching relay is cut off, the coil will generate a very high reverse induced electromotive force. By setting diode D1, the transistor can be protected from being broken down by high voltage spikes.

[0024] The bus interface circuit also includes a terminating resistor R7, a pull-up resistor R5, and a second pull-down resistor R6. The terminating resistor R7 is connected in series between the 485A interface and the 485B interface; The 485A interface is connected to the VCC voltage through the pull-up resistor R5, and the 485B interface is connected to the GND ground terminal through the second pull-down resistor R6.

[0025] The bus interface circuit is specifically designed to establish a defined and stable idle state for the entire RS-485 bus, providing fail-safe protection and significantly improving the bus's anti-interference capability and reliability. This configuration ensures that the bus is in the correct logical state when idle, while also matching the characteristic impedance of the transmission lines. This design is simple in structure, ensuring complete functionality while facilitating circuit installation and subsequent maintenance.

[0026] Working principle of a dual-coil, dual-turn magnetic latching relay: A dual-coil, dual-turn magnetic latching relay contains two independent coils, A and B, which are the pull-in coil (coil A) and the release coil (coil B), respectively. When the pull-in coil is energized, the generated magnetic field attracts the moving iron core, causing the contacts to close. When it is necessary to open the contacts, the release coil is energized, and the magnetic field it generates is opposite in direction to the magnetic field generated by the pull-in coil, canceling the pull-in magnetic field, causing the moving iron core to release, and the contacts to open.

[0027] Specific working principle: When the control signal CTRL_AB_C is high, it drives transistors Q1 and Q2 to conduct through current-limiting resistors R3 and R4, respectively. After Q1 and Q2 are turned on, they provide current paths for the closed coils of the dual-coil magnetic latching relays K1 and K2. The energized coils generate a magnetic field, driving the contacts of K1 and K2 to close simultaneously, thus connecting the 485A differential signal line to bus A and the 485B differential signal line to bus B.

[0028] When the control signal CTRL_AB_O is high, the control signal drives the crystals Q3 and Q4 to conduct through the current-limiting resistors R8 and R9 respectively. After Q3 and Q4 conduct, they provide a current path for the disconnecting coils of the dual-coil magnetic latching relays K1 and K2. The coils are energized and generate a reverse magnetic field, which drives the contacts of K1 and K2 to open simultaneously, thereby disconnecting the 485A differential signal line from bus A and the 485B differential signal line from bus B.

[0029] It should be noted that the pulse width of the control signals CTRL_AB_C and CTRL_AB_O is usually set to 100-500ms.

[0030] Example 3 This embodiment provides a bus communication system, including a backbone bus and several node communication terminals. The node communication terminals connect or disconnect from the backbone bus through the RS-485 bus switching device described in Embodiment 1 or Embodiment 2.

[0031] It should be noted that the control signals CTRL_AB_C and CTRL_AB_O can be sent by the node communication terminal or by other control devices.

[0032] The above embodiments are only for illustrating the technical concept of this utility model and should not be construed as limiting the scope of protection of this utility model. Any modifications made to the technical solution based on the technical concept proposed by this utility model shall fall within the scope of protection of this utility model.

Claims

1. An RS-485 bus switching device, characterized in that, Includes a pulse drive circuit, two magnetic latching relays, and a bus interface circuit; The pulse driving circuit includes two first pulse driving circuits and two second pulse driving circuits; The two magnetic latching relays are a dual-coil magnetic latching relay A and a dual-coil magnetic latching relay B; The bus interface circuit includes a 485A interface for connecting the 485A differential signal line of the node device, a 485B interface for connecting the 485B differential signal line of the node device, a bus A interface for connecting the trunk bus A line, and a bus B interface for connecting the trunk bus B line. One first pulse drive circuit is connected to coil A1 of the dual-coil magnetic latching relay A, and one second pulse drive circuit is connected to coil A2 of the dual-coil magnetic latching relay A. One end of the contact of the dual-coil magnetic latching relay A is connected to a 485A interface, and the other end of the contact of the dual-coil magnetic latching relay A is connected to a bus A interface. Another first pulse drive circuit is connected to coil B1 of the dual-coil magnetic latching relay B, and another second pulse drive circuit is connected to coil B2 of the dual-coil magnetic latching relay B. One end of the contact of the dual-coil magnetic latching relay B is connected to a 485B interface, and the other end of the contact of the dual-coil magnetic latching relay B is connected to a bus B interface. After receiving the driving pulse, the first pulse driving circuit drives the coil A1 of the dual-coil magnetic latching relay A to be energized, the corresponding contacts close, and the 485A interface is connected to the bus A interface. After receiving the driving pulse, the second pulse driving circuit drives the coil A2 of the dual-coil magnetic latching relay A to be energized, the corresponding contacts open, and the 485A interface is disconnected from the bus A interface; After receiving the driving pulse, the first pulse driving circuit drives the coil B1 of the dual-coil magnetic latching relay B to be energized, the corresponding contacts close, and the 485B interface is connected to the bus B interface. After receiving the driving pulse, the second pulse driving circuit energizes the coil B2 of the dual-coil magnetic latching relay B, causing the corresponding contacts to open and the 485B interface to disconnect from the bus B interface.

2. The RS-485 bus switching device according to claim 1, characterized in that, The first pulse driving circuit and the second pulse driving circuit use the same pulse driving circuit; The pulse driving circuit includes a transistor, a first pull-down resistor, a current-limiting resistor, and a diode; One end of the current-limiting resistor serves as the receiving end of the drive pulse, and the other end is connected to the base of the transistor; The current-limiting resistor is connected to the base of the transistor via the first pull-down resistor and grounded through the first pull-down resistor; The emitter of the transistor is grounded, and the collector of the transistor is connected to the power supply voltage through the diode on one hand, and through the coil of the dual-coil magnetic latching relay on the other hand.

3. An RS-485 bus switching device according to claim 1 or 2, characterized in that, The bus interface circuit also includes a terminating resistor, a pull-up resistor, and a second pull-down resistor; The terminating resistor is connected in series between the 485A interface and the 485B interface; The 485A interface is connected to the VCC voltage through the pull-up resistor, and the 485B interface is connected to the GND ground terminal through the second pull-down resistor.

4. A bus communication system, comprising a backbone control terminal and several node controlled terminals, characterized in that, The node communication terminal connects or disconnects from the backbone bus using the RS-485 bus switching device as described in any one of claims 1-3.

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