A single microcontroller-based dual-screen display circuit structure

Abstract

The utility model provides a kind of double-screen display circuit structure based on single microcontroller, including microcontroller ESPS32-S3-WROOM-1-N16R8, audio ADC circuit and audio playing circuit;Wherein audio ADC circuit contains chip ES7210, and audio playing circuit contains chip ES8311.A set of independent display screen interface (SPI / I2C general interface) is newly added on the basis of existing ESP32-S3 development board.This improvement breaks through the limitation that existing development board only has single-screen output, and belongs to important innovation point on hardware structure.By increasing the interface, the hardware basis of one machine double screen is realized by the present scheme.Furthermore, the present scheme can make two display screens work simultaneously and display different interiors respectively, and they are independent and do not interfere with each other, solving the problem that traditional scheme cannot drive two screens simultaneously or two screens can only display the same picture.

Description

Technical Field

[0001] This utility model relates to the field of electronic display application technology, and in particular to a dual-screen display circuit structure based on a single microcontroller. Background Technology

[0002] Most microcontroller development boards on the market today can only drive a single display screen. For example, the JLCPCB ESP32-S3 development board comes with a 2-inch IPS LCD screen for display; these development boards have high integration, but can only output a single screen image, making it difficult to directly achieve dual-screen synchronization or independent display.

[0003] In applications of smart toys (such as the electronic eyes of robots), a single screen limits expressiveness. If the toy is desired to have two separate "eyes" displaying animations, traditional solutions require two control systems or for both screens to display identical content. The former significantly increases hardware cost and complexity, requiring two microcontrollers to drive their respective screens and coordinate synchronization; the latter (two screens sharing the same signal) only presents a mirrored image, failing to achieve truly independent display. Existing technologies have seen developers attempt to connect multiple displays using a single ESP32 via an SPI bus, configuring an independent chip select signal for each screen and refreshing them sequentially. However, mainstream commercial development boards do not yet offer out-of-the-box dual-screen output functionality, often requiring developers to build complex circuits to achieve this.

[0004] Overall, the main shortcoming of existing technologies lies in the lack of a simple dual-screen display solution using a single microcontroller. For intelligent toys requiring "dual" displays, there are currently almost no mature solutions on the market (even those few dedicated boards that integrate dual screens are usually only compatible with specific screen types, lacking flexibility). Therefore, it is necessary to provide an improved technology that allows common ESP32-S3 development boards to drive two displays simultaneously, with each screen displaying different content to meet the needs of dual-eye animation display. Summary of the Invention

[0005] In view of this, the purpose of this utility model is to propose a dual-screen display circuit structure based on a single microcontroller. By adding a display interface to the original single-screen output, a single microcontroller can simultaneously output two different animation images, thereby solving the limitation of existing toy electronic eyes that can only display with one eye or synchronize both eyes.

[0006] To achieve the above objectives, this utility model provides a dual-screen display circuit structure based on a single microcontroller, including a microcontroller ESPS32-S3-WROOM-1-N16R8, and also includes an audio ADC circuit and an audio playback circuit.

[0007] The audio ADC circuit includes a chip ES7210, and the audio playback circuit includes a chip ES8311.

[0008] The IO1, IO2, IO38, IO14, IO13, and IO12 pins of the microcontroller ESPS32-S3-WROOM-1-N16R8 are respectively electrically connected to the CDATA, CCLK, MCLK, SLCK, LRCK, and SDOUT1 pins of the chip ES7210.

[0009] The IO1, IO2, IO38, IO14, IO13, and IO45 pins of the microcontroller ESPS32-S3-WROOM-1-N16R8 are respectively electrically connected to the CDATA, CCLK, MCLK, SLCK, LRCK, and DSDIN pins of the chip ES8311.

[0010] The MIC3N and MIC3P pins of the ES7210 chip are electrically connected to the OUTN and OUTP pins of the ES8311 chip, respectively.

[0011] Preferably, the MCLK pin, SLCK pin, and LRCK pin of the ES7210 chip are connected in series with capacitors C67, C68, and C69 respectively, and then grounded. The capacitance values ​​of capacitors C67, C68, and C69 are all 22pF.

[0012] Preferably, the REFQ34, REFP34, MIC4P, MIC4N, MICBIAS34 and REFQM pins of the ES7210 chip are connected in series with capacitors C34, C35, C37, C39, C40 and C41 respectively, and then grounded. The capacitance values ​​of capacitors C34, C35, C37, C39, C40 and C41 are all 1μF.

[0013] Preferably, the MCLK pin, SLCK pin, and LRCK pin of the ES8311 chip are connected in series with capacitors C62, C63, and C64 respectively, and then grounded. The capacitance values ​​of capacitors C62, C63, and C64 are all 22pF.

[0014] Preferably, the OUTN and OUTP pins of the ES8311 chip are connected in series with capacitors C53 and C54 respectively and then grounded, with the capacitance values ​​of both capacitors C53 and C54 being 22pF.

[0015] Preferably, the dual-screen display circuit structure based on a single microcontroller further includes two ZTS6216 chips, wherein:

[0016] The OUT and GND pins of the first chip ZTS6216 are electrically connected to the MIC1P and MIC1N pins of the ES7210 chip, respectively.

[0017] The OUT and GND pins of the second chip ZTS6216 are electrically connected to the MIC2P and MIC2N pins of the ES7210 chip, respectively.

[0018] Preferably, the dual-screen display circuit structure based on a single microcontroller further includes a chip NS4150B, wherein the INP pin and INN pin of the chip NS4150B are electrically connected to the OUTP pin and OUTN pin of the chip ES7210, respectively.

[0019] Preferably, the INP pin of the NS4150B chip is electrically connected to resistor R42 and capacitor C72 in sequence, and then connected to the OUTP pin of the ES7210 chip. The INN pin is electrically connected to resistor R43 and capacitor C73 in sequence, and then connected to the OUTN pin of the ES7210 chip. The resistance values ​​of resistors R42 and R43 are both 100kΩ, and the capacitance values ​​of capacitors C72 and C73 are both 100nF.

[0020] As can be seen from the above, the dual-screen display circuit structure based on a single microcontroller provided by this utility model has the following beneficial effects:

[0021] This solution enables smart toys to simultaneously drive their two electronic eyes, each displaying different animations or expressions. This dual-screen independent display makes the toy's image more vivid and realistic, significantly enhancing its interactive capabilities. For example, while one eye blinks, the other eye can rotate or display patterns such as hearts, thus giving the toy a wider range of emotional expressions. This is a significant advantage that existing single-eye display toys cannot achieve.

[0022] Low hardware cost and simple structure: Compared to the traditional approach of requiring two MCUs to control two screens, this solution accomplishes the same function with only one ESP32-S3 microcontroller, avoiding the problem of multi-controller synchronization and reducing hardware cost and circuit complexity. The newly added SPI / I²C interface module has a simplified design, requiring no complex additional chips, and most components are reused from the original development board, thus saving space and cost and facilitating product miniaturization and mass production.

[0023] High compatibility and flexible application: Because the second-screen interface of this solution supports different communication protocols and screen types, developers can choose the appropriate display screen according to their needs (whether it is an IPS LCD screen of different sizes or a lower-power OLED screen, etc.). This screen-independent design makes the solution universal in multiple scenarios. In addition to smart toys, this solution is also applicable to other fields that require dual-screen information display, such as dual-screen interfaces of portable devices and dual-window displays of instrumentation equipment. The design concept of this solution can be smoothly transplanted, making it highly valuable for application and promotion.

[0024] Reliable performance and smooth display: The ESP32-S3's powerful processing capabilities and ample PSRAM ensure smooth performance when running dual screens simultaneously. This solution's optimized control methods ensure smooth refresh on both screens, with no noticeable delays or stuttering. Even when simultaneously running graphical interface libraries (such as LVGL) to render complex UIs, both screens maintain good frame rates and synchronization. This translates to a superior user experience, smooth and vivid animations, and no sacrifice in display quality due to the addition of a second screen.

[0025] Filling a market gap with outstanding innovation: Currently, most general-purpose development boards and smart toys on the market lack this dual-screen independent display capability. This solution fills this technological gap. For toy manufacturers and makers, this technology offers a brand-new functional highlight, enabling the creation of innovative gameplay that differs from traditional products. In the competition, this solution gives products a unique advantage and is expected to lead the upgrade of smart toy display methods.

[0026] In summary, this solution, through ingenious hardware expansion and software control, achieves the innovative function of controlling two screens with a single device. It enhances device performance while balancing cost and complexity, demonstrating significant practical value and potential for widespread adoption. Its advantage lies in expanding the boundaries of microcontroller applications, enabling the small ESP32-S3 development board to handle dual-screen display tasks that previously required more complex systems, showcasing the solution's technological advancement and superiority. In the future, smart toys based on this solution will be able to interact with users in more diverse and engaging ways, possessing promising market prospects and industrial value. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 This is a schematic diagram of the peripheral circuit of a microcontroller based on a dual-screen display circuit structure using a single microcontroller, according to an embodiment of this utility model.

[0029] Figure 2 This is a schematic diagram of the peripheral circuit of an audio ADC chip based on a dual-screen display circuit structure with a single microcontroller, according to an embodiment of this utility model.

[0030] Figure 3 This is a schematic diagram of the peripheral circuit of an audio playback chip based on a dual-screen display circuit structure with a single microcontroller, according to an embodiment of the present invention.

[0031] Figure 4 This is a schematic diagram of the peripheral circuit of a microphone chip based on a dual-screen display circuit structure with a single microcontroller, according to an embodiment of the present invention.

[0032] Figure 5 This is a schematic diagram of the peripheral circuit of an audio power amplifier chip based on a dual-screen display circuit structure with a single microcontroller, according to an embodiment of this utility model. Detailed Implementation

[0033] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to specific embodiments and accompanying drawings.

[0034] It should be noted that, unless otherwise defined, the technical or scientific terms used in the embodiments of this utility model should have the ordinary meaning understood by one of ordinary skill in the art to which this utility model pertains. The terms "first," "second," and similar terms used in this utility model do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are only used to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0035] This utility model discloses a dual-screen display circuit structure based on a single microcontroller, combined with... Figures 1 to 5 As shown: It includes a microcontroller ESPS32-S3-WROOM-1-N16R8, an audio ADC circuit, and an audio playback circuit; the audio ADC circuit includes a chip ES7210, and the audio playback circuit includes a chip ES8311; pins IO1, IO2, IO38, IO14, IO13, and IO12 of the microcontroller ESPS32-S3-WROOM-1-N16R8 are electrically connected to pins CDATA, CCLK, MCLK, SLCK, LRCK, and SDOUT1 of the chip ES7210, respectively. Pins IO1, IO2, IO38, IO14, IO13, and IO45 of the microcontroller ESPS32-S3-WROOM-1-N16R8 are electrically connected to pins CDATA, CCLK, MCLK, SLCK, LRCK, and DSDIN of the chip ES8311, respectively. Pins MIC3N and MIC3P of the chip ES7210 are electrically connected to pins OUTN and OUTP of the chip ES8311, respectively.

[0036] This solution uses the ESP32-S3 microcontroller as the control core, adopts the existing architecture of the development board, and adds an independent display interface module. Specifically, a new SPI / I²C display interface is added to the original development board to connect a second display screen. The first display screen uses the development board's built-in display interface (e.g., the original onboard 2-inch IPS screen interface), while the second display screen connects to the ESP32-S3 via the new interface. The new interface can be configured in SPI or I²C mode to adapt to different types of display panels (e.g., TFT color screens with SPI interface or OLED screens with I²C interface), and is not limited to a specific screen model. The two displays can be the same or different types and sizes. Due to the strong interface compatibility, the specific type of display screen is not a critical limitation (both color LCDs and monochrome OLEDs can be driven normally). Through ingenious hardware expansion and software control, the innovative function of controlling two screens with one controller is achieved. This improves the device's performance while balancing cost and complexity, demonstrating significant practical value and promotional significance. Its advantage lies in expanding the boundaries of microcontroller applications, enabling the small ESP32-S3 development board to handle dual-screen display tasks that previously required more complex systems, demonstrating the advanced technology and superiority of this solution. In the future, smart toys based on this solution will be able to interact with users in more diverse and engaging ways, possessing promising market prospects and industrial value.

[0037] In this design, the MCLK, SLCK, and LRCK pins of the ES7210 chip are connected in series with capacitors C67, C68, and C69, respectively, before being grounded. Each of these capacitors has a capacitance of 22pF. These capacitors act as filters, preventing external digital noise interference during signal transmission. They also act as a rapid response system, dealing with high-frequency noise: the rapid switching of transistors (especially in the digital section) generates extremely high-frequency transient currents (from a few MHz to hundreds of MHz or even GHz). These currents change very quickly, and large capacitors, due to their equivalent series inductance (ESL), cannot respond promptly. The 22pF capacitance used in this design is the most suitable value, verified through experiments.

[0038] In this configuration, the REFQ34, REFP34, MIC4P, MIC4N, MICBIAS34, and REFQM pins of the ES7210 chip are connected in series with capacitors C34, 35, 37, 39, 40, and 41, respectively, before being grounded. The capacitance values ​​of capacitors C34, 35, 37, 39, 40, and 41 are all 1μF. The main functions of these capacitors are twofold: First, they act as a reservoir or energy pool to handle low-frequency current fluctuations. When the overall power consumption of the circuit changes (e.g., when the chip is first started or a functional module is activated), a relatively low-frequency (tens to thousands of hertz) current demand is generated. The large capacitors utilize their stored charge to quickly replenish this energy, preventing significant drops or rises in the power supply voltage (i.e., maintaining voltage stability). Second, although placed slightly away from the power supply pins due to their larger size, they provide bulk filtering for the entire board-level power supply.

[0039] This solution uses the ESP32-S3 microcontroller as the control core, retaining the original architecture of the JLCPCB ESP32-S3 development board, and adding an independent display interface module. Specifically, a new SPI / I²C display interface is added to the original development board for connecting a second display. The first display uses the development board's built-in display interface (e.g., the original onboard 2-inch IPS screen interface), while the second display connects to the ESP32-S3 via the new interface. The new interface can be configured in SPI or I²C mode to adapt to different types of display panels (e.g., TFT color screens with SPI interface or OLED screens with I²C interface), and is not limited to a specific screen model. The two displays can be of the same or different types and sizes. Due to the strong interface compatibility, the specific type of display is not a critical limitation (both color LCDs and monochrome OLEDs can be driven normally).

[0040] Working Principle: The ESP32-S3 microcontroller features a dual-core processor and abundant memory resources (e.g., 16MB onboard Flash and 8MB PSRAM), providing the foundation for simultaneously driving dual screens. Upon power-up, the drivers for the left and right displays are initialized separately. Utilizing its multitasking capabilities, the microcontroller can send display data to the two screens in parallel or alternately. For example, one CPU core can be dedicated to refreshing the image on the left eye screen, while another core handles the right eye screen; alternatively, in a single-core configuration, fast polling / interrupt switching can be used to alternately update the content of the two screens over time. Each display has its own independent frame buffer. The microcontroller draws and generates image frames for the left and right eyes as needed, then sends them to the corresponding screens through their respective interfaces. Since each screen has independent chip select or address line control, the microcontroller ensures that different image data is sent to different screens, enabling simultaneous display of different images. In terms of hardware connection, if the SPI bus mode is used, the two screens share the clock and data bus but are distinguished by independent chip select (CS) lines; if the I²C interface is used, the two screens are distinguished by different device addresses. In this way, the microcontroller selects the chip select signal of the left screen when refreshing the left eye screen, and selects the chip select or address of the right screen when refreshing the right eye screen, so as to achieve dual-channel alternating refresh without interference.

[0041] In a preferred embodiment, the MCLK, SLCK, and LRCK pins of the ES8311 chip are connected in series with capacitors C62, C63, and C64, respectively, and then grounded. The capacitance values ​​of capacitors C62, C63, and C64 are all 22pF. The function of these capacitors is the same as that of the 22pF capacitors mentioned above.

[0042] In a preferred embodiment, the OUTN and OUTP pins of the ES8311 chip are connected in series with capacitors C53 and C54 respectively, and then grounded. Both capacitors C53 and C54 have a capacitance of 22pF. The function of these capacitors is the same as that of the 22pF capacitors mentioned above.

[0043] In a preferred embodiment, the dual-screen display circuit structure based on a single microcontroller also includes two ZTS6216 chips, wherein:

[0044] The OUT and GND pins of the first chip ZTS6216 are electrically connected to the MIC1P and MIC1N pins of the ES7210 chip, respectively.

[0045] The OUT and GND pins of the second chip ZTS6216 are electrically connected to the MIC2P and MIC2N pins of the ES7210 chip, respectively.

[0046] These two microphones are used to collect stereo audio signals.

[0047] In a preferred embodiment, the dual-screen display circuit structure based on a single microcontroller further includes an NS4150B chip. The INP and INN pins of the NS4150B chip are electrically connected to the OUTP and OUTN pins of the ES7210 chip, respectively. Specifically, the INP pin of the NS4150B chip is connected to resistor R42 and capacitor C72 before being connected to the OUTP pin of the ES7210 chip. The INN pin is connected to resistor R43 and capacitor C73 before being connected to the OUTN pin of the ES7210 chip. The resistance values ​​of resistors R42 and R43 are both 100kΩ, and the capacitance values ​​of capacitors C72 and C73 are both 100nF. The main function of these capacitors is:

[0048] (1) Dealing with high-frequency noise: The rapid switching of transistors (especially the digital part) inside the chip generates transient currents at extremely high frequencies (from a few MHz to hundreds of MHz or even GHz). These currents change very quickly, and large capacitors cannot respond in time due to their own equivalent series inductance (ESL);

[0049] (2) Provide a low-impedance return path: Small-capacity ceramic capacitors (especially NPO / X7R capacitors with good high-frequency characteristics) have very small ESL and exhibit very low impedance at high frequencies. They provide the shortest and smoothest path to ground for these high-frequency noises, preventing noise from coupling to the power lines and thus affecting sensitive analog circuits;

[0050] (3) Isolating the effect of digital noise on analog power supply: Placing decoupling capacitors on both AVDD and DVDD pins can prevent switching noise from the digital section from crosstalking to the analog section through the power supply;

[0051] (4) Layout: The capacitor must be placed as close as possible to the power supply pin of the chip to minimize loop inductance. Ideally, one end of the capacitor should be directly connected to the power supply pin and the other end should be directly connected to the ground pin of the chip.

[0052] The key innovations and improvements of this solution are mainly reflected in the following aspects:

[0053] (1) Hardware Interface Expansion: A new independent display interface (SPI / I²C universal interface) is added to the existing ESP32-S3 development board. This improvement breaks through the limitation of the existing development board having only single-screen output and is an important innovation in hardware structure. By adding this interface, this solution realizes the hardware foundation of a dual-screen system, and this interface design will be one of the key protected aspects.

[0054] (2) Dual-screen independent display: This solution enables two displays to work simultaneously and each display different content, which is the core functional innovation. Traditional solutions either cannot drive two screens simultaneously or the two screens can only display the same image, while this solution supports dual-screen different images (i.e., the two screens display completely different images). This allows the device to present richer and more diverse image information, especially with unique advantages in the expression of the eyes of electronic toys, and should be a key function protected by patent.

[0055] (3) Compatibility with multiple display types: This solution is not limited to a specific type of screen hardware. By providing dual communication options of SPI and I²C, it can be connected to any display screen, such as LCD or OLED. This compatibility and flexibility is one of the key improvements, meaning that this solution has a wide range of applications. Compared with existing integrated solutions that only support fixed screens, the universal interface design of this solution provides greater freedom, which is also worth protecting.

[0056] (4) Control Method for Single-Chip Dual-Screen Solution: This solution encompasses a hardware and software collaborative method for coordinating and controlling multiple screens using a single microcontroller. This includes techniques for using dual-core parallel processing or time-division multiplexing to refresh the two screens, as well as timing control strategies to ensure that the refreshes of the two screens do not interfere with each other. This method ensures smooth dual-screen display without adding an extra main control chip, demonstrating the advantage of efficient utilization of hardware resources. Related control processes and timing management are also key aspects that this solution requires to protect.

[0057] The aforementioned improvements work together to produce significant benefits: dual-screen display functionality, previously requiring complex systems, is achieved with minimal hardware modifications, greatly enhancing device functionality and user experience. This solution protects these key innovations and their resulting technical effects to prevent unauthorized copying or imitation of the same dual-screen display solution.

[0058] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of the present invention (including the claims) is limited to these examples; within the framework of the present invention, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of the different aspects of the present invention as described above, which are not provided in the details for the sake of brevity.

[0059] The embodiments of this utility model are intended to cover all such substitutions, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the protection scope of this utility model.

Claims

1. A dual-screen display circuit structure based on a single microcontroller, comprising a microcontroller ESPS32-S3-WROOM-1-N16R8, characterized in that, It also includes: audio ADC circuit and audio playback circuit; The audio ADC circuit includes a chip ES7210, and the audio playback circuit includes a chip ES8311. The IO1, IO2, IO38, IO14, IO13, and IO12 pins of the microcontroller ESPS32-S3-WROOM-1-N16R8 are respectively electrically connected to the CDATA, CCLK, MCLK, SLCK, LRCK, and SDOUT1 pins of the chip ES7210. The IO1, IO2, IO38, IO14, IO13, and IO45 pins of the microcontroller ESPS32-S3-WROOM-1-N16R8 are respectively electrically connected to the CDATA, CCLK, MCLK, SLCK, LRCK, and DSDIN pins of the chip ES8311. The MIC3N and MIC3P pins of the ES7210 chip are electrically connected to the OUTN and OUTP pins of the ES8311 chip, respectively.

2. The dual-screen display circuit structure based on a single microcontroller according to claim 1, characterized in that, The MCLK, SLCK, and LRCK pins of the ES7210 chip are connected in series with capacitors C67, C68, and C69 respectively, and then grounded. The capacitance values ​​of capacitors C67, C68, and C69 are all 22pF.

3. The dual-screen display circuit structure based on a single microcontroller according to claim 1, characterized in that, The REFQ34, REFP34, MIC4P, MIC4N, MICBIAS34, and REFQM pins of the ES7210 chip are connected in series with capacitors C34, C35, C37, C39, C40, and C41, respectively, and then grounded. The capacitance values ​​of capacitors C34, C35, C37, C39, C40, and C41 are all 1μF.

4. The dual-screen display circuit structure based on a single microcontroller according to claim 1, characterized in that, The MCLK, SLCK, and LRCK pins of the ES8311 chip are connected in series with capacitors C62, C63, and C64 respectively, and then grounded. The capacitance values ​​of capacitors C62, C63, and C64 are all 22pF.

5. The dual-screen display circuit structure based on a single microcontroller according to claim 1, characterized in that, The OUTN and OUTP pins of the ES8311 chip are connected in series with capacitors C53 and C54 respectively and then grounded. The capacitance of both capacitors C53 and C54 is 22pF.

6. The dual-screen display circuit structure based on a single microcontroller according to claim 1, characterized in that, The dual-screen display circuit structure based on a single microcontroller also includes two ZTS6216 chips, wherein: The OUT and GND pins of the first chip ZTS6216 are electrically connected to the MIC1P and MIC1N pins of the ES7210 chip, respectively. The OUT and GND pins of the second chip ZTS6216 are electrically connected to the MIC2P and MIC2N pins of the ES7210 chip, respectively.

7. The dual-screen display circuit structure based on a single microcontroller according to claim 1, characterized in that, The dual-screen display circuit structure based on a single microcontroller also includes a chip NS4150B, whose INP and INN pins are electrically connected to the OUTP and OUTN pins of the chip ES7210, respectively.

8. The dual-screen display circuit structure based on a single microcontroller according to claim 7, characterized in that, The INP pin of the NS4150B chip is electrically connected to resistor R42 and capacitor C72, and then connected to the OUTP pin of the ES7210 chip. The INN pin is electrically connected to resistor R43 and capacitor C73, and then connected to the OUTN pin of the ES7210 chip. The resistance values ​​of resistors R42 and R43 are both 100kΩ, and the capacitance values ​​of capacitors C72 and C73 are both 100nF.

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