A relay drive circuit for an inkjet printer
Patent Information
- Application Number
- CN202522528513.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-28
- Publication Date
- 2026-10-09
- Estimated Expiration
- 2035-11-28
AI Technical Summary
[0002]在现有的数字化喷墨打印机等电子设备中,通常采用微控制器的通用I/O端口直接驱动继电器线圈,继电器作为一种感性负载,在断开瞬间会因电流的突变而产生极高的反向电动势,反向电动势会通过电源线和信号线耦合至系统主控芯片及其供电网络,导致系统电源出现电压尖峰和波形振荡,进而引发程序跑飞、设备误动作甚至元器件击穿等系统稳定性问题,现有技术中虽存在一些简单的保护电路,如并联续流二极管,其作为外部分立元件搭建,存在电路布局复杂、响应速度慢及保护不全面的缺陷
[0018]本实用新型通过采用ULN2003APG作为核心驱动芯片,其内部集成的达林顿晶体管阵列与续流二极管,简化了电路结构,这种高度集成的设计方案,省去了传统驱动电路中必须外接的多个分立功率晶体管和续流二极管,不仅减少了元器件数量、降低了物料成本与电路板占用面积,而且简化了PCB布局布线难度,提高了生产装配效率,实现继电器驱动电路的小型化;
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Figure CN224841680U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of inkjet printing technology and is applied to a relay drive circuit for an inkjet printer. Background Technology
[0002] In existing digital inkjet printers and other electronic devices, the general-purpose I / O ports of microcontrollers are typically used to directly drive relay coils. As an inductive load, the relay generates an extremely high back electromotive force due to the sudden change in current when it is disconnected. This back electromotive force is coupled to the system's main control chip and its power supply network through the power and signal lines, causing voltage spikes and waveform oscillations in the system power supply. This can lead to system stability problems such as program crashes, device malfunctions, and even component breakdowns. Although some simple protection circuits exist in the existing technology, such as parallel freewheeling diodes, these are built as external discrete components and have drawbacks such as complex circuit layout, slow response speed, and incomplete protection. Summary of the Invention
[0003] To address the aforementioned technical problems, this invention provides a relay drive circuit for inkjet printers.
[0004] The practical technical solution is implemented as follows:
[0005] A relay drive circuit for an inkjet printer includes a signal control module, a core drive module, a power execution module, a drive power distribution and filtering module, and a status indication module.
[0006] The signal control module is used to generate multiple digital control signals;
[0007] The core driving module uses a multi-channel OC gate driver chip to receive the digital control signal and provide driving current and freewheeling discharge path.
[0008] The power execution module is used to perform switching operations on the external load according to the drive current;
[0009] The drive power distribution and filtering module is used to provide and distribute power to the core drive module and the power execution module. It also includes a hierarchical decoupling network to solve the power noise problem caused by rapid current changes, thereby ensuring the stability of the system.
[0010] The status indication module includes multiple parallel indication branches for providing intuitive physical indication.
[0011] The output terminal of the signal control module is connected to the input terminal of the OC gate driver chip through a first set of printed circuits. The output terminal of the OC gate driver chip is connected to the controlled terminal of the power execution module through a second set of printed circuits. The drive power output terminal of the drive power distribution and filtering module is connected to the common power pin of the OC gate driver chip. The common ground pin of the OC gate driver chip is connected to GND through a short and wide low-impedance ground trace. The common power pin of the OC gate driver chip is the COM pin. The COM pin is connected to the drive power output terminal of the drive power distribution and filtering module to form a complete freewheeling loop. The common ground pin of the OC gate driver chip is the GND pin.
[0012] A freewheeling diode is integrated between each output pin of the OC gate driver chip and the common power supply pin of the OC gate driver chip. The anode of each freewheeling diode is connected to the corresponding output pin, and the cathode of each freewheeling diode is connected to the common power supply pin.
[0013] Furthermore, the power execution module includes an electromagnetic relay, the first pin of the electromagnetic relay coil is connected to the power supply terminal V_12V of the drive power supply, and the second pin of the electromagnetic relay coil is connected to one output pin of the OC gate driver chip.
[0014] The hierarchical decoupling network includes an energy storage capacitor and a decoupling capacitor. The energy storage capacitor can quickly release the stored charge to compensate for the instantaneous current, thereby maintaining the stability of the power bus voltage and preventing system logic errors or relay failure due to voltage drops. The decoupling capacitor is placed close to the COM and GND pins of the OC gate driver chip, and is preferably directly connected by a through-hole between the chip's power supply pin and ground pin to minimize the parasitic inductance of the high-frequency decoupling circuit and ensure that it can effectively filter out the high-frequency noise generated by the chip switching.
[0015] Each of the multiple parallel indicator branches includes a current-limiting resistor and a light-emitting diode.
[0016] The first end of the current-limiting resistor is connected to the corresponding output pin of the OC gate driver chip, the second end of the current-limiting resistor is connected to the positive terminal of the light-emitting diode, the negative terminal of the light-emitting diode is connected to GND, and the working logic of the status indicator module is completely synchronized with the relay action status.
[0017] Beneficial effects:
[0018] This invention uses the ULN2003APG as the core driver chip, which integrates a Darlington transistor array and a freewheeling diode, simplifying the circuit structure. This highly integrated design eliminates the need for multiple discrete power transistors and freewheeling diodes that must be externally connected in traditional driver circuits. This not only reduces the number of components, lowers material costs and circuit board area, but also simplifies PCB layout and wiring, improves production and assembly efficiency, and enables miniaturization of relay driver circuits.
[0019] By utilizing the chip's built-in freewheeling diode to provide an automatic and efficient discharge path for the relay coil, the back electromotive force generated at the moment of turn-off can be quickly suppressed, and the output pin voltage can be clamped within a safe range. This effectively prevents the risk of breakdown caused by high voltage spikes to the driver chip itself, while reducing the back electromotive force noise coupled to other sensitive digital circuits in the system through the power network. This solves problems such as system power instability, abnormal operation, or reset caused by inductive load switching, and greatly improves the anti-interference capability and long-term operational reliability of the entire inkjet printer system.
[0020] By introducing a hierarchical decoupling network and a refined PCB layout strategy, combined with widened power traces, low-impedance grounding, and close-to-pin placement of decoupling capacitors, a full-band suppression capability from low-frequency energy buffering to high-frequency noise filtering is constructed. This ensures a clean and stable chip operating voltage, along with the intuitive diagnostic functions provided by the status indicator module. Together, these factors enable this driver circuit to exhibit excellent stability, maintainability, and environmental adaptability under conditions of frequent inkjet printer start-stop and complex electromagnetic environments. Attached Figure Description
[0021] Figure 1 A structural block diagram of a relay drive circuit for an inkjet printer provided in this application;
[0022] Figure 2 A circuit schematic diagram of a relay drive circuit for an inkjet printer provided in this application;
[0023] Figure 3 A schematic diagram of a relay drive circuit for an inkjet printer provided in this application; Detailed Implementation
[0024] like Figure 1-3 As shown, this embodiment provides a relay drive circuit for an inkjet printer, including: a signal control module, a core drive module, a power execution module, a drive power distribution and filtering module, and a status indication module;
[0025] The signal control module is used to generate multiple digital control signals;
[0026] The core driving module uses a multi-channel OC gate driver chip to receive the digital control signal and provide driving current and freewheeling discharge path.
[0027] The power execution module is used to perform switching operations on the external load according to the drive current;
[0028] The drive power distribution and filtering module is used to provide and distribute power to the core drive module and the power execution module. It also includes a hierarchical decoupling network to solve the power noise problem caused by rapid current changes, thereby ensuring the stability of the system.
[0029] The status indication module includes multiple parallel indication branches for providing intuitive physical indication;
[0030] The signal control module serves as the instruction source for the circuit. Its core component is the main control unit, which uses a microcontroller (MCU). The MCU's seven general purpose input / output (GPIO) ports are configured in push-pull output mode to generate multiple digital control signals. These seven signals are labeled IN1 to IN7. The GPIO pins of the main control unit are connected to the corresponding input pins IN1 to IN7 of the OC gate driver chip through a first set of printed circuits. The first set of printed circuits is designed as thin lines of equal length and spacing to reduce crosstalk between signals and ensure the synchronization and integrity of the multiple control signals.
[0031] The core driver module is the power interface and protection center of the entire circuit. The core component is a multi-channel, high-voltage, high-current OC gate driver chip, which uses the ULN2003APG chip (marked as U5) and is packaged in SOIC-16. The OC gate driver chip integrates 7 independent Darlington transistor arrays, each of which constitutes an OC gate output. The input pins IN1 to IN7 of the OC gate driver chip receive control signals through the first set of printed lines, and the output pins OUT1 to OUT7 of the chip are connected to the power execution module through the second set of printed lines.
[0032] Furthermore, pin 9 of the OC gate driver chip is a common power supply pin COM, which is connected to the power supply terminal V_12V through a power supply trace. Pin 8 of the OC gate driver chip is a common ground pin, which is connected to GND through a low impedance ground trace.
[0033] Specifically, the power supply traces are thickened to a width of no less than 30 mil to reduce parasitic resistance and inductance, and to reduce voltage drop and switching noise voltage amplitude under high current. The grounding trace is a short and wide copper trace (width no less than 40 mil) connected to the main GND plane of the system with the lowest impedance path, providing the shortest and smoothest return path for drive current and noise. The OC gate driver chip has a built-in freewheeling diode between each OC gate output pin and the COM pin. The anode of the freewheeling diode is connected to the corresponding output pin, and the cathode of the freewheeling diode is connected to the COM pin. Its built-in structure eliminates the need for seven external discrete diodes, simplifies the PCB layout, and reduces material costs and assembly complexity.
[0034] The power execution module includes an electromagnetic relay, which is the final action execution unit of the circuit. It employs a multi-channel electromagnetic relay, model JZC-33F-1Z, with a coil nominal voltage of 12V. The first pin of the electromagnetic relay is connected to the power supply terminal V_12V of the drive power distribution and filtering module. The first pin of the electromagnetic relay is also connected to ground via capacitor C19. The second pin of the electromagnetic relay is connected to pin 16 of the OC gate driver chip.
[0035] Furthermore, when the main control unit outputs a high level to the IN1 pin of the OC gate driver chip, the first Darlington transistor inside the chip is saturated and turned on, pulling the potential of the OUT1 pin down to a low level close to GND, forming a drive current loop: the current flows out from the positive terminal of the +12V power supply, passes through the relay coil, flows into the OUT1 pin of the chip, passes through the fully turned-on Darlington transistor inside, and finally flows back to the power supply ground. The current drives the relay to generate a sufficient magnetic field, attracting the internal mechanical switch of the relay, thereby connecting or disconnecting the controlled external high-power load.
[0036] Specifically, the freewheeling protection process of the power execution module is a manifestation of solving the core technical problem. When the control signal of the main control unit changes from high level to low level, the Darlington transistor inside the OC gate driver chip quickly changes from the on state to the off state. Since the relay is a strongly inductive load, the sudden change in current will induce an extremely high reverse electromotive force at both ends of the coil. Its polarity is positive near the GND end and negative near the OUT1 end.
[0037] Furthermore, the freewheeling diode built into the OC gate driver chip automatically functions to provide a low-impedance discharge path for the back electromotive force. The current path is as follows: starting from the OUT1 connection terminal (positive terminal of the induced electromotive force) of the relay coil, flowing into the chip through the OUT1 pin, flowing to the COM pin through the built-in freewheeling diode, then returning to the V_12V power supply terminal, and finally flowing back to the power supply terminal of the relay coil, forming a complete energy discharge circuit. The circuit slowly releases the magnetic energy stored in the coil in the form of current and clamps the potential of the OUT1 pin at a safe level, effectively eliminating high voltage spikes, protecting the safety of the driver chip, and preventing back electromotive force noise from being coupled to other parts of the system through the power supply.
[0038] The drive power distribution and filtering module is responsible for providing stable and clean power to the core drive module and the power execution module. The drive power distribution and filtering module includes a hierarchical decoupling network and an energy storage capacitor. The input terminal of the drive power distribution and filtering module is connected to the +12V DC power supply V_12V provided by the external power adapter. The hierarchical decoupling network is used to deal with the instantaneous large current surge and accompanying high-frequency noise caused when the relays are simultaneously engaged or disengaged.
[0039] Specifically, a 100μF aluminum electrolytic capacitor is connected in parallel between the power supply terminal V_12V and GND of the drive power supply as an energy storage capacitor. The energy storage capacitor has a large equivalent series resistance (ESR) and equivalent series inductance (ESL). Its large capacity characteristic can store a large amount of charge. When multiple relays are simultaneously activated, generating a sudden large current demand of tens to hundreds of milliamps, the power adapter and line impedance may cause a voltage drop. The energy storage capacitor can quickly release the stored charge to compensate for the sudden current, thereby maintaining the stability of the power bus voltage and preventing system logic errors or relays not activating properly due to voltage drops.
[0040] Furthermore, a 100nF ceramic capacitor is connected in parallel between the common power supply pin (COM) and the common ground pin (GND) of the OC gate driver chip, close to the chip pin, as a decoupling capacitor. The ceramic capacitor has extremely low ESR and ESL and excellent high-frequency response characteristics. During the switching process of the Darlington transistor inside the OC gate driver chip and the freewheeling diode during the freewheeling process, a rich frequency spectrum of high-frequency switching noise is generated. The decoupling capacitor provides a local discharge path with extremely low impedance for the high-frequency noise, effectively confining the noise around the OC gate driver chip and preventing the noise from coupling to the global V_12V power network. The decoupling capacitor is placed close to the COM and GND pins of the OC gate driver chip, preferably directly connected by a through-hole between the chip power supply pin and the ground pin, to minimize the parasitic inductance of the high-frequency decoupling circuit and ensure that it can effectively filter out the high-frequency noise generated by the chip switching.
[0041] The status indication module provides users with intuitive feedback on the load operating status, including multiple parallel indication branches. Each indication branch consists of a 2kΩ surface mount resistor as a current limiting resistor (R1~R7) and a 0805 packaged green light-emitting diode (LED1~LED7). The positive terminal of the light-emitting diode is connected to the power supply terminal V_12V of the driving power supply, the negative terminal of the light-emitting diode is connected to the first end of the current limiting resistor, and the second end of the current limiting resistor is connected to the corresponding output pin (OUT1~OUT7) of the OC gate driver chip.
[0042] The operating logic of the status indication module is completely synchronized with the relay operation status. When a certain output of the OC gate driver chip is low (corresponding to the relay being activated), a complete indication circuit is formed. Current flows out from the positive terminal of the V_12V power supply, through the LED and the current-limiting resistor to the OUTx pin of the chip, and finally into GND through the internally conducting Darlington transistor. At this time, the LED lights up normally, intuitively showing that the load is energized. When the chip output returns to a high-impedance state (corresponding to the relay being released), the indication circuit is cut off, and the LED turns off because no current flows through it, accurately reflecting the load power-off state. This achieves complete synchronization between the indication status and the load power status, facilitating quick diagnosis of the system status by on-site debugging and maintenance personnel.
[0043] Working principle:
[0044] The main control unit of the signal control module generates digital control signals, which are transmitted to the input terminal of the OC gate driver chip of the core driver module through the first set of printed circuits. When the main control unit outputs a high level to a certain path (e.g., IN1) of the chip, the corresponding Darlington transistor inside the chip is saturated and turned on. When the main control unit outputs a high level signal to the driver chip, the Darlington transistor inside it enters the saturated and turned-on state, pulling the potential of the OUT1 output pin down to a low level close to GND, and simultaneously establishing two parallel current paths: one path forms a visual indication circuit through the LED indicator and the current limiting resistor, and the other path forms a load driving circuit through the relay coil. Both currents eventually flow into the internal conducting transistor of the chip to GND through the OUT1 pin, realizing the synchronous action of LED lighting and relay energizing. When the main control signal jumps to a low level, the Darlington transistor is immediately turned off, the OUT1 pin returns to a high impedance state, and the two parallel circuits are disconnected at the same time, completing the linkage control of load shutdown and indicator extinguishing. At this time, the above two circuits are cut off, the LED is turned off, and the relay coil is de-energized and released.
[0045] At the instant the relay coil is de-energized, its inductive characteristics cause a polarity reversal (OUT1 terminal is positive and the power supply terminal is negative). At this moment, the chip's built-in freewheeling diode immediately conducts, forming a freewheeling discharge circuit: the induced current starts from the OUT1 pin, is guided through the freewheeling diode to the COM pin, and finally returns to the V_12V power system. The circuit converts the magnetic energy stored in the coil into current to achieve a slow release, thereby effectively eliminating the destructive high voltage spikes generated during the switching process.
Claims
1. A relay drive circuit for an inkjet printer, characterized in that: It includes a signal control module, a core drive module, a power execution module, a drive power distribution and filtering module, and a status indication module; The signal control module is used to generate multiple digital control signals; The core driving module uses a multi-channel OC gate driver chip to receive the digital control signal and provide driving current and freewheeling discharge path. The power execution module is used to perform switching operations on the external load according to the drive current; The drive power distribution and filtering module is used to provide and distribute power to the core drive module and the power execution module. It also includes a hierarchical decoupling network to solve the power noise problem caused by rapid current changes, thereby ensuring the stability of the system. The status indication module includes multiple parallel indication branches for providing intuitive physical indication.
2. The relay drive circuit for an inkjet printer according to claim 1, characterized in that: The output terminal of the signal control module is connected to the input terminal of the OC gate driver chip through a first set of printed circuits. The output terminal of the OC gate driver chip is connected to the controlled terminal of the power execution module through a second set of printed circuits. The drive power output terminal of the drive power distribution and filtering module is connected to the common power pin of the OC gate driver chip. The common ground pin of the OC gate driver chip is connected to GND through a short and wide low-impedance ground trace. The common power pin of the OC gate driver chip is the COM pin, which is connected to the drive power output terminal of the drive power distribution and filtering module to form a complete freewheeling loop. The common ground pin of the OC gate driver chip is the GND pin.
3. The relay drive circuit for an inkjet printer according to claim 1, characterized in that: A freewheeling diode is integrated between each output pin of the OC gate driver chip and the common power supply pin of the OC gate driver chip. The anode of each freewheeling diode is connected to the corresponding output pin, and the cathode of each freewheeling diode is connected to the common power supply pin.
4. A relay drive circuit for an inkjet printer according to claim 1, characterized in that: The power execution module includes an electromagnetic relay. The first pin of the electromagnetic relay coil is connected to the drive power output terminal of the drive power distribution and filtering module, and the second pin of the electromagnetic relay coil is connected to one output pin of the OC gate driver chip, thereby forming a complete drive circuit.
5. A relay drive circuit for an inkjet printer according to claim 2, characterized in that: The hierarchical decoupling network includes an energy storage capacitor and a decoupling capacitor. The energy storage capacitor is connected between the drive power input port and ground, and the decoupling capacitor is connected nearby between the common power supply pin of the OC gate driver chip and GND.
6. A relay drive circuit for an inkjet printer according to claim 1, characterized in that: Each of the multiple parallel indicator branches includes a current-limiting resistor and a light-emitting diode (LED). The positive terminal of the LED is connected to the output terminal of the driving power distribution and filtering module, and the negative terminal of the LED is connected to the corresponding output pin of the OC gate driver chip through the current-limiting resistor.