A burner protection circuit
Patent Information
- Application Number
- CN202522069871.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-25
- Publication Date
- 2026-10-09
- Estimated Expiration
- 2035-09-25
AI Technical Summary
[0002]在电子设备生产和研发过程中，对集成电路(IC)进行程序烧录是关键环节，烧录器作为实现这一环节的核心设备，其性能直接影响烧录效率与安全性；目前，不同的IC因耐压程度不同，在烧录时常需要配置不同的烧录设备，使得成本增加的同时灵活性下降，同时对于烧录的限流保护需求处理常采用单一的保险丝设计，防护性能较差，为解决上述问题，需要设计一种具有多电压选择以及更高防护性能的烧录器，以提升烧录过程的稳定性与可靠性
[0026]本实用新型的有益效果在于：本申请将MCU单元、电压控制模块、限流保护电路、保险丝和烧录接口进行整合，不仅能够满足多档位电压调节的要求，同时兼顾了烧录口的通断控制，在保险丝的基础上增加了限流保护电路，使得其能够防止浪涌电流，避免保险丝长时间处于保护状态而损坏。
Smart Images
Figure CN224843126U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of programmer technology, and more specifically, to a programmer protection circuit. Background Technology
[0002] In the production and R&D of electronic devices, programming integrated circuits (ICs) is a critical step. As the core equipment for this step, the performance of the programmer directly affects the programming efficiency and security. Currently, different ICs have different voltage withstand levels, so different programming equipment is often required during programming, which increases costs and reduces flexibility. At the same time, the current limiting protection requirements for programming are often handled by a single fuse design, which has poor protection performance. To solve the above problems, it is necessary to design a programmer with multiple voltage options and higher protection performance to improve the stability and reliability of the programming process. Utility Model Content
[0003] The technical problem to be solved by this utility model is to provide a programmer protection circuit to address the above-mentioned deficiencies of the prior art.
[0004] The technical solution adopted by this utility model to solve its technical problem is:
[0005] A programmer protection circuit is constructed, comprising an MCU unit, a voltage control module, a current limiting protection circuit, a fuse, and a programming interface connected in sequence.
[0006] The voltage control module includes multiple voltage output ports and the output voltage value is controlled by the MCU unit;
[0007] The input terminal of the current limiting protection circuit is connected to multiple voltage output ports; the current limiting protection circuit is controlled by the MCU unit to prevent surge current.
[0008] One end of the fuse is connected to the output of the current limiting protection circuit, and the other end is connected to the programming interface.
[0009] The programmer protection circuit of this utility model includes a voltage control module comprising an adjustment sub-circuit, a first voltage level sub-circuit, and a second voltage level sub-circuit.
[0010] The regulating sub-circuit is connected to the MCU unit and is controlled by it to switch the outputs of the first voltage level sub-circuit and the second voltage level sub-circuit.
[0011] The programmer protection circuit of this utility model includes a first NMOS transistor, a second NMOS transistor, and a transistor in the regulating sub-circuit.
[0012] The gate (G) of the first NMOS transistor is connected to and controlled by the MCU unit, the source (S) of the first NMOS transistor is grounded, and the drain (D) of the first NMOS transistor is connected to the gate (G) of the second NMOS transistor and the base (B) of the transistor.
[0013] The collector (C) of the transistor is grounded, and the emitter (E) of the transistor is connected to the first voltage level sub-circuit.
[0014] The source (S) of the second NMOS transistor is grounded, and the drain (D) of the second NMOS transistor is connected to the second voltage level sub-circuit.
[0015] In the programmer protection circuit described in this utility model, the gate (G) of the first NMOS transistor is connected to a first resistor, and the other end of the first resistor is connected to a 3.3V power supply terminal; the drain (D) of the first NMOS transistor is connected to a second resistor, and the other end of the second resistor is connected to a 5V power supply terminal.
[0016] The programmer protection circuit of this utility model includes a first voltage level sub-circuit comprising a first PMOS transistor, a second PMOS transistor, a third resistor, and a fourth resistor.
[0017] The gate (G) of the first PMOS transistor is connected to the third resistor, the fourth resistor, and the gate (G) of the second PMOS transistor; the source (S) of the first PMOS transistor is connected to the other end of the fourth resistor and the source (S) of the second PMOS transistor; the drain (D) of the first PMOS transistor is connected to the 5V power supply terminal, and the drain of the second PMOS transistor is connected to the input terminal of the current limiting protection circuit; the other end of the third resistor is connected to the emitter (E) of the transistor.
[0018] The programmer protection circuit of this utility model includes a second voltage level sub-circuit comprising a third PMOS transistor, a fourth PMOS transistor, and a fifth resistor.
[0019] The gate (G) of the third PMOS transistor is connected to the fifth resistor, the gate (G) of the fourth PMOS transistor, and the drain (D) of the second NMOS transistor; the source (S) of the third PMOS transistor is connected to the other end of the fifth resistor and the source (S) of the fourth PMOS transistor; the drain (D) of the third PMOS transistor is connected to the 12V power supply terminal, and the drain (D) of the fourth PMOS transistor is connected to the input terminal of the current limiting protection circuit.
[0020] The programmer protection circuit of this utility model includes a current limiting protection circuit comprising a current limiting chip, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, and a sixth resistor.
[0021] The VIN pin of the current limiting chip is the input terminal of the current limiting protection circuit; the EN pin of the current limiting chip is connected to and controlled by the MCU unit.
[0022] The VIN pin of the current limiting chip is connected to the first capacitor, and the other end of the first capacitor is grounded; the SS pin of the current limiting chip is connected to the second capacitor, and the other end of the second capacitor is grounded; the GND pin of the current limiting chip is grounded; the VOUT pin of the current limiting chip is connected to the third capacitor and the fourth capacitor; the ISET pin of the current limiting chip is connected to the sixth resistor, and the other end of the sixth resistor is connected to the other end of the third capacitor and the other end of the fourth capacitor.
[0023] In the programmer protection circuit of this utility model, the VOUT pin of the current limiting chip is connected to the fuse, and the other end of the fuse is connected to the programming interface.
[0024] The programmer protection circuit of this utility model includes multiple programming interfaces, each of which is connected to the other end of the fuse.
[0025] The programmer protection circuit described in this utility model includes a current limiting chip, model APL3547A.
[0026] The beneficial effects of this utility model are as follows: This application integrates the MCU unit, voltage control module, current limiting protection circuit, fuse and programming interface, which can not only meet the requirements of multi-level voltage adjustment, but also take into account the on-off control of the programming port. The current limiting protection circuit is added to the fuse to prevent surge current and avoid the fuse from being damaged due to being in the protection state for a long time. Attached Figure Description
[0027] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the utility model will be further described below in conjunction with the accompanying drawings and embodiments. The drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0028] Figure 1 This is a schematic diagram of the programmer protection circuit of a preferred embodiment of the present invention.
[0029] Figure 2 This is a circuit diagram of the MCU unit of the programmer protection circuit of a preferred embodiment of the present invention;
[0030] Figure 3 This is a circuit diagram of the voltage control module of the programmer protection circuit of a preferred embodiment of the present invention.
[0031] Figure 4 This is a circuit diagram of the current limiting protection circuit of the programmer protection circuit of the preferred embodiment of this utility model;
[0032] Figure 5 This is a circuit diagram of the programming interface of the programmer protection circuit of the preferred embodiment of this utility model. Detailed Implementation
[0033] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, a clear and complete description will be provided below in conjunction with the technical solutions in the embodiments of this utility model. Obviously, the described embodiments are some, but not all, embodiments of this utility model. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.
[0034] The preferred embodiment of this utility model includes a programmer protection circuit, such as... Figure 1 As shown, see also Figures 2-5 It includes an MCU unit 1, a voltage control module 2, a current limiting protection circuit 3, a fuse 4, and a programming interface 5 connected in sequence;
[0035] Voltage control module 2 includes multiple voltage output ports and the output voltage value is controlled by MCU unit 1;
[0036] The input terminal of the current limiting protection circuit 3 is connected to multiple voltage output ports; the current limiting protection circuit 3 is controlled by the MCU unit 1 to prevent surge current.
[0037] One end of fuse 4 is connected to the output of current limiting protection circuit 3, and the other end is connected to programming interface 5;
[0038] This application integrates the MCU unit 1, voltage control module 2, current limiting protection circuit 3, fuse 4 and programming interface 5, which not only meets the requirements of multi-level voltage adjustment, but also takes into account the on / off control of the programming port. The current limiting protection circuit is added to the fuse to prevent surge current and avoid the fuse from being damaged due to being in the protection state for a long time.
[0039] like Figure 3 As shown, the voltage control module 2 includes an adjustment sub-circuit 20, a first voltage level sub-circuit 21, and a second voltage level sub-circuit 22.
[0040] The regulating sub-circuit 20 is connected to the MCU unit 1 and is controlled by it to switch the output of the first voltage level sub-circuit 21 and the second voltage level sub-circuit 22;
[0041] It can automatically or manually switch the corresponding output voltage according to the voltage requirements of the IC being programmed, adapting to the power supply requirements of different IC models and improving device compatibility.
[0042] Specifically, the regulating sub-circuit 20 includes a first NMOS transistor Q9, a second NMOS transistor Q8, and a transistor Q6;
[0043] The gate of the first NMOS transistor Q9 is connected to and controlled by the MCU unit. The source of the first NMOS transistor Q9 is grounded. The drain of the first NMOS transistor Q9 is connected to the gate of the second NMOS transistor Q8 and the base of the transistor Q6.
[0044] The collector (C) of transistor Q6 is grounded, and the emitter (E) of transistor Q6 is connected to the first voltage level sub-circuit.
[0045] The source (S) of the second NMOS transistor Q8 is grounded, and the drain (D) of the second NMOS transistor Q8 is connected to the second voltage level sub-circuit.
[0046] The gate of the first NMOS transistor Q9 is connected to a first resistor R33, and the other end of the first resistor R33 is connected to a 3.3V power supply terminal; the drain of the first NMOS transistor Q9 is connected to a second resistor R32, and the other end of the second resistor R32 is connected to a 5V power supply terminal.
[0047] The first voltage level sub-circuit includes a first PMOS transistor Q2, a second PMOS transistor Q3, a third resistor R31, and a fourth resistor R29;
[0048] The gate (G) of the first PMOS transistor Q2 is connected to the gate (G) of the third resistor R31, the fourth resistor R29, and the second PMOS transistor Q3; the source (S) of the first PMOS transistor Q2 is connected to the other end of the fourth resistor R29 and the source (S) of the second PMOS transistor Q3; the drain (D) of the first PMOS transistor Q2 is connected to the 5V power supply terminal, and the drain (D) of the second PMOS transistor Q3 is connected to the input terminal of the current limiting protection circuit; the other end of the third resistor R31 is connected to the emitter (E) of the transistor Q6.
[0049] The second voltage level sub-circuit includes the third PMOS transistor Q4, the fourth PMOS transistor Q5, and the fifth resistor R30;
[0050] The gate of the third PMOS transistor Q4 is connected to the fifth resistor R30, the gate of the fourth PMOS transistor Q5, and the drain of the second NMOS transistor Q8; the source of the third PMOS transistor Q4 is connected to the other end of the fifth resistor R30 and the source of the fourth PMOS transistor Q5; the drain of the third PMOS transistor Q4 is connected to the 12V power supply terminal, and the drain of the fourth PMOS transistor Q5 is connected to the input terminal of the current limiting protection circuit.
[0051] The operating principle is as follows: The MCU controls pin 1 of Q9. When the level is high, Q6 is turned on and Q8 is turned off, thereby turning on Q2 and Q3, and the voltage of APL3547_VIN switches to VCC_5V; when the level is low, Q6 is turned off and Q8 is turned on, thereby turning on Q4 and Q5, and the voltage of APL3547_VIN switches to VCC_12V.
[0052] It should be noted that the voltage control module circuit described above is only an implementation example. Those skilled in the art can also use other existing adjustment circuits to replace it. The solution obtained by replacing the conventional circuit is also within the scope of protection of this application.
[0053] like Figure 4 As shown, the current limiting protection circuit 3 includes a current limiting chip U6, a first capacitor Cvin1, a second capacitor Css1, a third capacitor Cvout1, a fourth capacitor C30, and a sixth resistor Riset1.
[0054] The VIN pin of the current limiting chip is the input terminal of the current limiting protection circuit; the EN pin of the current limiting chip is connected to and controlled by the MCU unit.
[0055] The VIN pin of the current limiting chip is connected to the first capacitor Cvin1, and the other end of the first capacitor Cvin1 is grounded; the SS pin of the current limiting chip is connected to the second capacitor Css1, and the other end of the second capacitor Css1 is grounded; the GND pin of the current limiting chip is grounded; the VOUT pin of the current limiting chip is connected to the third capacitor Cvout1 and the fourth capacitor C30; the ISET pin of the current limiting chip is connected to the sixth resistor Riset1, and the other end of the sixth resistor Riset1 is connected to the other end of the third capacitor Cvout1 and the other end of the fourth capacitor C30; the VOUT pin of the current limiting chip is connected to the fuse (…). Figure 4 The fuse, designated as F1, is connected to the programming interface at the other end. Preferably, the current limiting chip is model APL3547A (model is for example only and is not intended to limit).
[0056] The soft-start time can be set to prevent surge current. Adding an extra current-limiting protection U6 can prevent the fuse F1 from being damaged due to prolonged protection. At the same time, the MCU controls U6's EN to open the VOUT path only when the burning button is clicked.
[0057] like Figure 5 As shown, there are multiple programming interfaces 5, and each programming interface 5 is connected to the other end of the fuse 4; equipped with 4 programming ports, it can connect multiple ICs to be programmed at the same time, support batch programming operations, improve programming efficiency, and meet the needs of multiple devices processing at the same time.
[0058] It should be understood that those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.
Claims
1. A programmer protection circuit, characterized in that, This includes an MCU unit, a voltage control module, a current limiting protection circuit, a fuse, and a programming interface connected in sequence. The voltage control module includes multiple voltage output ports and the output voltage value is controlled by the MCU unit; The input terminal of the current limiting protection circuit is connected to multiple voltage output ports; the current limiting protection circuit is controlled by the MCU unit to prevent surge current. One end of the fuse is connected to the output terminal of the current limiting protection circuit, and the other end is connected to the programming interface.
2. The programmer protection circuit according to claim 1, characterized in that, The voltage control module includes an adjustment sub-circuit, a first voltage level sub-circuit, and a second voltage level sub-circuit. The regulating sub-circuit is connected to the MCU unit and is controlled by it to switch the outputs of the first voltage level sub-circuit and the second voltage level sub-circuit.
3. The programmer protection circuit according to claim 2, characterized in that, The regulating sub-circuit includes a first NMOS transistor, a second NMOS transistor, and a transistor; The gate (G) of the first NMOS transistor is connected to and controlled by the MCU unit, the source (S) of the first NMOS transistor is grounded, and the drain (D) of the first NMOS transistor is connected to the gate (G) of the second NMOS transistor and the base (B) of the transistor. The collector (C) of the transistor is grounded, and the emitter (E) of the transistor is connected to the first voltage level sub-circuit. The source (S) of the second NMOS transistor is grounded, and the drain (D) of the second NMOS transistor is connected to the second voltage level sub-circuit.
4. The programmer protection circuit according to claim 3, characterized in that, The gate (G) of the first NMOS transistor is connected to a first resistor, and the other end of the first resistor is connected to a 3.3V power supply terminal; the drain (D) of the first NMOS transistor is connected to a second resistor, and the other end of the second resistor is connected to a 5V power supply terminal.
5. The programmer protection circuit according to claim 3, characterized in that, The first voltage level sub-circuit includes a first PMOS transistor, a second PMOS transistor, a third resistor, and a fourth resistor; The gate (G) of the first PMOS transistor is connected to the third resistor, the fourth resistor, and the gate (G) of the second PMOS transistor; the source (S) of the first PMOS transistor is connected to the other end of the fourth resistor and the source (S) of the second PMOS transistor; the drain (D) of the first PMOS transistor is connected to the 5V power supply terminal, and the drain of the second PMOS transistor is connected to the input terminal of the current limiting protection circuit; the other end of the third resistor is connected to the emitter (E) of the transistor.
6. The programmer protection circuit according to claim 3, characterized in that, The second voltage level sub-circuit includes a third PMOS transistor, a fourth PMOS transistor, and a fifth resistor; The gate (G) of the third PMOS transistor is connected to the fifth resistor, the gate (G) of the fourth PMOS transistor, and the drain (D) of the second NMOS transistor; the source (S) of the third PMOS transistor is connected to the other end of the fifth resistor and the source (S) of the fourth PMOS transistor; the drain (D) of the third PMOS transistor is connected to the 12V power supply terminal, and the drain (D) of the fourth PMOS transistor is connected to the input terminal of the current limiting protection circuit.
7. The programmer protection circuit according to any one of claims 1-6, characterized in that, The current limiting protection circuit includes a current limiting chip, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, and a sixth resistor; The VIN pin of the current limiting chip is the input terminal of the current limiting protection circuit; the EN pin of the current limiting chip is connected to and controlled by the MCU unit. The VIN pin of the current limiting chip is connected to the first capacitor, and the other end of the first capacitor is grounded; the SS pin of the current limiting chip is connected to the second capacitor, and the other end of the second capacitor is grounded; the GND pin of the current limiting chip is grounded; the VOUT pin of the current limiting chip is connected to the third capacitor and the fourth capacitor; the ISET pin of the current limiting chip is connected to the sixth resistor, and the other end of the sixth resistor is connected to the other end of the third capacitor and the other end of the fourth capacitor.
8. The programmer protection circuit according to claim 7, characterized in that, The VOUT pin of the current limiting chip is connected to the fuse, and the other end of the fuse is connected to the programming interface.
9. The programmer protection circuit according to claim 8, characterized in that, The programmable interface is provided in multiple ways, and each of the multiple programmable interfaces is connected to the other end of the fuse.
10. The programmer protection circuit according to claim 8, characterized in that, The current limiting chip is model APL3547A.