An under-voltage protection circuit based on a battery management system

Abstract

The utility model discloses an under -voltage protection circuit based on battery management system concretely relates to battery management system field, including battery group, the positive pole of battery group is connected first stabilivolt D2 through diode D1, the cathode of first stabilivolt D2 connects the S pole of PMOS transistor Q1, the anode of first stabilivolt D2 is connected NMOS transistor Q2's G pole through resistance R4 and resistance R5, be provided with resistance R3 between NMOS transistor Q2 and PMOS transistor Q1, PMOS transistor Q1 is connected with second stabilivolt D4 through resistance R1 and diode D3, the utility model discloses simple structure, low cost, power consumption is extremely low and has the under -voltage protection circuit of excellent hysteresis characteristic, has broad application prospect in multiple application fields such as automobile battery management system, portable electronic equipment and industrial energy storage system.

Description

Technical Field

[0001] This utility model relates to the field of battery management system technology, specifically to an undervoltage protection circuit based on a battery management system. Background Technology

[0002] As the core energy storage unit of modern electronic devices and power systems, the safe, efficient, and long-life operation of batteries is crucial to the stability of the entire system. Over-discharging (undervoltage) of a battery can cause irreversible damage to its internal chemical structure, manifesting as capacity decay, increased internal resistance, and shortened lifespan, and in severe cases, may even lead to safety accidents. Therefore, undervoltage protection (UVP) is a fundamental and core functional requirement in battery management systems (BMS).

[0003] Currently, undervoltage protection technologies for different application scenarios have their own characteristics and limitations: 1. In automotive battery management systems (BMS), highly integrated analog front-end (AFE) chips (such as Texas Instruments' BQ series or Analog Devices' LTC series) are typically used in conjunction with microcontrollers (MCUs) to implement multiple protection functions, including undervoltage protection. These AFE chips can provide high-precision individual cell voltage measurements, but their own power consumption and the complexity of peripheral circuits can lead to higher overall static power consumption of the BMS, affecting power consumption when the vehicle is stationary. Furthermore, automotive-grade AFE chips are relatively expensive, putting pressure on overall vehicle cost control. In addition, some BMS designs still have room for improvement in terms of undervoltage protection response speed and adaptability under extreme operating conditions. 2. In portable electronic devices (such as smartphones, tablets, and wearable devices), the requirements for power consumption and size are extremely stringent. Undervoltage protection is typically integrated into dedicated lithium battery protection ICs or power management units (PMUs). These ICs are usually low-cost and small in size, but the accuracy of their protection thresholds may be limited by the performance of internal references and comparators, and are susceptible to temperature variations. Although some low-cost solutions have optimized static power consumption, there is still room for further reduction for devices that require ultra-long standby times. National standards such as GB 31241 have clear requirements for undervoltage protection parameters for lithium-ion batteries used in portable electronic products. Achieving high-precision, low-power protection at low cost remains a continuous challenge. 3. In industrial energy storage systems (such as grid-side energy storage and residential energy storage), the battery packs are large-scale with numerous cells, placing extremely high demands on the reliability, safety, and lifespan management of the Battery Management System (BMS). Undervoltage protection, as a fundamental line of defense ensuring the safe operation of the energy storage system, requires high precision and high reliability. Existing solutions may employ modular designs, implemented through a multi-level BMS architecture. However, in large-scale deployments, the cumulative power consumption of the BMS units themselves cannot be ignored, and high-precision detection typically implies higher hardware costs. How to optimize the power consumption and cost of individual protection units while ensuring system-level safety is a crucial issue in the field of industrial energy storage BMS.

[0004] In summary, existing technical solutions generally face one or more of the following defects and shortcomings in different application contexts: Power consumption issue: Some circuits have excessively high quiescent current in standby or normal operation, posing a challenge for long battery life and low self-power consumption scenarios. For example, the operating current of some general-purpose comparators or unoptimized MCUs may be in the mA range; Cost issues: Achieving high-precision and high-reliability protection often relies on expensive dedicated chips or complex combinations of components, which increases the overall cost of the solution and limits its application in cost-sensitive markets. Circuit complexity: Traditional undervoltage protection circuits typically require multiple components such as comparators, reference voltage sources, and hysteresis networks, resulting in a complex circuit structure that not only increases the number of potential failure points but also raises manufacturing and maintenance costs. Insufficient switching stability: When the battery voltage is close to the threshold point, voltage fluctuations may cause the protection circuit to switch states frequently, reducing system stability and potentially increasing component stress.

[0005] Therefore, developing an undervoltage protection circuit that is simple in structure, has few components, low cost, low power consumption, and good hysteresis characteristics is of great significance for improving the overall performance and reliability of the battery management system. Summary of the Invention

[0006] The purpose of this invention is to provide an undervoltage protection circuit based on a battery management system to solve the problems mentioned in the background art.

[0007] To achieve the above objectives, this utility model provides the following technical solution: An undervoltage protection circuit based on a battery management system includes a battery pack. The positive terminal of the battery pack is connected to a first Zener diode D2 via a diode D1. The cathode of the first Zener diode D2 is connected to the source (S) terminal of a PMOS transistor Q1. The anode of the first Zener diode D2 is connected to the gate (G) terminal of an NMOS transistor Q2 via resistors R4 and R5. A resistor R3 is provided between the NMOS transistor Q2 and the PMOS transistor Q1. The PMOS transistor Q1 is connected to a second Zener diode D4 via resistor R1 and diode D3.

[0008] In a preferred embodiment, the negative terminal of the battery pack is connected to resistors R7, R8, and R6, and the resistors R7, R8, and R6 are connected in parallel.

[0009] In a preferred embodiment, the resistor R8 is connected in series with the second Zener diode D4, and the PMOS transistor Q1 is connected in parallel with a resistor R2.

[0010] In a preferred embodiment, the voltage regulation value of the first Zener diode D2 is higher than that of the first Zener diode D4, and the difference in voltage regulation value between the first Zener diode D2 and the second Zener diode D4 forms a hysteresis window.

[0011] In a preferred embodiment, the gate of the PMOS transistor Q1 is controlled by turning off the NMOS transistor Q2, and the gate of the NMOS transistor Q2 is driven by turning on the first Zener diode D2 and the second Zener diode D4. The two work together to form a switch control circuit.

[0012] In a preferred embodiment, the first Zener diode D2, the second Zener diode D4, the PMOS transistor Q1, and the NMOS transistor Q2 are all packaged using a micro-packaging process.

[0013] Compared with the prior art, the beneficial effects of this utility model are as follows: (1) The dual Zener diode differential scheme adopted in this utility model does not require comparators, reference voltage sources and complex control logic circuits, and the number of components is greatly reduced. A typical implementation only requires 2 Zener diodes, 2 transistors, a number of resistors, diodes and capacitors. The simplified circuit structure reduces the PCB area requirement and the wiring complexity, making it particularly suitable for portable devices with limited space. The reduction of components also means a reduction in potential failure points, which improves the overall reliability of the system. (2) The Zener diode of this utility model consumes only a small current (usually at the microamp level) under normal working conditions, which is far lower than the traditional comparator solution. It does not require continuous monitoring by MCU or dedicated IC, thus avoiding the additional static power consumption caused by these devices. The combination of PMOS transistor and NMOS transistor has extremely low on-resistance in the fully on state, which reduces power loss. Depending on the actual application and component selection, the overall static current can be controlled to a level as low as a few microamps, which greatly extends the standby time of the battery. (3) This utility model uses standard Zener diodes and transistor components, eliminating the need for dedicated ICs or high-precision comparators, which significantly reduces material costs. The simplified PCB design reduces manufacturing costs and assembly complexity. According to market research and cost assessment, compared with traditional solutions, the raw material costs of this solution can be reduced by up to 60%-70%. (4) By selecting appropriate Zener diode parameters, the width of the hysteresis window (such as 0.1V, 0.2V or larger) can be precisely customized to meet the needs of different application scenarios. The hysteresis characteristics are determined by the inherent characteristics of the Zener diode and do not depend on the accuracy of the external resistor network. The stability is higher. The excellent hysteresis characteristics effectively avoid frequent switching when the battery voltage fluctuates near the threshold, reduce the impact on the battery and load, and extend the system life. (5) By replacing the Zener diode combination with different parameters, the protection threshold can be easily adjusted to meet the characteristic requirements of different types of batteries. It is not sensitive to temperature changes and can maintain stable operation in a wide temperature range. The simple circuit structure makes it easy to integrate into a larger battery management system or to be used as an independent module. Attached Figure Description

[0014] The accompanying drawings are provided to further illustrate the present invention and form part of the specification. They are used together with the embodiments of the present invention to explain the present invention, but do not constitute a limitation thereof. In the drawings: Figure 1 This is a schematic diagram of the circuit principle structure of this utility model; Figure 2 This is a hysteresis characteristic curve of the undervoltage protection circuit of this utility model; Figure 3 This is a performance comparison diagram between the undervoltage protection circuit of this utility model and the traditional undervoltage protection circuit. Detailed Implementation

[0015] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0016] Please see Figures 1-3 This utility model provides an undervoltage protection circuit based on a battery management system, the technical solution of which is as follows: An undervoltage protection circuit based on a battery management system includes a battery pack. The positive terminal of the battery pack is connected to a first Zener diode D2 via a diode D1. The cathode of the first Zener diode D2 is connected to the source (S) terminal of a PMOS transistor Q1. The anode of the first Zener diode D2 is connected to the gate (G) terminal of an NMOS transistor Q2 via resistors R4 and R5. A resistor R3 is provided between the NMOS transistor Q2 and the PMOS transistor Q1. The PMOS transistor Q1 is connected to a second Zener diode D4 via resistor R1 and diode D3.

[0017] In a preferred embodiment, the negative terminal of the battery pack is connected to resistors R7, R8, and R6, and these resistors are connected in parallel. Resistor R8 is connected in series with the second Zener diode D4, and resistor R2 is connected in parallel with the PMOS transistor Q1. Multiple resistors are used to balance static power consumption and circuit response speed. Multiple resistors are responsible for providing operating current to the Zener diode. The larger the value of the resistor, the lower the static power consumption.

[0018] In a preferred embodiment, the voltage regulation value of the first Zener diode D2 is higher than that of the first Zener diode D4. The difference between the voltage regulation values ​​of the first Zener diode D2 and the second Zener diode D4 forms a hysteresis window. The difference in voltage regulation values ​​between the two Zener diodes can be selected according to application requirements to provide an appropriate hysteresis window width, preventing the circuit from oscillating near the threshold point. The circuit's turn-on voltage threshold and undervoltage shutdown voltage threshold can be adjusted by changing the combination of Zener diodes with different parameters. This allows for adaptation to the protection requirements of different battery types without modifying the circuit structure. For portable devices, the hysteresis window can be appropriately narrowed to make fuller use of the battery capacity. In automotive environments, power fluctuations are significant, so a wider hysteresis window can be designed to enhance the circuit's stability in harsh environments. However, this requires the addition of a transient voltage suppressor diode (TVS) protection circuit to prevent damage to the circuit from potential power spikes and transient overvoltages in the automotive environment.

[0019] In a preferred embodiment, the gate of the PMOS transistor Q1 is controlled by the turn-off of the NMOS transistor Q2, and the gate of the NMOS transistor Q2 is driven by the conduction of the first Zener diode D2 and the second Zener diode D4. The two work together to form a switch control circuit. When turned on, the PMOS transistor Q1 conducts. At this time, the battery pack controls the switching of the NMOS transistor Q2 by connecting the second Zener diode D4 to the gate of the NMOS transistor Q2, thereby controlling the switching of the PMOS transistor Q1. The first Zener diode D2 controls the turn-on voltage of the PMOS transistor Q1, and the second Zener diode D4 controls the turn-off voltage of the PMOS transistor Q1. The hysteresis window between the two is determined by the difference between the first Zener diode D2 and the second Zener diode D4. The remaining components, such as anti-reverse current diodes, voltage divider and current limiting resistors, and dummy loads, can be adjusted as needed.

[0020] In a preferred embodiment, the first Zener diode D2, the second Zener diode D4, the PMOS transistor Q1, and the NMOS transistor Q2 are all packaged using a micro-packaging process, specifically using SOD-323, SOT-23, or other packaging processes, to reduce the PCB footprint and meet the miniaturization requirements of portable devices.

[0021] The working principle of this utility model is as follows: For example, the first Zener diode D2 is selected with a higher Zener voltage (e.g., 3.0V), responsible for determining the circuit's turn-on voltage threshold; the second Zener diode D4 is selected with a lower Zener voltage (e.g., 2.8V), responsible for determining the circuit's turn-off voltage threshold. The difference in their Zener voltages (e.g., 0.2V) constitutes the circuit's hysteresis window. The battery voltage is higher than the voltage regulation value of the first Zener diode (e.g., 3.0V). When the battery voltage is sufficient and higher than the regulated value of the first Zener diode D2, the first Zener diode D2 enters the regulated state. After the voltage is divided by the voltage divider resistor, the NMOS transistor Q2 turns on. This causes the voltage difference between the gate and source of the PMOS transistor Q1 to reach its turn-on voltage, and the PMOS transistor Q1 turns on, and the circuit enters the normal open state. The battery voltage is lower than the voltage regulation value of the second Zener diode (e.g., 2.8V). When the battery voltage drops below the regulation value of the second Zener diode D4, D4 stops regulating the voltage, causing the Vgs voltage of NMOS transistor Q2 to fall below the threshold voltage, resulting in NMOS transistor Q2 turning off. Simultaneously, the first Zener diode D2 also stops regulating the voltage, preventing NMOS transistor Q2 from turning on. This causes the voltage difference between the gate and source of PMOS transistor Q1 to fall below its threshold voltage requirement, preventing PMOS transistor Q1 from conducting. With both transistors off, Vout output is 0, protecting the battery from over-discharge. The battery voltage is between two regulated values ​​(e.g., 2.8V-3.0V). When the battery voltage is between the regulated voltage of the second Zener diode D4 and the regulated voltage of the first Zener diode D2, the circuit state depends on the direction of the battery voltage change. If the battery voltage drops from above 3.0V to this range, the circuit remains on; if the battery voltage rises from below 2.8V to this range, the circuit remains off. This constitutes a natural hysteresis mechanism, preventing the circuit from frequently switching states near the critical voltage.

[0022] Finally, it should be noted that the above description is merely a preferred embodiment of this utility model and is not intended to limit the utility model. Although the utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the protection scope of this utility model.

Claims

1. An undervoltage protection circuit based on a battery management system, comprising a battery pack, characterized in that: The positive terminal of the battery pack is connected to the first Zener diode D2 through diode D1. The cathode of the first Zener diode D2 is connected to the source terminal of PMOS transistor Q1. The anode of the first Zener diode D2 is connected to the gate terminal of NMOS transistor Q2 through resistors R4 and R5. A resistor R3 is provided between the NMOS transistor Q2 and the PMOS transistor Q1. The PMOS transistor Q1 is connected to the second Zener diode D4 through resistor R1 and diode D3. The negative terminal of the battery pack is connected to resistors R7, R8 and R6, and the resistors R7, R8 and R6 are connected in parallel. The resistor R8 is connected in series with the second Zener diode D4, and the PMOS transistor Q1 is connected in parallel with a resistor R2.

2. The undervoltage protection circuit based on a battery management system according to claim 1, characterized in that: The voltage regulation value of the first Zener diode D2 is higher than that of the second Zener diode D4, and the difference between the voltage regulation values ​​of the first Zener diode D2 and the second Zener diode D4 forms a hysteresis window.

3. The undervoltage protection circuit based on a battery management system according to claim 2, characterized in that: The gate of the PMOS transistor Q1 is controlled by turning off the NMOS transistor Q2, and the gate of the NMOS transistor Q2 is driven by turning on the first Zener diode D2 and the second Zener diode D4. The two work together to form a switch control circuit.

4. The undervoltage protection circuit based on a battery management system according to claim 1, characterized in that: The first Zener diode D2, the second Zener diode D4, the PMOS transistor Q1, and the NMOS transistor Q2 are all packaged using a micro-packaging process.

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