A type i three-level inverter and power system

Abstract

The application discloses a type I three-level inverter and a power system, which comprises a first switch tube, a second switch tube, a third switch tube, a fourth switch tube, a first clamping tube and a second clamping tube; the first switch tube and the fourth switch tube are two outer tubes, and the second switch tube and the third switch tube are two inner tubes; two ends of each outer tube are connected in parallel with a corresponding unidirectional conduction circuit, and / or two ends of each inner tube are connected in parallel with a corresponding unidirectional conduction circuit; the conduction direction of the unidirectional conduction circuit corresponding to the outer tube is from a direct current negative electrode to a direct current positive electrode, and the conduction direction of the unidirectional conduction circuit corresponding to the inner tube is from the direct current positive electrode to the direct current negative electrode, so that the damage of lightning voltage to the inner tube can be reduced.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, specifically to a type I three-level inverter and power system. Background Technology

[0002] In practical applications, inverters have long external cables that are exposed to the external environment, thus requiring surge protection design. For a Type I three-level inverter, the bridge arm includes an inner tube and an outer tube. The inner tube lacks a DC bus capacitor for voltage clamping. Therefore, under certain circumstances, surge voltages may damage the inner tube. Utility Model Content

[0003] In view of this, this application provides a Type I three-level inverter and power system that can reduce the damage of surge voltage to the internal tube.

[0004] This application provides a type I three-level inverter, including: a unidirectional conduction circuit, a first clamping transistor, a second clamping transistor, a first switching transistor, a second switching transistor, a third switching transistor, and a fourth switching transistor; the first and fourth switching transistors are two external transistors, and the second and third switching transistors are two internal transistors;

[0005] The first terminal of the first switching transistor is connected to the positive DC terminal. The first terminal of the second switching transistor is connected to the second terminal of the first switching transistor. The second terminal of the second switching transistor is connected to the first terminal of the third switching transistor. The second terminal of the third switching transistor is connected to the first terminal of the fourth switching transistor. The second terminal of the fourth switching transistor is connected to the negative DC terminal. The two ends of the first clamping transistor are respectively connected to the second terminal of the first switching transistor and the first terminal of the second clamping transistor. The second terminal of the second clamping transistor is connected to the first terminal of the fourth switching transistor.

[0006] Each outer tube has a corresponding unidirectional conduction circuit connected in parallel at both ends, and / or each inner tube has a corresponding unidirectional conduction circuit connected in parallel at both ends. The conduction direction of the unidirectional conduction circuit corresponding to the outer tube is from the DC negative terminal to the DC positive terminal, and the conduction direction of the unidirectional conduction circuit corresponding to the inner tube is from the DC positive terminal to the DC negative terminal.

[0007] One possible implementation is that the unidirectional conduction circuit includes: a first unidirectional conduction circuit and a second unidirectional conduction circuit;

[0008] The first unidirectional conduction circuit is connected in parallel across the first switching transistor. The first unidirectional conduction circuit conducts when the voltage at the second terminal of the first switching transistor is higher than the voltage at the first terminal of the first switching transistor.

[0009] The second unidirectional conduction circuit is connected in parallel across the fourth switching transistor. The second unidirectional conduction circuit conducts when the voltage at the second terminal of the fourth switching transistor is higher than the voltage at the first terminal of the fourth switching transistor.

[0010] One possible implementation is that the first unidirectional conduction circuit includes a first diode and a first capacitor connected in series, and the second unidirectional conduction circuit includes a second diode and a second capacitor connected in series.

[0011] In one possible implementation, the first unidirectional conduction circuit further includes a first resistor connected in parallel with the first capacitor; the second unidirectional conduction circuit further includes a second resistor connected in parallel with the second capacitor.

[0012] One possible implementation is that the first diode is a transient voltage suppressor diode; the second diode is a transient voltage suppressor diode.

[0013] One possible implementation is that the unidirectional conduction circuit includes: a third unidirectional conduction circuit and a fourth unidirectional conduction circuit;

[0014] The third unidirectional conduction circuit is connected in parallel across the two ends of the second switch. The third unidirectional conduction circuit conducts when the voltage at the first end of the second switch is higher than the voltage at the second end of the second switch.

[0015] The fourth unidirectional conduction circuit is connected in parallel across the third switching transistor. The fourth unidirectional conduction circuit conducts when the voltage at the first terminal of the third switching transistor is higher than the voltage at the second terminal of the third switching transistor.

[0016] One possible implementation is that the third unidirectional conduction circuit includes a third diode and a third capacitor connected in series, and the fourth unidirectional conduction circuit includes a fourth diode and a fourth capacitor connected in series.

[0017] One possible implementation is that the third diode is a transient voltage suppressor diode; the fourth diode is a transient voltage suppressor diode.

[0018] One possible implementation is that the first clamping transistor and the second clamping transistor include: a first clamping diode and a second clamping diode;

[0019] The cathode of the first clamping diode is connected to the second terminal of the first switching transistor, the anode of the first clamping diode is connected to the cathode of the second clamping diode, and the anode of the second clamping diode is connected to the first terminal of the fourth switching transistor.

[0020] One possible implementation is that the first clamping transistor and the second clamping transistor include: a first clamping switch transistor and a second clamping switch transistor;

[0021] The first end of the first clamping switch is connected to the second end of the first switch, the second end of the first clamping switch is connected to the first end of the second clamping switch, and the second end of the second clamping switch is connected to the first end of the fourth switch.

[0022] This application also provides a power system including the inverter described above, wherein the inverter is a single-phase inverter or a multi-phase inverter.

[0023] The inverter provided in this application includes a bridge arm circuit and two clamping transistors. The bridge arm circuit includes a first to a fourth switching transistor connected in series, wherein the first and fourth switching transistors are external transistors, and the second and third switching transistors are internal transistors. A unidirectional conduction circuit is connected in parallel with at least one of the external and internal transistors. The parallel unidirectional conduction circuit can increase the parasitic capacitance of the parallel-connected switching transistors. When a lightning strike occurs, for example, the lightning voltage on the first parasitic capacitance corresponding to the first terminal of the second switching transistor will be discharged through the first unidirectional conduction circuit. This can divert the discharge current of the parasitic capacitance, preventing the discharge current from flowing through the capacitance between the collector and emitter of the second switching transistor, and preventing the voltage rise of the second switching transistor from being too high. Similarly, the lightning voltage on the second parasitic capacitance corresponding to the second terminal of the third switching transistor will be discharged through the second unidirectional conduction circuit. This can prevent the voltage rise of the third switching transistor from being too high, thereby reducing the voltage borne by the two internal transistors and reducing the risk of the internal transistors being overvoltage-damped. Attached Figure Description

[0024] Figure 1 A schematic diagram of a type I three-level inverter provided in an embodiment of this application;

[0025] Figure 2 A schematic diagram of yet another type I three-level inverter provided in the embodiments of this application;

[0026] Figure 3 A schematic diagram of another type I three-level inverter provided in the embodiments of this application;

[0027] Figure 4 The clamping transistor of the type I three-level inverter provided in this application embodiment is a diode;

[0028] Figure 5 A schematic diagram of a unidirectional conduction circuit including a resistor, provided for an embodiment of this application;

[0029] Figure 6 A schematic diagram showing the unidirectional conduction circuit in the inner tube of the type I three-level inverter provided in the embodiments of this application;

[0030] Figure 7 A schematic diagram of another type I three-level inverter provided in the embodiments of this application;

[0031] Figure 8 A schematic diagram of another type I three-level inverter provided in the embodiments of this application;

[0032] Figure 9 This is a schematic diagram of another type I three-level inverter provided in the embodiments of this application. Detailed Implementation

[0033] To facilitate understanding, the architecture of a Type I three-level inverter will be introduced first. Type I three-level refers to the series connection of switches on the bridge arm forming an "I" shape. The switches on the bridge arm include two external switches and two internal switches. (See also...) Figure 1 This figure is a schematic diagram of a type I three-level inverter provided in an embodiment of this application.

[0034] An embodiment of this application provides a type I three-level inverter, comprising: a first clamping transistor, a second clamping transistor, a first switching transistor Q1, a second switching transistor Q2, a third switching transistor Q3, and a fourth switching transistor Q4.

[0035] The outer tube includes a first switch Q1 and a fourth switch Q4, and the inner tube includes a second switch Q2 and a third switch Q3.

[0036] The first terminal of the first switch Q1 is connected to the DC positive terminal. The first terminal of the second switch Q2 is connected to the second terminal of the first switch Q1. The second terminal of the second switch Q2 is connected to the first terminal of the third switch Q3. The second terminal of the third switch Q3 is connected to the first terminal of the fourth switch Q4. The second terminal of the fourth switch Q4 is connected to the DC negative terminal.

[0037] The following explanation will take an active clamping transistor as an example. Figure 1 The inverter shown is an active neutral-point clamped (ANPC) inverter. The first clamping transistor and the second clamping transistor are the first clamping switch Q5 and the second clamping switch Q6, respectively.

[0038] The first end of the first clamping switch Q5 is connected to the second end of the first switch Q1, the second end of the first clamping switch Q5 is connected to the first end of the second clamping switch Q6, and the second end of the second clamping switch Q6 is connected to the first end of the fourth switch Q4.

[0039] The inverter also includes a first bus capacitor C11 and a second bus capacitor C12. The first bus capacitor C11 is connected between the DC positive terminal and the DC midpoint, and the second bus capacitor C12 is connected between the DC negative terminal and the DC midpoint. The second terminal of the first clamping switch Q5 is connected to the DC midpoint.

[0040] Taking a positive lightning strike occurring at the DC positive terminal as an example, a first parasitic capacitance C3 exists between the first terminal of the second switch Q2 and ground. This first parasitic capacitance C3 is not an actual connected capacitor, but rather a parasitic capacitance generated to ground. In the event of a lightning strike on the inverter under load, the most dangerous scenario is when the first switch Q1 and the second switch Q2 are turned off, and the third switch Q3 and the fourth switch Q4 are turned on. The collector C of the first switch Q1 and the emitter E of the second switch Q2 are clamped by the bus voltage. The bus voltage is divided between the first switch Q1 and the second switch Q2, so the uneven voltage division between them makes them prone to breakdown. In this case, the third switch Q3 and the fourth switch Q4 are turned on, therefore there is no risk. It should be understood that when an inverter is subjected to a lightning strike, there is another scenario where the first switch Q1 and the second switch Q2 are turned on, while the third switch Q3 and the fourth switch Q4 are turned off. The uneven voltage distribution between the third switch Q3 and the fourth switch Q4 makes them prone to breakdown. The principle is similar and will not be elaborated here.

[0041] In related technologies, to protect the inner tube from breakdown during lightning strikes, capacitors are connected in parallel across the inner tube, or a capacitor and a resistor are connected in series and then in parallel across the inner tube. However, this increases losses during normal inverter operation and also causes heat dissipation problems. Modifying the components themselves by using higher voltage-rated switching transistors makes component selection difficult and expensive. Adding a parallel capacitor to the clamping transistor also introduces losses.

[0042] Therefore, in order to solve the problem of inner tube breakdown during lightning strikes without causing additional losses, the inverter provided in this application embodiment has a unidirectional conduction circuit connected in parallel across both ends of each outer tube. When the inverter is working normally, the unidirectional conduction circuit does not work and automatically disconnects. Only when a lightning strike occurs does it provide a discharge path for the lightning current to the inner tube, reducing the voltage borne by the inner tube and thus reducing the risk of the inner tube being broken down due to overvoltage.

[0043] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the embodiments of this application will be further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0044] This application provides a type I three-level inverter, comprising: a unidirectional conduction circuit, a first clamping transistor, a second clamping transistor, a first switching transistor, a second switching transistor, a third switching transistor, and a fourth switching transistor; the first and fourth switching transistors are two external transistors, and the second and third switching transistors are two internal transistors; the first terminal of the first switching transistor is connected to the DC positive terminal, the first terminal of the second switching transistor is connected to the second terminal of the first switching transistor, the second terminal of the second switching transistor is connected to the first terminal of the third switching transistor, the second terminal of the third switching transistor is connected to the first terminal of the fourth switching transistor, and the second terminal of the fourth switching transistor is connected to the DC negative terminal; the two ends of the first clamping transistor are respectively connected to the second terminals of the first and second clamping transistors, and the second terminal of the second clamping transistor is connected to the first terminal of the fourth switching transistor; a corresponding unidirectional conduction circuit is connected in parallel to the two ends of each external transistor, and / or a corresponding unidirectional conduction circuit is connected in parallel to the two ends of each internal transistor, the conduction direction of the unidirectional conduction circuit corresponding to the external transistor is from the DC negative terminal to the DC positive terminal, and the conduction direction of the unidirectional conduction circuit corresponding to the internal transistor is from the DC positive terminal to the DC negative terminal.

[0045] In this embodiment, the unidirectional conduction circuit can be connected and disposed in two outer tubes, or disposed in two inner tubes, or disposed in both inner and outer tubes. The following description, in conjunction with embodiments, will focus on the implementation method of distributing it in two outer tubes.

[0046] See Figure 2 This figure is a schematic diagram of another type I three-level inverter provided in the embodiments of this application.

[0047] This application provides a type I three-level inverter, including: a first unidirectional conduction circuit 100, a second unidirectional conduction circuit 200, a first switch Q1, a second switch Q2, a third switch Q3, and a fourth switch Q4.

[0048] The first terminal of the first switch Q1 is connected to the DC positive terminal. The first terminal of the second switch Q2 is connected to the second terminal of the first switch Q1. The second terminal of the second switch Q2 is connected to the first terminal of the third switch Q3. The second terminal of the third switch Q3 is connected to the first terminal of the fourth switch Q4. The second terminal of the fourth switch Q4 is connected to the DC negative terminal.

[0049] The first unidirectional conduction circuit 100 is connected in parallel across the first switching transistor Q1. The first unidirectional conduction circuit 100 is turned on when the voltage at the second terminal of the first switching transistor Q1 is higher than the voltage at the first terminal of the first switching transistor Q1.

[0050] The second unidirectional conduction circuit 200 is connected in parallel across the fourth switch Q4. The second unidirectional conduction circuit 200 conducts when the voltage at the second terminal of the fourth switch Q4 is higher than the voltage at the first terminal of the fourth switch Q4.

[0051] Among them, the first clamping switch Q5, the second clamping switch Q6, the first bus capacitor C11, the second bus capacitor C12, the first parasitic capacitor C3, and the second parasitic capacitor C4 have already been... Figure 1 As previously explained, I will not repeat myself here.

[0052] Since both the first unidirectional conducting circuit 100 and the second unidirectional conducting circuit 200 are unidirectional conducting circuits, and the first unidirectional conducting circuit 100 only conducts when the voltage at the second terminal of the first switching transistor Q1 is higher than the voltage at the first terminal, the current direction when the first unidirectional conducting circuit 100 is conducting is from the second terminal of the first switching transistor Q1 through the first unidirectional conducting circuit 100 to the first terminal of the first switching transistor Q1. However, when the inverter is working normally, the voltage at the first terminal of the first switching transistor Q1 is higher than the voltage at the second terminal, and the first unidirectional conducting circuit 100 is in the reverse cutoff state, i.e., it is out of the circuit and does not work. In other words, when the inverter is working normally, the first unidirectional conducting circuit 100 is similar to being disconnected from the inverter and does not consume energy; therefore, there is no power consumption. Similarly, the second unidirectional conducting circuit 200 only conducts when the voltage at the second terminal of the fourth switching transistor Q4 is higher than the voltage at the first terminal, i.e., the current direction when the second unidirectional conducting circuit 200 is conducting is from the second terminal of the fourth switching transistor Q4 through the first unidirectional conducting circuit 100 to the first terminal of the fourth switching transistor Q4. When the inverter is operating normally, the voltage at the first terminal of the fourth switch Q4 is higher than the voltage at the second terminal. The second unidirectional conduction circuit 200 is in the reverse cutoff state, meaning it is disconnected from the circuit and does not operate. In other words, when the inverter is operating normally, the second unidirectional conduction circuit 200 is essentially disconnected from the inverter and does not consume energy; therefore, there is no power consumption.

[0053] When a lightning strike occurs, the internal transistor voltage increases while the external transistor voltage decreases. Specifically, the voltages of the first switch Q1 and the fourth switch Q4 decrease, while the voltages of the second switch Q2 and the third switch Q3 increase. The lightning strike voltage on the first parasitic capacitor C3 will discharge through the first unidirectional conduction circuit 100. This circuit 100 shunts the discharge current of the first parasitic capacitor C3, thus reducing the current flowing through the collector-emitter capacitor (CE capacitor) of the first and second switches Q1 and Q2, resulting in a smaller residual voltage change and preventing the second switch Q2 from over-boosting. Similarly, the lightning strike voltage on the second parasitic capacitor C4 will discharge through the second unidirectional conduction circuit 200. This circuit 200 also shunts the discharge current of the second parasitic capacitor C4, reducing the current flowing through the collector-emitter capacitor (CE capacitor) of the third switch Q3 and the fourth switch Q4, resulting in a smaller residual voltage change and preventing the third switch Q3 from over-boosting. Reduce the risk of the inner tube being punctured by overpressure.

[0054] Because the amount of charge that parasitic capacitance to ground can hold during a lightning strike is limited—for example, the capacitance values ​​of the first parasitic capacitor C3 and the second parasitic capacitor C4 are relatively small, and therefore the amount of charge they can hold is also relatively low—using a larger parasitic capacitance in the outer tube can absorb more charge from the parasitic capacitance to ground, reducing the voltage change between the inner and outer tubes, protecting the inner tube from lightning strikes, and without increasing inverter losses. The parasitic capacitance of the outer tube refers to the capacitance between its emitter and collector.

[0055] The inverter provided in this application includes a bridge arm circuit and two clamping transistors. The bridge arm circuit includes a first to a fourth switching transistor connected in series, wherein the first and fourth switching transistors are external transistors, and the second and third switching transistors are internal transistors. A unidirectional conduction circuit is connected in parallel on the external transistors. When a lightning strike occurs, for example, the lightning voltage on the first parasitic capacitor corresponding to the first terminal of the second switching transistor will be discharged through the first unidirectional conduction circuit. This diverts the discharge current of the parasitic capacitor, preventing the discharge current from flowing through the capacitor between the collector and emitter of the second switching transistor, thus preventing the voltage rise of the second switching transistor from becoming too high. Similarly, the lightning voltage on the second parasitic capacitor corresponding to the second terminal of the third switching transistor will be discharged through the second unidirectional conduction circuit. This prevents the voltage rise of the third switching transistor from becoming too high, thereby reducing the voltage across the two internal transistors and reducing the risk of the internal transistors being overvoltage-damped.

[0056] The embodiments of this application do not specifically limit the implementation form of the unidirectional conduction circuit, as long as it can achieve unidirectional current conduction. For example, the unidirectional conduction circuit includes at least a diode, utilizing the diode's forward conduction and reverse cutoff characteristics. The following description uses a unidirectional conduction circuit including a diode and a capacitor connected in series as an example.

[0057] See Figure 3 This figure is a schematic diagram of another type I three-level inverter provided in an embodiment of this application.

[0058] The Type I three-level inverter provided in this application embodiment includes a first unidirectional conduction circuit comprising a first diode D1 and a first capacitor C1 connected in series; the cathode of the first diode D1 is close to the DC positive terminal, and the anode of the first diode D1 is close to the DC negative terminal. That is, this application embodiment does not specifically limit whether the cathode of the first diode D1 is connected to the DC positive terminal or whether the first terminal of the first capacitor C1 is connected to the DC positive terminal. Figure 3 This is just one implementation method. The cathode of the first diode D1 is connected to the DC positive terminal, and the anode of the first diode D1 is connected to the second terminal of the first switching transistor Q1 through the first capacitor C1.

[0059] The second unidirectional conduction circuit includes a second diode D2 and a second capacitor C2 connected in series; the cathode of the second diode D2 is close to the DC positive terminal, and the anode of the second diode D2 is close to the DC negative terminal. That is, the embodiments of this application do not specifically limit whether the second diode D2 or the second capacitor C2 is connected to the DC negative terminal.

[0060] The inverter provided in this application embodiment includes two unidirectional conduction circuits, each comprising a diode and a capacitor connected in series. Utilizing the unidirectional conduction characteristic of the diode, it can only conduct unidirectionally during a lightning strike, providing a discharge path for the lightning current and protecting the internal transistor from overvoltage breakdown. Moreover, during normal inverter operation, due to the reverse cutoff characteristic of the diode, no current flows through the unidirectional conduction circuits, thus preventing losses.

[0061] The above embodiment uses a switching transistor to implement the clamping transistor in a type I three-level inverter. Another implementation method is to use a diode to implement the clamping transistor, which will be described in detail below with reference to the accompanying drawings.

[0062] See Figure 4 The figure shows the implementation of a diode as the clamping transistor in the Type I three-level inverter provided in this application embodiment.

[0063] The type I three-level inverter provided in this application embodiment includes: a first clamping diode D3 and a second clamping diode D4.

[0064] The cathode of the first clamping diode D3 is connected to the second terminal of the first switching transistor Q1, the anode of the first clamping diode D3 is connected to the cathode of the second clamping diode D4, and the anode of the second clamping diode D4 is connected to the first terminal of the fourth switching transistor Q4.

[0065] The clamping transistor of the Type I three-level inverter provided in this application embodiment is a diode, which results in lower hardware cost and simpler control.

[0066] The unidirectional conduction circuit provided in this application embodiment may also include a resistor, which will be described in detail below with reference to the accompanying drawings.

[0067] See Figure 5 The figure is a schematic diagram of a unidirectional conduction circuit including a resistor provided in an embodiment of this application.

[0068] The Type I three-level inverter provided in this application embodiment further includes a first resistor R1 connected in parallel with the first capacitor C1 in the first unidirectional conduction circuit.

[0069] The second unidirectional conduction circuit also includes a second resistor R2 connected in parallel with the second capacitor C2.

[0070] When lightning strike energy charges a capacitor in a unidirectional conduction circuit, a resistor can be connected in parallel to the capacitor to discharge it and prevent charge accumulation. The energy on the capacitor may be discharged in reverse through a diode in the unidirectional conduction circuit. For example, in the first unidirectional conduction circuit, the energy in the first capacitor C1 is discharged in reverse through the first diode D1. However, it is desirable to minimize the leakage current and avoid discharge through the diode's reverse leakage current. Therefore, to suppress leakage current, the inverter provided in this embodiment can connect a first resistor R1 in parallel across the first capacitor C1 to provide a discharge path. Similarly, the energy in the second capacitor C2 can be discharged through a second resistor R2.

[0071] The inverter described in the above embodiments uses a unidirectional conduction circuit including a diode as an example. To better protect the internal components, a transient voltage suppression diode (TVS) can be used instead of a regular diode. That is, the first diode is a transient voltage suppression diode, and the second diode is a transient voltage suppression diode. A TVS is a protective electronic component that protects electrical equipment from voltage spikes. A TVS is a clamping device that suppresses excessively high voltages exceeding its breakdown voltage. When the overvoltage disappears, the TVS automatically resets, and it absorbs more energy than a similar rated crowbar circuit.

[0072] The following section, with reference to the accompanying diagram, describes how a unidirectional conduction circuit can be implemented using two internal transistors.

[0073] See Figure 6 The figure is a schematic diagram of the unidirectional conduction circuit in the inner tube of the type I three-level inverter provided in the embodiment of this application.

[0074] The unidirectional conduction circuit includes: a third unidirectional conduction circuit 300 and a fourth unidirectional conduction circuit 400.

[0075] The third unidirectional conduction circuit 300 is connected in parallel across the two ends of the second switch Q2. The third unidirectional conduction circuit 300 is turned on when the voltage at the first end of the second switch Q2 is higher than the voltage at the second end of the second switch Q2.

[0076] The fourth unidirectional conduction circuit 400 is connected in parallel across the third switch Q3. The fourth unidirectional conduction circuit 400 conducts when the voltage at the first terminal of the third switch Q3 is higher than the voltage at the second terminal of the third switch Q3.

[0077] The third unidirectional conduction circuit 300 can increase the parasitic capacitance of the second switching transistor Q2, reducing the damage caused by surge voltage. The fourth unidirectional conduction circuit 400 can increase the parasitic capacitance of the third switching transistor Q3, reducing the damage caused by surge voltage.

[0078] For the specific working principle, please refer to the description of the first unidirectional conduction circuit and the second unidirectional conduction circuit in the above embodiments. The principle is similar and will not be repeated here.

[0079] See Figure 7 This figure is a schematic diagram of another type I three-level inverter provided in an embodiment of this application.

[0080] The third unidirectional conduction circuit includes a third diode D3 and a third capacitor C3 connected in series, and the fourth unidirectional conduction circuit includes a fourth diode D4 and a fourth capacitor C4 connected in series.

[0081] One possible implementation is that the third diode D3 is a transient voltage suppressor diode; and the fourth diode D4 is a transient voltage suppressor diode.

[0082] See Figure 8 This figure is a schematic diagram of another type I three-level inverter provided in an embodiment of this application.

[0083] The third unidirectional conduction circuit also includes a third resistor R3 connected in parallel with the third capacitor C3; the fourth unidirectional conduction circuit also includes a fourth resistor R4 connected in parallel with the fourth capacitor C4.

[0084] The third resistor R3 and the fourth capacitor C4 have similar functions to the first and second resistors described in the above embodiments, and will not be repeated here.

[0085] See Figure 9 This figure is a schematic diagram of another type I three-level inverter provided in an embodiment of this application.

[0086] The inverter provided in this application embodiment has unidirectional conduction circuits in both the outer and inner transistors, that is... Figure 8 and Figure 5 The working principle of the unidirectional conduction circuit in the above has been introduced and will not be repeated here.

[0087] Based on the Type I three-level inverter provided in the above embodiments, this application also provides a power system including the Type I three-level inverter provided in the above embodiments.

[0088] This application does not specifically limit the specific scenario of the power system. For example, it can be a photovoltaic system, an energy storage system, or a photovoltaic-energy storage system. The following description uses a photovoltaic system as an example. This application does not specifically limit the photovoltaic system to a three-phase photovoltaic system or a single-phase photovoltaic system; all can include the Type I three-level inverter described in the above embodiments. The figures in the above embodiments are only circuit diagrams of a single-phase inverter. The inverter can be a single-phase inverter or a multi-phase inverter.

[0089] Because the inverter's external cables in a photovoltaic system are quite long and exposed to the outdoors for extended periods, the probability of lightning strikes is relatively high. Therefore, lightning protection is necessary.

[0090] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0091] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A type I three-level inverter, characterized in that, include: A unidirectional conduction circuit includes a first clamping transistor, a second clamping transistor, a first switching transistor, a second switching transistor, a third switching transistor, and a fourth switching transistor; the first switching transistor and the fourth switching transistor are two external transistors, and the second switching transistor and the third switching transistor are two internal transistors. The first end of the first switching transistor is used to connect to the positive DC terminal; the first end of the second switching transistor is connected to the second end of the first switching transistor; the second end of the second switching transistor is connected to the first end of the third switching transistor; the second end of the third switching transistor is connected to the first end of the fourth switching transistor; and the second end of the fourth switching transistor is used to connect to the negative DC terminal. The two ends of the first clamping transistor are respectively connected to the second end of the first switching transistor and the first end of the second clamping transistor; and the second end of the second clamping transistor is connected to the first end of the fourth switching transistor. Each outer tube has a corresponding unidirectional conduction circuit connected in parallel at both ends, and / or each inner tube has a corresponding unidirectional conduction circuit connected in parallel at both ends. The conduction direction of the unidirectional conduction circuit corresponding to the outer tube is from the DC negative terminal to the DC positive terminal, and the conduction direction of the unidirectional conduction circuit corresponding to the inner tube is from the DC positive terminal to the DC negative terminal.

2. The inverter according to claim 1, characterized in that, The unidirectional conduction circuit includes: a first unidirectional conduction circuit and a second unidirectional conduction circuit; The first unidirectional conduction circuit is connected in parallel across the first switching transistor. The first unidirectional conduction circuit conducts when the voltage at the second terminal of the first switching transistor is higher than the voltage at the first terminal of the first switching transistor. The second unidirectional conduction circuit is connected in parallel across the fourth switching transistor, and conducts when the voltage at the second terminal of the fourth switching transistor is higher than the voltage at the first terminal of the fourth switching transistor.

3. The inverter according to claim 2, characterized in that, The first unidirectional conduction circuit includes a first diode and a first capacitor connected in series, and the second unidirectional conduction circuit includes a second diode and a second capacitor connected in series.

4. The inverter according to claim 3, characterized in that, The first unidirectional conduction circuit further includes a first resistor connected in parallel with the first capacitor; the second unidirectional conduction circuit further includes a second resistor connected in parallel with the second capacitor.

5. The inverter according to claim 3, characterized in that, The first diode is a transient voltage suppressor diode; the second diode is a transient voltage suppressor diode.

6. The inverter according to claim 1, characterized in that, The unidirectional conduction circuit includes: a third unidirectional conduction circuit and a fourth unidirectional conduction circuit; The third unidirectional conduction circuit is connected in parallel across the two ends of the second switching transistor. The third unidirectional conduction circuit is turned on when the voltage at the first end of the second switching transistor is higher than the voltage at the second end of the second switching transistor. The fourth unidirectional conduction circuit is connected in parallel across the third switching transistor. The fourth unidirectional conduction circuit conducts when the voltage at the first terminal of the third switching transistor is higher than the voltage at the second terminal of the third switching transistor.

7. The inverter according to claim 6, characterized in that, The third unidirectional conduction circuit includes a third diode and a third capacitor connected in series, and the fourth unidirectional conduction circuit includes a fourth diode and a fourth capacitor connected in series.

8. The inverter according to claim 7, characterized in that, The third unidirectional conduction circuit further includes a third resistor connected in parallel with the third capacitor; the fourth unidirectional conduction circuit further includes a fourth resistor connected in parallel with the fourth capacitor. The third diode is a transient voltage suppression diode; the fourth diode is a transient voltage suppression diode.

9. The inverter according to any one of claims 1-8, characterized in that, The first clamping transistor and the second clamping transistor each include: a first clamping diode and a second clamping diode; The cathode of the first clamping diode is connected to the second terminal of the first switching transistor, the anode of the first clamping diode is connected to the cathode of the second clamping diode, and the anode of the second clamping diode is connected to the first terminal of the fourth switching transistor.

10. The inverter according to any one of claims 1-8, characterized in that, The first clamping transistor and the second clamping transistor include: a first clamping switch transistor and a second clamping switch transistor; The first end of the first clamping switch is connected to the second end of the first switch, the second end of the first clamping switch is connected to the first end of the second clamping switch, and the second end of the second clamping switch is connected to the first end of the fourth switch.

11. An electric power system, characterized in that, The inverter includes the inverter according to any one of claims 1-10, wherein the inverter is a single-phase inverter or a multi-phase inverter.

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