Anti-pid circuit and photovoltaic power generation system

Abstract

The application discloses a reverse PID circuit and a photovoltaic power generation system. The reverse PID circuit comprises a first switch, a resistance to ground, a second switch, a third switch, a PID power supply and a controller. The first switch and the second switch are controlled by the controller to be in a synchronous conduction state, or the second switch and the third switch are controlled by the controller to be in a synchronous conduction state. The working state of the PID power supply, the first voltage difference and the second voltage difference are controlled. Compared with the reverse PID function of P-type components and N-type components realized by four controllable switches, the reverse PID function of two different types of components is realized by only three switches, the number of required controllable switches and the control circuit thereof are reduced, the cost is reduced, and the complexity of the reverse PID control is simplified.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, specifically to an anti-PID circuit and a photovoltaic power generation system. Background Technology

[0002] To maximize power generation, photovoltaic (PV) power systems often over-produce capacity on the DC-side PV modules, aiming to generate full power for as long as possible throughout the day. During operation, the positive and negative electrodes of the PV modules experience a certain voltage relative to ground. Under the influence of the electric field, ions within the module's structural components gradually accumulate on the surface, forming light spots. This exacerbates the passivation effect, leading to a decrease in power output. This phenomenon is known as Potential-Induced Degradation (PID). Depending on the manufacturing process, PV modules are classified into P-type and N-type modules; correspondingly, the PID effect can be categorized into PID for P-type modules and PID for N-type modules.

[0003] However, the anti-PID scheme that adapts to both types of photovoltaic modules requires a total of four controllable switches to implement the anti-PID function for both types of photovoltaic modules, making the system relatively complex and costly. Utility Model Content

[0004] This application provides an anti-PID circuit and a photovoltaic power generation system to alleviate the aforementioned technical problems.

[0005] In a first aspect, this application provides an anti-PID circuit, which includes a first switch, a ground resistor, a second switch, a third switch, a PID power supply, and a controller. The first terminal of the first switch is connected to the positive terminal of the photovoltaic module via a positive DC bus; the first terminal of the ground resistor is connected to the ground; the first terminal of the second switch is connected to the second terminal of the ground resistor; the first terminal of the third switch is connected to the negative terminal of the photovoltaic module via a negative DC bus; the first output terminal of the PID power supply is connected to the second terminal of the third switch, the second output terminal of the PID power supply is connected to the second terminal of the second switch, and the third output terminal of the PID power supply is connected to the second terminal of the first switch. The voltage difference between the first output terminal and the second output terminal is a positive first voltage difference, and the voltage difference between the second output terminal and the third output terminal is a positive second voltage difference. The controller is connected to the control terminals of the first switch, the second switch, the third switch, the enable terminal of the PID power supply, and the control terminal of the PID power supply. The controller is configured to control the first switch and the second switch to be synchronously in a conducting state, or to control the second switch and the third switch to be synchronously in a conducting state, and to control the operating state of the PID power supply, the first voltage difference, and the second voltage difference.

[0006] Secondly, this application also provides a photovoltaic power generation system, which includes the aforementioned inverse PID circuit.

[0007] The anti-PID circuit and photovoltaic power generation system provided in this application control the first and second switches to be in the conducting state simultaneously, or control the second and third switches to be in the conducting state simultaneously, and control the working state of the PID power supply, the first voltage difference, and the second voltage difference. Compared with the anti-PID function of P-type and N-type components through four controllable switches, only three switches are needed to be compatible with the anti-PID function of two different types of components, which reduces the number of controllable switches and their control circuits required, not only reducing costs but also simplifying the complexity of anti-PID control. Attached Figure Description

[0008] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.

[0009] Figure 1 This is a schematic diagram of a photovoltaic power generation system provided in an embodiment of this application.

[0010] Figure 2 This is a first circuit diagram of a photovoltaic power generation system provided in an embodiment of this application.

[0011] Figure 3 This is a second circuit diagram of a photovoltaic power generation system provided in an embodiment of this application.

[0012] Figure 4 This is a third circuit diagram of a photovoltaic power generation system provided in an embodiment of this application.

[0013] Figure 5 The fourth circuit diagram of the photovoltaic power generation system provided in the embodiments of this application.

[0014] Figure 6 The fifth circuit diagram of the photovoltaic power generation system provided in the embodiments of this application.

[0015] Figure 7 This is a schematic diagram of the first type of anti-PID method provided in the embodiments of this application.

[0016] Figure 8 This is a schematic diagram of a second type of anti-PID method provided in an embodiment of this application.

[0017] Figure 9 This is a schematic diagram of the third type of anti-PID method provided in the embodiments of this application.

[0018] Figure 10 This is a schematic diagram of the fourth type of anti-PID method provided in the embodiments of this application.

[0019] Figure 11 This is a fifth flowchart illustrating the anti-PID method provided in this application embodiment. Detailed Implementation

[0020] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0021] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Features thus defined as "first" or "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "multiple" means two or more unless otherwise explicitly specified.

[0022] To address the power generation reduction caused by the PID effect in photovoltaic (PV) systems, anti-PID devices are typically installed. The basic principle of anti-PID is to alter the electric field distribution of the PV module relative to ground, preventing ions from migrating to the module surface, or causing ions already accumulated on the module surface to return to structural components such as the support structure. The former is called PID protection, and the latter is called PID repair. Different types of anti-PID circuits and methods exist for different types of PID effects; specifically, there are corresponding P-type and N-type anti-PID circuits for P-type and N-type modules, respectively. The P-type anti-PID circuit is used to increase the voltage to ground at the negative terminal of the P-type module; the N-type anti-PID circuit is used to decrease the voltage to ground at the positive terminal of the N-type module.

[0023] To accommodate the anti-PID requirements of both P-type and N-type photovoltaic modules, one possible approach is to design two anti-PID systems, selecting the appropriate system based on the type of photovoltaic modules installed at the project site. This approach increases product development workload and complicates spare parts maintenance and product manufacturing, leading to a rise in the overall cost of the photovoltaic inverter. Therefore, developing a single anti-PID system capable of intelligently adapting to both types of photovoltaic modules is of practical significance for enhancing the competitiveness of photovoltaic inverters.

[0024] One possible anti-PID scheme, adaptable to both types of photovoltaic modules, involves applying the positive output voltage of the PID power supply between the negative DC bus and ground, or between ground and the positive DC bus, through switching between two sets of controllable switches. This achieves anti-PID functionality for P-type and N-type modules respectively. This scheme requires a total of four controllable switches to implement the anti-PID function for both types of photovoltaic modules, making the system relatively complex and costly.

[0025] like Figure 1 As shown, this embodiment provides a photovoltaic power generation system 100, which includes an inverter module 20 and an inverse PID circuit 30. The DC side of the inverter module 20 is used to connect to the photovoltaic module 10. The inverter module 20 and the photovoltaic module 10 are connected through a DC bus. The DC bus includes a positive DC bus BUS+ and a negative DC bus BUS-. The inverse PID circuit 30 is connected to the inverter module 20, the positive DC bus BUS+, and the negative DC bus BUS-.

[0026] In some embodiments, such as Figure 2 As shown, the inverse PID circuit 30 includes a first switch S1, a ground resistor RPE, a second switch S2, a third switch S3, a PID power supply 31, and a controller 32. The first terminal of the first switch S1 is connected to the positive terminal of the photovoltaic module 10 via the positive DC bus BUS+; the first terminal of the ground resistor RPE is connected to the ground PE; the first terminal of the second switch S2 is connected to the second terminal of the ground resistor RPE; the first terminal of the third switch S3 is connected to the negative terminal of the photovoltaic module 10 via the negative DC bus BUS-; the first output terminal 1 of the PID power supply 31 is connected to the second terminal of the third switch S3, and the second output terminal of the PID power supply 31 is connected to the second terminal of the second switch S2. The third output terminal of 31 is connected to the second terminal of the first switch S1. The voltage difference between the first output terminal and the second output terminal is a positive first voltage difference, and the voltage difference between the second output terminal and the third output terminal is a positive second voltage difference. The controller 32 is connected to the control terminal of the first switch S1, the control terminal of the second switch S2, the control terminal of the third switch S3, the enable terminal of the PID power supply 31, and the control terminal of the PID power supply 31. The controller 32 is configured to control the first switch S1 and the second switch S2 to be in the conducting state simultaneously, or to control the second switch S2 and the third switch S3 to be in the conducting state simultaneously, and to control the operating state of the PID power supply 31, the first voltage difference, and the second voltage difference.

[0027] It should be noted that, compared to using four controllable switches to achieve the anti-PID function of P-type and N-type components, this embodiment can use three switches to be compatible with the anti-PID function of two different types of components, reducing the number of switches required, which not only reduces costs but also simplifies the complexity of anti-PID control.

[0028] Wherein, PV1…PVn represent a photovoltaic module 10, and Rx1…Rxn and Ry represent the insulation resistance of the photovoltaic module 10 to ground.

[0029] The PID power supply 31 draws power from the AC grid and has three output terminals. The output voltage polarity of the first output terminal 1 of the PID power supply 31 is positive compared to the second output terminal 2, and the output voltage polarity of the second output terminal 2 is positive compared to the third output terminal 3. The operating state and output voltage value of the PID power supply 31 can be controlled by the controller 32. The controller 32 can be shared with the main controller 32 of the inverter module 20 and can be a microprocessor such as a DSP or ARM. The controller 32 not only controls the enable and output voltage value of the PID power supply 31, but also controls the switching states of the first switch S1, the second switch S2, and the third switch S3. The first switch S1, the second switch S2, and the third switch S3 are controllable switches and can be any component with short-circuit characteristics when conducting or closing, such as relays, semiconductor devices, or knife switches. By integrating various control functions of the switches, the PID power supply 31, and the inverter module 20 into one unit, the controller 32 improves the integration level.

[0030] When the controller 32 enables the PID power supply 31 to output voltage, and the second switch S2 and the third switch S3 are closed at this time, the anti-PID circuit 30 can apply a certain positive voltage between the negative DC bus BUS- and the ground PE to raise the ground potential of the negative DC bus BUS-, thereby realizing the anti-PID function for P-type components. Similarly, when the controller 32 enables the PID power supply 31 to output voltage, and the first switch S1 and the second switch S2 are closed at this time, the anti-PID circuit 30 can apply a certain positive voltage between the ground PE and the positive DC bus BUS+ to lower the ground potential of the positive DC bus BUS+, thereby realizing the anti-PID function for N-type components.

[0031] Taking the inverse PID function of the P-type module as an example, if the output voltage between the first output terminal 1 and the second output terminal 2 of the PID power supply 31 is VPID1 under the control of the controller 32, and the output voltage of each photovoltaic module 10 is VPV1…VPVn, then according to the superposition theorem, when the second switch S2 and the third switch S3 are closed, the voltage to ground of the negative DC bus BUS- is VBUS-, as shown in calculation formula 1-1:

[0032] When the VBUS voltage is greater than 0, it is considered that the PID protection or repair of the P-type component has been achieved under the action of the inverse PID circuit 30. It should be noted that the specific repair effect is not only related to the VBUS voltage, but also to the repair time.

[0033] Taking the inverse PID function of the N-type module as an example, if the output voltage between the second output terminal 2 and the third output terminal 3 of the PID power supply 31 is VPID2 under the control of the controller 32, and the output voltage of each photovoltaic module 10 is VPV1…VPVn, then according to the superposition theorem, when the first switch S1 and the second switch S2 are closed, the voltage to ground of the positive DC bus BUS+ is VBUS+, as shown in calculation formula 1-2:

[0034] Where VPVk represents the maximum voltage among VPV1…VPVn, and Rxk represents the positive-to-ground insulation resistance corresponding to the photovoltaic module 10 with the maximum voltage. When VBUS+ is less than 0, it is considered that PID protection or repair of the N-type module has been achieved under the action of the inverse PID circuit 30. It should be noted that the specific repair effect is not only related to VBUS+, but also to the repair time.

[0035] In some embodiments, such as Figure 2 As shown, the positive DC bus BUS+ and the negative DC bus BUS- are connected to the DC side of the inverter module 20, the AC side of the inverter module 20 is connected to the AC grid, and the input terminal of the PID power supply 31 is connected to at least one of the DC side and the AC side of the inverter module 20.

[0036] It should be noted that the PID power supply 31 can be powered not only by the AC power provided by the AC side of the inverter module 20 and / or the AC grid, but also by the DC power provided by the DC side of the inverter module 20.

[0037] In some embodiments, such as Figure 3 As shown, the inverse PID circuit 30 also includes an AC-side auxiliary power supply 33. The input terminal of the AC-side auxiliary power supply 33 is connected to the AC side of the inverter module 20 and the AC grid, and the output terminal of the AC-side auxiliary power supply 33 is connected to the input terminal of the PID power supply 31.

[0038] It should be noted that the AC-side auxiliary power supply 33 may include a rectifier circuit with rectification function. This rectifier circuit can rectify the AC power from the AC grid to power the PID power supply 31. Since the power requirement of the PID power supply 31 is generally small, usually within 15W, it has little impact on the power capacity of the AC-side auxiliary power supply 33. Using this power supply method, on the one hand, it is equivalent to the PID power supply 31 and the AC-side auxiliary power supply 33 sharing the rectifier circuit; on the other hand, the output voltage of the AC-side auxiliary power supply 33 is usually in the range of tens of volts, which reduces the design difficulty of the PID power supply 31 and reduces the overall cost of the inverse PID circuit 30.

[0039] In some embodiments, such as Figure 4 As shown, the inverse PID circuit 30 also includes a first diode D1, a DC-side auxiliary power supply 34, and a second diode D2. The anode of the first diode D1 is connected to the output terminal of the AC-side auxiliary power supply 33; the input terminal of the DC-side auxiliary power supply 34 is connected to the positive DC bus BUS+ and the negative DC bus BUS-; the anode of the second diode D2 is connected to the output terminal of the DC-side auxiliary power supply 34, and the cathode of the second diode D2 is connected to the cathode of the first diode D1 and the input terminal of the PID power supply 31.

[0040] It should be noted that the PID power supply 31 can also be powered by the outputs of the DC-side auxiliary power supply 34 and the AC-side auxiliary power supply 33 of the inverter module 20. The outputs of the DC-side auxiliary power supply 34 and the AC-side auxiliary power supply 33 are coupled through the first diode D1 and the second diode D2, and the design ensures that the output voltage of the DC-side auxiliary power supply 34 is slightly higher than the design voltage of the AC-side auxiliary power supply 33. When the inverter module 20 is running, the energy for PID protection comes from the DC side, i.e., the photovoltaic module 10, and does not need to draw power from the AC grid. Only when the inverter module 20 is in standby mode at night does the energy for PID repair come from the AC grid, thus reducing the overall energy consumption of the anti-PID function on the AC grid.

[0041] In some embodiments, such as Figure 5As shown, the PID power supply 31 includes a first transformer T1, a first capacitor C1, a first resistor R1, a first transistor M1, a power chip 311, a first rectifier unit 312, and an AC / DC converter circuit 313. The first terminal of the first capacitor C1 is connected to the first terminal of the primary winding of the first transformer T1 and the first terminal of the DC side of the AC / DC converter circuit 313. The AC side of the AC / DC converter circuit 313 is connected to the AC grid. The first terminal of the first resistor R1 is connected to the second terminal of the first capacitor C1 and the second terminal of the DC side of the AC / DC converter circuit 313. The first electrode of the first transistor M1 is connected to the second terminal of the first resistor R1, and the second electrode of the first transistor M1 is connected to the second terminal of the primary winding of the first transformer T1. The control terminal of the power chip 311 is connected to the controller 32, and the output terminal of the power chip 311 is connected to the control electrode of the first transistor M1. The first rectifier unit 312 is connected to the secondary winding of the first transformer T1, the second terminal of the first switch S1, the second terminal of the second switch S2, and the second terminal of the third switch S3.

[0042] It should be noted that the PID power supply 31 shown in this embodiment is a flyback converter. The input of the flyback converter is rectified and converted from the AC grid by the AC-DC conversion circuit 313. Its secondary winding adopts the form of a center tap, generating two output voltages, namely the first voltage difference and the second voltage difference. Since the PID power supply 31 has two relatively independent output voltages, the two output voltages can be used for the anti-PID function of P-type and N-type components respectively. That is, the output voltage between the first output terminal 1 and the second output terminal 2 of the PID power supply 31 is used to raise the voltage to ground of the negative DC bus BUS-, realizing the anti-PID function of the P-type component; the output voltage between the second output terminal 2 and the third output terminal 3 of the PID power supply 31 is used to lower the voltage to ground of the positive DC bus BUS+, realizing the anti-PID function of the N-type component.

[0043] Among them, the AC-DC conversion circuit 313 can be a rectifier or an AC-side auxiliary power supply with rectification function.

[0044] This PID power supply 31 requires only three controllable switches—the first switch S1, the second switch S2, and the third switch S3—to switch between the P-type and N-type inverse PID circuits 30. Specifically, controlling the closing of the second switch S2 and the third switch S3 constitutes the P-type inverse PID circuit 30, while controlling the closing of the first switch S1 and the second switch S2 constitutes the N-type inverse PID circuit 30. Compared to an inverse PID circuit 30 with only one output, the PID power supply 31 provided in this embodiment reduces the number of controllable switches and the corresponding switch control circuitry, thereby reducing system complexity and cost.

[0045] The operation of the PID power supply 31, the two output voltage values, and the on / off states of the three controllable switches can all be controlled by the control commands of the controller 32. The SPS_EN signal controls the operation of the PID power supply 31. For example, when the SPS_EN signal is high, the PID power supply 31 operates and provides operating voltage; when the SPS_EN signal is low, the PID power supply 31 stops operating and stops providing operating voltage. Alternatively, when the SPS_EN signal is low, the PID power supply 31 operates and provides operating voltage; when the SPS_EN signal is high, the PID power supply 31 stops operating and stops providing operating voltage. The Vo_REF signal controls the output voltage value of the PID power supply 31. The S1_CTR, S2_CTR, and S3_CTR signals control the on / off states of the first switch S1, the second switch S2, and the third switch S3, respectively.

[0046] In some embodiments, such as Figure 5 As shown, the first rectifier unit 312 includes at least one third diode D3, at least one fourth diode D4, at least one second capacitor C2, and at least one third capacitor C3. At least one third diode D3 is connected in series between the first end of the secondary winding and the second end of the first switch S1; at least one fourth diode D4 is connected in series between the second end of the secondary winding and the second end of the third switch S3; at least one second capacitor C2 is connected in series between the second end of the first switch S1 and the middle tap of the secondary winding, and the middle tap is connected to the second end of the second switch S2; at least one third capacitor C3 is connected in series between the second end of the third switch S3 and the middle tap.

[0047] It should be noted that the voltage at the first end of the secondary winding is rectified by at least one third diode D3, and then filtered by at least one second capacitor C2 to form a relatively stable DC voltage, which is output between the second end of the first switch S1 and the second end of the second switch S2.

[0048] The voltage at the second terminal of the secondary winding is rectified by at least one fourth diode D4, and then filtered by at least one third capacitor C3 to form another relatively stable DC voltage, which is output to the second terminal of the second switch S2 and the second terminal of the third switch S3.

[0049] The center tap of the secondary winding is directly connected to the second terminal of the second switch S2 (S2) as a common reference point for the two output voltages.

[0050] The number of at least one of the third diode D3, the fourth diode D4, the second capacitor C2, and the third capacitor C3 can be one or more. As the number increases, the overall withstand voltage limit can be improved at a lower cost.

[0051] In some embodiments, such as Figure 6 As shown, the PID power supply 31 includes a second transformer T2, a second transistor M2, a third transistor M3, a fourth capacitor C4, and a second rectifier unit 322. The first terminal of the second transistor M2 is connected to the first end of the primary winding of the second transformer T2, and the control terminal of the second transistor M2 is connected to the controller 32. The first terminal of the third transistor M3 is connected to the second end of the primary winding of the second transformer T2, and the control terminal of the third transistor M3 is connected to the controller 32. The first terminal of the fourth capacitor C4 is connected to the second terminals of the second transistor M2 and the third transistor M3, and the second terminal of the fourth capacitor C4 is connected to the center tap of the primary winding of the second transformer T2. The second rectifier unit 322 is connected to the secondary winding of the second transformer T2, the second terminal of the first switch S1, the second terminal of the second switch S2, and the second terminal of the third switch S3.

[0052] It should be noted that the PID power supply 31 can be Figure 5 The flyback converter shown can also be other types of isolated converters capable of outputting two voltages. The PID power supply 31 provided in this embodiment is a push-pull converter, which can also output two voltages: a positive voltage between the first output terminal 1 and the second output terminal 2 of the PID power supply 31, realizing the inverse PID function of the P-type component; and a positive voltage between the second output terminal 2 and the third output terminal 3 of the PID power supply 31, realizing the inverse PID function of the N-type component.

[0053] In this embodiment, the controller 32 generates two complementary (180-degree phase difference) drive signals, namely M2_CTR and M3_CTR, with dead time, which are used to control the alternating conduction of the second transistor M2 and the third transistor M3, thereby generating alternating current and magnetic field on the primary side of the second transformer T2.

[0054] The alternating conduction of the second transistor M2 and the third transistor M3 generates an alternating magnetic field in the core of the second transformer T2. According to the law of electromagnetic induction, this changing magnetic field induces an alternating voltage on the secondary winding of the transformer.

[0055] The fourth capacitor, C4, acts as a DC blocking capacitor to prevent core saturation. Because the parameters of the second transistor M2 and the third transistor M3, along with the winding parameters, cannot be perfectly symmetrical, the volt-second product applied to the two halves of the winding during conduction will be unequal, generating a DC bias current that can cause the transformer core to tend towards saturation. The DC blocking capacitor can block the DC component, ensuring the core operates on a symmetrical magnetization curve, avoiding saturation, and improving system reliability and efficiency.

[0056] In some embodiments, such as Figure 6As shown, the second rectifier unit 322 includes at least one fifth diode D5, at least one sixth diode D6, at least one fifth capacitor C5, and at least one sixth capacitor C6. At least one fifth diode D5 is connected in series between the first end of the secondary winding of the second transformer T2 and the second end of the first switch S1; at least one sixth diode D6 is connected in series between the first end of the secondary winding of the second transformer T2 and the second end of the third switch S3; at least one fifth capacitor C5 is connected in series between the second end of the secondary winding of the second transformer T2 and the second end of the first switch S1, and the second end of the secondary winding of the second transformer T2 is connected to the second end of the second switch S2; at least one sixth capacitor C6 is connected in series between the second end of the secondary winding of the second transformer T2 and the second end of the third switch S3.

[0057] It should be noted that the number of at least one of the fifth diode D5, the sixth diode D6, the fifth capacitor C5, and the sixth capacitor C6 can be one or more. As the number increases, the overall withstand voltage limit can be improved at a lower cost.

[0058] In some embodiments, such as Figures 2 to 6 As shown, the positive DC bus BUS+ is connected to the first end of the first side of each DC-DC converter circuit 40, the negative DC bus BUS- is connected to the second end of the first side of each DC-DC converter circuit 40, and the second side of each DC-DC converter circuit 40 is connected to a photovoltaic module 10.

[0059] It should be noted that the DC-DC conversion circuit 40 can be a DC-DC converter, such as a Boost converter or a Buck-Boost converter. The DC-DC conversion circuit 40 maximizes the output power of the photovoltaic module 10 through MPPT technology and efficiently delivers it to the common DC bus through voltage conversion. In some embodiments, such as... Figure 5 , Figure 6 As shown, a bus capacitor Cb is also connected between the positive DC bus BUS+ and the negative DC bus BUS-.

[0060] It should be noted that the bus capacitor Cb can stabilize the DC bus voltage and absorb harmonics and reactive current from the power grid.

[0061] In some embodiments, please continue reading Figures 1 to 6 The inverse PID circuit 30 is configured to determine the inverse PID mode based on the historical operating information and current operating status of the inverter module 20, and adjust the first voltage to ground or the second voltage to ground according to the type of photovoltaic module 10 and the inverse PID mode. The first voltage to ground is the voltage to ground of the positive DC bus BUS+, and the second voltage to ground is the voltage to ground of the negative DC bus BUS-.

[0062] It is understood that in this embodiment, the anti-PID circuit 30 determines the anti-PID mode based on the historical operating information and current operating status of the inverter module 20, and adjusts the first voltage to ground or the second voltage to ground according to the type of photovoltaic module 10 and the anti-PID mode. The first voltage to ground is the voltage to ground of the positive DC bus BUS+, which can meet the anti-potential-induced degradation requirement of N-type modules. The second voltage to ground is the voltage to ground of the negative DC bus BUS-, which can meet the anti-potential-induced degradation requirement of P-type modules. Thus, the same anti-PID circuit 30 can be used to meet the anti-PID requirements of P-type and N-type modules, broadening the application scenarios and realizing the platformization and normalization of the system.

[0063] In some embodiments, the controller 32 determines the PID effect generation result of the photovoltaic module 10 based on the historical operating information of the inverter module 20, and determines the anti-PID mode based on at least one of the current operating state of the inverter module 20 and the PID effect generation result.

[0064] It should be noted that this embodiment analyzes historical data (such as the cumulative effects of past PID) and the current state (whether it is generating electricity or in standby mode) to automatically select the most suitable operating mode (protection or repair). This significantly improves the system's intelligence level and user experience, ensuring that PID effects are handled promptly and appropriately, thereby maximizing power generation benefits.

[0065] In some embodiments, the historical operating information of the inverter module 20 is the integral value of the voltage to ground; the controller 32 determines the PID effect generation result based on the comparison result of the integral value of the voltage to ground and the preset value.

[0066] It should be noted that this embodiment calculates the time integral value of the voltage to ground (∫V_bus·dt), allowing the system to reflect the cumulative degree of the PID effect, rather than just the voltage value at a single instant. Comparing this value with a settable preset threshold makes the judgment more scientific and reliable, avoiding misjudgments caused by instantaneous voltage fluctuations, and providing a solid data foundation for subsequent mode decisions.

[0067] In some embodiments, when the photovoltaic module 10 is an N-type module, the integral value of the voltage to ground is the first integral value of the first voltage to ground, and the preset value is a preset negative value that is less than or equal to 0; when the first integral value is greater than the preset negative value, the PID effect generation result indicates that the photovoltaic module 10 has experienced the PID effect; when the first integral value is less than or equal to the preset negative value, the PID effect generation result indicates that the photovoltaic module 10 has not experienced the PID effect.

[0068] It should be noted that this embodiment, by defining specific judgment logic applicable to N-type components, can achieve accurate diagnosis of PID effects of N-type components. This enables the intelligent anti-PID system to accurately identify PID problems unique to N-type components, thus providing a key basis for subsequently activating the correct N-type anti-PID protection mode and ensuring the effectiveness and accuracy of the protection.

[0069] In some embodiments, when the photovoltaic module 10 is a P-type module, the integral value of the voltage to ground is the second integral value of the second voltage to ground, and the preset value is a preset positive value greater than or equal to 0; when the second integral value is less than the preset positive value, the PID effect generation result indicates that the photovoltaic module 10 has experienced the PID effect; when the second integral value is greater than or equal to the preset positive value, the PID effect generation result indicates that the photovoltaic module 10 has not experienced the PID effect.

[0070] It should be noted that this embodiment, by defining specific judgment logic applicable to P-type components, can achieve accurate diagnosis of PID effects of P-type components. This enables the intelligent anti-PID system to accurately identify PID problems unique to P-type components, thus providing a key basis for subsequently activating the correct P-type anti-PID protection mode and ensuring the effectiveness and accuracy of the protection.

[0071] In some embodiments, the anti-PID mode includes a protection mode and a repair mode; when the current operating state of the inverter module 20 is the working state, the controller 32 controls the anti-PID circuit 30 to work in the protection mode; when the current operating state of the inverter module 20 is the standby state, and the result of the PID effect indicates that the photovoltaic module 10 has experienced a PID effect, the controller 32 controls the anti-PID circuit 30 to work in the repair mode.

[0072] It should be noted that this embodiment establishes clear mode switching rules: protection is performed when generating power (operating state), and repair is performed when not generating power (standby state). The advantage of this is that the protection mode is performed simultaneously with power generation, resulting in almost no additional energy loss; although the repair mode requires energy, the output voltage value of the PID power supply 31 is lower in the repair mode, reducing the power requirement for PID repair. Thus, the overall system reduces the total energy consumption of the anti-PID function, achieving an optimal balance between power consumption and efficiency, and improving the system's economy.

[0073] In some embodiments, the controller 32 controls the inverse PID circuit 30 to apply a positive voltage difference to the negative DC bus BUS- or a negative voltage difference to the positive DC bus BUS+. In the protection mode, the controller 32 controls the inverse PID circuit 30 to output the maximum voltage difference. When the PID effect generation result in the protection mode indicates that the PID effect of the photovoltaic module 10 has been repaired, the controller 32 controls the inverse PID circuit 30 to reduce the voltage difference until the first voltage to ground is close to and remains less than 0 or the second voltage to ground is close to and remains greater than 0. The reduced voltage difference is maintained in the protection mode until the inverter module 20 is turned off. The inverse PID mode is turned off until the inverter module 20 is run again and the protection mode is activated.

[0074] It should be noted that this embodiment initially maximizes the voltage difference at the output, which can strongly counteract the PID effect and ensure optimal protection and initial repair. Once the system detects that the PID effect has been repaired (the integral value reaches the threshold), it automatically reduces the output voltage, only needing to maintain a "holding voltage" slightly above (or slightly below) zero. This significantly reduces the continuous power consumption in protection mode, achieving a combination of efficient protection and low-power operation.

[0075] In some embodiments, when the PID effect is generated in the protection mode and the inverter module 20 is in standby mode, the controller 32 controls the anti-PID circuit 30 to work in the repair mode; when the PID effect is generated in the protection mode and the inverter module 20 is in the working state, the controller 32 controls the anti-PID circuit 30 to output the maximum voltage difference.

[0076] It should be noted that in this embodiment, even when the PID effect is severe during power generation, strong protection is consistently used rather than repair. The aim is to prioritize ensuring the day's power generation while performing repairs as much as possible. Upon switching to standby mode, a dedicated repair mode is immediately activated, utilizing grid power for centralized repair. This strategy ensures that the system performs the most appropriate action under any circumstances—either maintaining power generation or efficiently repairing—avoiding functional omissions or conflicts.

[0077] In some embodiments, the controller 32 controls the inverse PID circuit 30 to apply a positive voltage difference to the negative DC bus BUS- or a negative voltage difference to the positive DC bus BUS+; in the repair mode, the controller 32 controls the inverse PID circuit 30 to output a minimized voltage difference; when the result of the PID effect in the repair mode indicates that the PID effect of the photovoltaic module 10 has been repaired, the inverse PID mode is exited; when the inverter module 20 runs again, the protection mode is activated.

[0078] It should be noted that this embodiment employs a minimized voltage difference to initiate the repair process, which reduces power consumption to the minimum while meeting basic repair conditions. Once repair is complete, the system immediately exits this mode, avoiding unnecessary energy waste. This reflects the system's economic considerations during the repair process, reducing the user's electricity costs.

[0079] In some embodiments, when the PID effect is generated in the protection mode and the inverter module 20 is in the working state, the controller 32 controls the anti-PID circuit 30 to work in the protection mode; when the PID effect is generated in the protection mode and the inverter module 20 is in the standby state, the controller 32 controls the anti-PID circuit 30 to output the minimized voltage difference.

[0080] It should be noted that this embodiment uses a minimized voltage difference to start the protection, which can minimize the power consumption required for the protection process while meeting the basic protection conditions.

[0081] In some embodiments, the controller 32 controls the inverse PID circuit 30 to operate in inverse PID mode. When an interruption occurs, the inverse PID mode is turned off. The controller 32 continuously calculates the integral value of the voltage to ground until the inverse PID mode is turned on again.

[0082] It should be noted that this embodiment can immediately shut down the inverse PID circuit 30 in the event of an interruption, which is a safety protection measure to prevent equipment malfunction under abnormal conditions. Simultaneously, continuous calculation of integral values ​​means that the system is "learning" and "memorizing" the component's state even during non-working periods. When the function is reactivated, the controller 32 possesses the latest, uninterrupted accumulated PID effect data, enabling more accurate judgments and decisions, ensuring the consistency and accuracy of the intelligent strategy.

[0083] In some embodiments, this embodiment also provides an anti-PID method, which is applied to a photovoltaic power generation system 100. The anti-PID method includes: determining an anti-PID mode based on the historical operating information and current operating status of the inverter module 20; adjusting a first voltage to ground or a second voltage to ground according to the type of the photovoltaic module 10 and the anti-PID mode, wherein the first voltage to ground is the voltage to ground of the positive DC bus BUS+, and the second voltage to ground is the voltage to ground of the negative DC bus BUS-.

[0084] It is understood that the anti-PID method provided in this embodiment can also determine the anti-PID mode based on the historical operating information and current operating status of the inverter module 20 through the anti-PID circuit 30, and adjust the first voltage to ground or the second voltage to ground according to the type of photovoltaic module 10 and the anti-PID mode. The first voltage to ground is the voltage to ground of the positive DC bus BUS+, which can meet the anti-potential-induced degradation requirement of N-type modules. The second voltage to ground is the voltage to ground of the negative DC bus BUS-, which can meet the anti-potential-induced degradation requirement of P-type modules. Thus, the same anti-PID circuit 30 can be used to meet the anti-PID requirements of P-type and N-type modules, broadening the application scenarios and realizing the platformization and normalization of the system.

[0085] In some embodiments, the anti-PID method further includes: determining the PID effect generation result of the photovoltaic module 10 based on the historical operating information of the inverter module 20; and determining an anti-PID mode based on at least one of the current operating state of the inverter module 20 and the PID effect generation result.

[0086] It should be noted that this embodiment analyzes historical data (such as the cumulative effects of past PID) and the current state (whether it is generating electricity or in standby mode) to automatically select the most suitable operating mode (protection or repair). This significantly improves the system's intelligence level and user experience, ensuring that PID effects are handled promptly and appropriately, thereby maximizing power generation benefits.

[0087] In some embodiments, the historical operating information of the inverter module 20 is the integral value of the voltage to ground, and the inverse PID method further includes: determining the PID effect generation result based on the comparison result of the integral value of the voltage to ground and a preset value.

[0088] It should be noted that this embodiment calculates the time integral value of the voltage to ground (∫V_bus·dt), allowing the system to reflect the cumulative degree of the PID effect, rather than just the voltage value at a single instant. Comparing this value with a settable preset threshold makes the judgment more scientific and reliable, avoiding misjudgments caused by instantaneous voltage fluctuations, and providing a solid data foundation for subsequent mode decisions.

[0089] In some embodiments, when the photovoltaic module 10 is an N-type module, the integral value of the voltage to ground is the first integral value of the first voltage to ground, and the preset value is a preset negative value less than or equal to 0. The anti-PID method further includes: when the first integral value is greater than the preset negative value, the PID effect generation result indicates that the photovoltaic module 10 has experienced the PID effect; when the first integral value is less than or equal to the preset negative value, the PID effect generation result indicates that the photovoltaic module 10 has not experienced the PID effect.

[0090] It should be noted that this embodiment, by defining specific judgment logic applicable to N-type components, can achieve accurate diagnosis of PID effects of N-type components. This enables the intelligent anti-PID system to accurately identify PID problems unique to N-type components, thus providing a key basis for subsequently activating the correct N-type anti-PID protection mode and ensuring the effectiveness and accuracy of the protection.

[0091] In some embodiments, when the photovoltaic module 10 is a P-type module, the integral value of the voltage to ground is the second integral value of the second voltage to ground, and the preset value is a preset positive value greater than or equal to 0. The anti-PID method further includes: when the second integral value is less than the preset positive value, the PID effect generation result indicates that the photovoltaic module 10 has experienced the PID effect; when the second integral value is greater than or equal to the preset positive value, the PID effect generation result indicates that the photovoltaic module 10 has not experienced the PID effect.

[0092] It should be noted that this embodiment, by defining specific judgment logic applicable to P-type components, can achieve accurate diagnosis of PID effects of P-type components. This enables the intelligent anti-PID system to accurately identify PID problems unique to P-type components, thus providing a key basis for subsequently activating the correct P-type anti-PID protection mode and ensuring the effectiveness and accuracy of the protection.

[0093] In some embodiments, the anti-PID mode includes a protection mode and a repair mode. The anti-PID method further includes: when the current operating state of the inverter module 20 is the working state, controlling the anti-PID circuit 30 to operate in the protection mode; when the current operating state of the inverter module 20 is the standby state, and the PID effect results indicate that the photovoltaic module 10 has experienced a PID effect, controlling the anti-PID circuit 30 to operate in the repair mode.

[0094] It should be noted that this embodiment establishes clear mode switching rules: protection is performed when generating power (operating state), and repair is performed when not generating power (standby state). The advantage of this is that the protection mode is performed simultaneously with power generation, resulting in almost no additional energy loss; although the repair mode requires energy, the output voltage value of the PID power supply 31 is lower in the repair mode, reducing the power requirement for PID repair. Thus, the overall system reduces the total energy consumption of the anti-PID function, achieving an optimal balance between power consumption and efficiency, and improving the system's economy.

[0095] In some embodiments, the anti-PID method further includes: controlling the anti-PID circuit 30 to apply a positive voltage difference to the negative DC bus BUS- or a negative voltage difference to the positive DC bus BUS+; in the protection mode, controlling the anti-PID circuit 30 to output the maximum voltage difference; when the PID effect generation result in the protection mode indicates that the PID effect of the photovoltaic module 10 has been repaired, while ensuring that the PID effect generation result indicates that no PID effect has occurred, controlling the anti-PID circuit 30 to reduce the voltage difference until the first voltage to ground is close to and remains less than 0 or the second voltage to ground is close to and remains greater than 0; and maintaining the reduced voltage difference in the protection mode until the inverter module 20 is turned off; and turning off the anti-PID mode until the inverter module 20 starts running again and the protection mode is activated.

[0096] It should be noted that this embodiment initially maximizes the voltage difference at the output, which can strongly counteract the PID effect and ensure optimal protection and initial repair. Once the system detects that the PID effect has been repaired (the integral value reaches the threshold), it automatically reduces the output voltage, only needing to maintain a "holding voltage" slightly above (or slightly below) zero. This significantly reduces the continuous power consumption in protection mode, achieving a combination of efficient protection and low-power operation.

[0097] In some embodiments, the anti-PID method further includes: when the PID effect is generated in the protection mode and the inverter module 20 is in standby mode, controlling the anti-PID circuit 30 to operate in the repair mode; when the PID effect is generated in the protection mode and the inverter module 20 is in the working state, controlling the anti-PID circuit 30 to output the maximum voltage difference.

[0098] It should be noted that in this embodiment, even when the PID effect is severe during power generation, strong protection is consistently used rather than repair. The aim is to prioritize ensuring the day's power generation while performing repairs as much as possible. Upon switching to standby mode, a dedicated repair mode is immediately activated, utilizing grid power for centralized repair. This strategy ensures that the system performs the most appropriate action under any circumstances—either maintaining power generation or efficiently repairing—avoiding functional omissions or conflicts.

[0099] In some embodiments, the anti-PID method further includes: controlling the anti-PID circuit 30 to apply a positive voltage difference to the negative DC bus BUS- or a negative voltage difference to the positive DC bus BUS+; in the repair mode, controlling the anti-PID circuit 30 to output a minimized voltage difference; when the result of the PID effect in the repair mode indicates that the PID effect of the photovoltaic module 10 has been repaired, exiting the anti-PID mode; and starting the protection mode when the inverter module 20 runs again.

[0100] It should be noted that this embodiment employs a minimized voltage difference to initiate the repair process, which reduces power consumption to the minimum while meeting basic repair conditions. Once repair is complete, the system immediately exits this mode, avoiding unnecessary energy waste. This reflects the system's economic considerations during the repair process, reducing the user's electricity costs.

[0101] In some embodiments, the anti-PID method further includes: when the PID effect is generated in the protection mode and the inverter module 20 is in the working state, controlling the anti-PID circuit 30 to work in the protection mode; when the PID effect is generated in the protection mode and the inverter module 20 is in the standby state, controlling the anti-PID circuit 30 to output a minimized voltage difference.

[0102] It should be noted that this embodiment uses a minimized voltage difference to start the protection, which can minimize the power consumption required for the protection process while meeting the basic protection conditions.

[0103] In some embodiments, the inverse PID method further includes: controlling the inverse PID circuit 30 to operate in inverse PID mode, turning off the inverse PID mode when an interruption occurs; and continuously calculating the integral value of the voltage to ground until the inverse PID mode is turned on again.

[0104] It should be noted that this embodiment can immediately shut down the inverse PID circuit 30 in the event of an interruption, which is a safety protection measure to prevent equipment malfunction under abnormal conditions. Simultaneously, continuous calculation of integral values ​​means that the system is "learning" and "memorizing" the component's state even during non-working periods. When the function is reactivated, the controller 32 possesses the latest, uninterrupted accumulated PID effect data, enabling more accurate judgments and decisions, ensuring the consistency and accuracy of the intelligent strategy.

[0105] In summary, this application proposes an intelligent anti-PID strategy for a photovoltaic inverter module 20, supporting software control enabling of the anti-PID function module and supporting both P-type and N-type anti-PID modes in factory settings. When the user enables the anti-PID function and has set the anti-PID type, the intelligent anti-PID strategy will automatically determine whether the inverter module 20 is experiencing PID effects based on information such as the historical operating information of the inverter module 20, the current operating status of the inverter module 20, and the cumulative operating time of the anti-PID function, and automatically issue PID protection or repair commands.

[0106] The following section will use the anti-PID function of the P-type module as an example to explain the intelligent anti-PID strategy of the photovoltaic inverter module 20.

[0107] like Figure 7As shown, the intelligent anti-PID strategy intelligently determines whether the photovoltaic module 10 in the corresponding project site has experienced a PID effect based on the historical operating information of the photovoltaic inverter module 20. ∫Vbus-dt represents the integral value of the negative DC bus BUS- to ground voltage since the historical operation of the photovoltaic inverter module 20. For P-type modules, when the negative DC bus BUS- to ground voltage is negative, it will cause the photovoltaic module 10 to experience a PID effect. Therefore, the integral value of ∫Vbus-dt can be used to determine whether the photovoltaic module 10 has experienced a PID effect since the historical operation of the inverter module 20. When ∫Vbus-dt < 0, it indicates that the photovoltaic module 10 has experienced a PID effect; when ∫Vbus-dt > 0, it indicates that the photovoltaic module 10 has not experienced a PID effect.

[0108] like Figure 8 As shown, after the software enables the anti-PID function, it intelligently decides whether to activate the PID protection mode or the PID repair mode based on the current operating status of the inverter module 20 and historical operating information. When the anti-PID function is enabled, if the photovoltaic inverter module 20 is currently in operation, the PID protection mode is activated; if the inverter module 20 is currently in standby mode, and based on... Figure 7 If the photovoltaic module 10 is found to have a PID effect, then the PID repair mode is activated.

[0109] After activating the PID protection mode, the intelligent anti-PID system of inverter module 20 will execute specific protection measures, such as... Figure 9 As shown. After activating the PID protection mode, the controller 32 outputs a control signal to adjust the output voltage of the PID power supply 31 to the maximum design value, raising the voltage to ground of the negative DC bus BUS- as much as possible to offset the negative impact of the photovoltaic module 10's output voltage on the PID protection effect. During the PID protection process, the ∫Vbus-dt value is monitored in real time. Once ∫Vbus-dt>0, it indicates that the PID effect that has already occurred has been synchronously repaired during the PID protection process. In this case, the output voltage of the PID power supply 31 can be reduced to maintain the voltage to ground of the negative DC bus BUS- slightly greater than 0 until the inverter module 20 enters standby mode and the PID function is turned off. The PID protection mode will be automatically activated again the next time the inverter module 20 runs. If ∫Vbus-dt is always less than 0 during the PID protection process, the maximum output voltage of the PID power supply 31 will be maintained until the inverter module 20 enters standby mode and the anti-PID function will be switched to PID repair mode.

[0110] After activating the PID repair mode, the intelligent anti-PID system will execute specific repair measures, such as... Figure 10As shown. After the PID repair mode is activated, the controller 32 outputs a control signal to adjust the output voltage of the PID power supply 31 to the minimum design value, minimizing the power consumption required for PID repair. During the PID repair process, the ∫Vbus-dt value is monitored in real time. Once ∫Vbus-dt>0, it indicates that the PID effect occurring in the photovoltaic module 10 has been repaired. At this time, the anti-PID function can be turned off until the inverter module 20 runs again, at which point the PID protection mode will be automatically activated again. If ∫Vbus-dt remains less than 0 during the PID repair process, the minimum output voltage of the PID power supply 31 will be maintained until the inverter module 20 enters the running state, and the anti-PID function will be switched to the PID protection mode.

[0111] like Figure 11 As shown, after the software enables the anti-PID function, the system will automatically run the anti-PID strategy. If an interruption occurs during this process, and the anti-PID function is stopped or disabled, then the anti-PID function will be turned off. After the anti-PID function is turned off, the ∫Vbus-dt value will be monitored in real time, and the system will wait for the software to enable the anti-PID function again.

[0112] The intelligent anti-PID system and strategy, when factory-set to N-type anti-PID mode, employs an anti-PID strategy similar to the P-type anti-PID mode, requiring only... Figure 7 to Figure 11 Replace Vbus- with the ground voltage of the positive DC bus BUS+, i.e., Vbus+, and modify the judgment condition to ∫Vbus+dt>0.

[0113] Therefore, the anti-PID circuit 30 of this application can be used to meet the anti-PID function requirements of both P-type and N-type modules, and supports the factory settings of both P-type and N-type anti-PID modes. This solves the problem that the anti-PID device can only meet the anti-potential-induced degradation requirement of one type of photovoltaic module 10, thus broadening the application scenarios and realizing the platformization and normalization of the system.

[0114] Because the PID power supply 31 has two relatively independent output voltages, which can be used for P-type inverse PID and N-type inverse PID respectively, compared with a single-output power supply, the number of controllable switches used for switching between P-type and N-type inverse PID can be reduced from 4 to 3, thus reducing the overall cost.

[0115] Because the output voltage of the PID power supply 31 can be controlled by the controller 32, the inverse PID circuit 30 can be used in both PID protection mode and PID repair mode. Furthermore, the inverse PID circuit 30 can automatically adjust the output voltage of the PID power supply 31 according to the selection of the PID protection or repair mode, thereby enhancing the PID protection effect and reducing the PID repair power consumption.

[0116] By monitoring the integral value of the bus voltage to ground over time in real time, it can automatically determine whether the photovoltaic module 10 is experiencing a PID effect, and the effectiveness of PID protection and repair. It can combine the historical operating information and current operating status of the inverter module 20 to automatically decide whether to activate PID protection or PID repair function, and adjust the output voltage value of the PID power supply 31 accordingly.

[0117] Because the PID power supply 31 can be powered by the outputs of the DC-side auxiliary power supply 34 and the AC-side auxiliary power supply 33 of the inverter module 20, the overall energy consumption of the grid by the anti-PID function is reduced.

[0118] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0119] This article uses specific examples to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. These modifications or substitutions will not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. An inverse PID circuit, characterized in that, The inverse PID circuit includes: The first switch, the first end of the first switch is connected to the positive terminal of the photovoltaic module through the positive DC bus; Ground resistance, wherein the first end of the ground resistance is connected to the ground; The second switch, the first end of which is connected to the second end of the ground resistor; The third switch, the first end of which is connected to the negative terminal of the photovoltaic module via a negative DC bus; A PID power supply, wherein the first output terminal of the PID power supply is connected to the second terminal of the third switch, the second output terminal of the PID power supply is connected to the second terminal of the second switch, the third output terminal of the PID power supply is connected to the second terminal of the first switch, the voltage difference between the first output terminal and the second output terminal is a positive first voltage difference, and the voltage difference between the second output terminal and the third output terminal is a positive second voltage difference; The controller is connected to the control terminals of the first switch, the second switch, the third switch, the enable terminal of the PID power supply, and the control terminal of the PID power supply. It is configured to control the first switch and the second switch to be synchronously in a conducting state, or to control the second switch and the third switch to be synchronously in a conducting state, and to control the operating state of the PID power supply, the first voltage difference, and the second voltage difference.

2. The inverse PID circuit according to claim 1, characterized in that, The positive DC bus and the negative DC bus are respectively connected to the DC side of the inverter module, the AC side of the inverter module is connected to the AC power grid, and the input terminal of the PID power supply is connected to at least one of the DC side and the AC side of the inverter module.

3. The inverse PID circuit according to claim 2, characterized in that, The inverse PID circuit also includes an AC auxiliary power supply. The input terminal of the AC auxiliary power supply is connected to the AC side of the inverter module and the AC power grid, and the output terminal of the AC auxiliary power supply is connected to the input terminal of the PID power supply.

4. The inverse PID circuit according to claim 3, characterized in that, The inverse PID circuit also includes: The first diode, the positive terminal of which is connected to the output terminal of the AC auxiliary power supply; A DC-side auxiliary power supply, the input terminal of which is connected to the positive DC bus and the negative DC bus; The second diode has its anode connected to the output terminal of the DC-side auxiliary power supply, and its cathode connected to the cathode of the first diode and the input terminal of the PID power supply.

5. The inverse PID circuit according to claim 1, characterized in that, The PID power supply includes: First transformer; The first capacitor has its first terminal connected to the first terminal of the primary winding of the first transformer and the first terminal of the DC side of the AC-DC converter circuit, and the AC side of the AC-DC converter circuit is connected to the AC power grid. A first resistor, the first end of which is connected to the second end of the first capacitor and the second end of the DC side of the AC-DC conversion circuit; The first transistor has its first terminal connected to the second terminal of the first resistor, and its second terminal connected to the second terminal of the primary winding of the first transformer. A power chip, wherein the control terminal of the power chip is connected to the controller, and the output terminal of the power chip is connected to the control electrode of the first transistor; The first rectifier unit is connected to the secondary winding of the first transformer, the second terminal of the first switch, the second terminal of the second switch, and the second terminal of the third switch.

6. The inverse PID circuit according to claim 5, characterized in that, The first rectifier unit includes: At least one third diode is connected in series between the first end of the secondary winding and the second end of the first switch; At least one fourth diode is connected in series between the second end of the secondary winding and the second end of the third switch; At least one second capacitor is connected in series between the second terminal of the first switch and the center tap of the secondary winding, and the center tap is connected to the second terminal of the second switch. At least one third capacitor is connected in series between the second terminal of the third switch and the intermediate tap.

7. The inverse PID circuit according to claim 1, characterized in that, The PID power supply includes: Second transformer; The second transistor has its first terminal connected to the first end of the primary winding of the second transformer, and its control terminal connected to the controller. The third transistor has its first terminal connected to the second terminal of the primary winding of the second transformer, and its control terminal connected to the controller. The fourth capacitor has its first terminal connected to the second terminal of the second transistor and the second terminal of the third transistor, and its second terminal connected to the center tap of the primary winding of the second transformer. The second rectifier unit is connected to the secondary winding of the second transformer, the second terminal of the first switch, the second terminal of the second switch, and the second terminal of the third switch.

8. The inverse PID circuit according to claim 7, characterized in that, The second rectifier unit includes: At least one fifth diode is connected in series between the first end of the secondary winding of the second transformer and the second end of the first switch; At least one sixth diode is connected in series between the first end of the secondary winding of the second transformer and the second end of the third switch; At least one fifth capacitor is connected in series between the second end of the secondary winding of the second transformer and the second end of the first switch, and the second end of the secondary winding of the second transformer is connected to the second end of the second switch; At least one sixth capacitor is connected in series between the second terminal of the secondary winding of the second transformer and the second terminal of the third switch.

9. The inverse PID circuit according to any one of claims 1-8, characterized in that, The positive DC bus is connected to the first end of the first side of each DC-DC converter circuit, the negative DC bus is connected to the second end of the first side of each DC-DC converter circuit, and the second side of each DC-DC converter circuit is connected to a photovoltaic module.

10. The inverse PID circuit according to claim 9, characterized in that, A bus capacitor is also connected between the positive DC bus and the negative DC bus.

11. A photovoltaic power generation system, characterized in that, The photovoltaic power generation system includes the inverse PID circuit as described in any one of claims 1-10.

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