Anti-interference double-carrier differential IQ frequency conversion circuit
Patent Information
- Application Number
- CN202522192748.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-16
- Publication Date
- 2026-10-09
- Estimated Expiration
- 2035-10-16
AI Technical Summary
现有技术若需要实现抗干扰，往往需要设计复杂的电路，带来的成本也较高
[0013]本实用新型的有益效果：本实用新型通过两组IQ信号处理模块各自输出一路信号，形成双载波，采用双载波备份的形式，能够有效防止同频干扰。并通过将IQ信号频率搬移至射频频率（属于高频频段）后，实现IQ混频，有效抑制镜像频率带来的干扰。该双载波差分IQ变频电路的抗干扰性强，提高了用户体验度，并且只需要设置DAC芯片、混频器等成熟的集成芯片即可构成本电路，电路简单，成本低廉。
Smart Images
Figure CN224843700U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of circuit technology, specifically an anti-interference dual-carrier differential IQ frequency converter circuit. Background Technology
[0002] For devices such as wireless microphones, it is necessary to transmit signals at a target frequency. The microphone chip on a wireless microphone collects the analog audio signal, which generally needs to be converted to the target frequency for transmission.
[0003] Many existing frequency converter circuits often suffer from interference from the same frequency and from mirror frequencies. This interference can cause audio dropouts and negatively impact the user experience. Current technologies often require complex circuit designs to achieve interference suppression, resulting in high costs. Therefore, a frequency converter circuit capable of suppressing both same-frequency and radial frequency interference is needed. Utility Model Content
[0004] To address the shortcomings of existing technologies, the purpose of this invention is to provide an anti-interference dual-carrier differential IQ frequency converter circuit that can solve the problems described in the background art.
[0005] The technical solution to achieve the purpose of this utility model is as follows: an anti-interference dual-carrier differential IQ frequency converter circuit, including an audio signal conversion module, two sets of IQ signal processing modules, a combiner DIV2, an amplifier PA, and an antenna ANT. The audio signal conversion module is used to convert the received analog raw audio signal into a digital audio signal, modulate the digital audio signal into an IQ signal, and split the I / O signal into two paths and output them to the two sets of IQ signal processing modules respectively. One IQ signal is output to one set of IQ signal processing modules. The IQ signal processing module is used to upconvert the IQ signal to obtain the output signal of the target frequency. The output signals of the two IQ signal processing modules are input to the combiner DIV2. The combiner DIV2 is used to combine the two output signals into one signal and output it to the amplifier PA. The amplifier PA is used to amplify the received signal and output it to the antenna ANT, which then radiates it out.
[0006] Furthermore, the dual-carrier differential IQ frequency conversion circuit also includes a bandpass filter, with the output terminal of amplifier PA connected to the input terminal of the bandpass filter, and the output terminal of the bandpass filter connected to antenna ANT.
[0007] Furthermore, the audio signal conversion module includes an ADC chip and a processor. The ADC is electrically connected to the processor. The ADC is used to acquire sound and form an analog raw audio signal, or to directly receive an analog raw audio signal sent from an external source and send the raw audio signal to the processor. The processor modulates the original audio signal into an IQ signal and outputs two IQ signals, which are then sent to a corresponding set of IQ signal processing modules.
[0008] Furthermore, the processor is an integrated circuit composed of an FPGA.
[0009] Furthermore, the ADC chip is electrically connected to the processor via the IIS interface.
[0010] Furthermore, the IQ signal processing module includes two DAC chips, a frequency synthesizer, two IQ mixers, a quadrature phase shifter, and an adder. This adder serves as the combiner DIV2. The inputs of the two DAC chips and the input of the frequency synthesizer are all connected to the processor's output. The DAC chip is used to convert the digital IQ signal output by the processor into an analog IQ signal, and then output it to the corresponding IQ mixer. The frequency synthesizer receives the clock signal from the processor and outputs it as a local oscillator signal to the quadrature phase shifter. The quadrature phase shifter is used to divide the local oscillator signal into two orthogonal sub-signals, and outputs the two sub-signals to the IQ mixer respectively. The IQ mixer is used to upconvert the analog IQ signal output by the DAC chip, which is used as a sub-signal for the local oscillator signal, to obtain the output signal at the target frequency. The two output signals from the two IQ mixers are added together by an adder to form a single signal, which is then input to the adder. The single signal output from each of the two IQ signal processing modules is also input to the adder. The adder combines two signals into one signal.
[0011] Furthermore, the frequency of the output signal from the first group of IQ signal processing modules is different from the frequency of the output signal from the second group of IQ signal processing modules.
[0012] Furthermore, the frequency of the output signal of the first group of IQ signal processing modules is 640MHz, and the frequency of the output signal of the second group of IQ signal processing modules is 690MHz.
[0013] The beneficial effects of this invention are as follows: This invention uses two sets of IQ signal processing modules, each outputting one signal to form a dual-carrier configuration. The dual-carrier backup effectively prevents co-channel interference. Furthermore, by shifting the IQ signal frequency to a radio frequency (belonging to the high-frequency band), IQ mixing is achieved, effectively suppressing interference from image frequencies. This dual-carrier differential IQ converter circuit has strong anti-interference capabilities, improves user experience, and only requires mature integrated chips such as a DAC chip and mixer to construct the circuit, making it simple and inexpensive. Attached Figure Description
[0014] Figure 1 This is a circuit diagram of the present invention. Detailed Implementation
[0015] The present invention will be further described below with reference to the accompanying drawings and specific embodiments: like Figure 1 As shown, an anti-interference dual-carrier differential IQ frequency conversion circuit includes an audio signal conversion module, two sets of IQ signal processing modules, a combiner DIV2, an amplifier PA, and an antenna ANT. The audio signal conversion module converts the received analog raw audio signal into a digital audio signal, modulates the digital audio signal into an IQ signal, and splits the IQ signal into two paths, outputting them to the two sets of IQ signal processing modules respectively. One IQ signal is output to one set of IQ signal processing modules. The IQ signal processing modules up-convert the IQ signal to obtain an output signal at the target frequency. The output signals of the two sets of IQ signal processing modules are input to the combiner DIV2, which combines the two output signals into a single signal and outputs it to the amplifier PA. The amplifier PA amplifies the received signal and outputs it to the antenna ANT, where it is then radiated.
[0016] For example, the audio signal conversion module includes an ADC chip and a processor. The ADC is electrically connected to the processor. The ADC is used to acquire sound and form an analog raw audio signal, or directly receive an analog raw audio signal sent from an external source and send the raw audio signal to the processor. The processor is used to modulate the raw audio signal into an IQ signal and output two IQ signals to a corresponding set of IQ signal processing modules.
[0017] It is understandable that the processor modulates the analog raw audio signal into a digital IQ signal, which is an existing technology. The conversion of this signal can be achieved by circuits or integrated chips based on existing technology, so it will not be elaborated here.
[0018] For example, the processor is an integrated circuit composed of an FPGA.
[0019] For example, the ADC chip is electrically connected to the processor via an IIS interface.
[0020] For example, the IQ signal processing module includes two DAC chips, a frequency synthesizer, two IQ mixers, a quadrature phase shifter, and an adder DIV2. The inputs of the two DAC chips and the input of the frequency synthesizer are all connected to the output of the processor. The DAC chips are used to convert the digital IQ signal output by the processor into an analog IQ signal and output it to the corresponding IQ mixer. The frequency synthesizer is used to receive the clock signal provided by the processor and output it as a local oscillator signal to the quadrature phase shifter. The quadrature phase shifter is used to divide the local oscillator signal into two orthogonal sub-signals and output the two sub-signals to the IQ mixers respectively. The IQ mixers are used to up-convert the analog IQ signal output by the DAC chips under the action of the sub-signals as local oscillator signals to obtain an output signal of the target frequency. The two output signals from the two IQ mixers are added together by adder DIV2 to form a single signal, which is then input to adder DIV2. The single signal output from each of the two IQ signal processing modules is also input to adder DIV2. Adder DIV2 combines the two signals into a single signal, which is then output to amplifier PA. Amplifier PA amplifies the signal and radiates it through antenna ANT.
[0021] by Figure 1 Taking this as an example, the first IQ signal processing module includes two DAC chips (DA1 and DA2), a frequency synthesizer PLL1, two IQ mixers, and a quadrature phase shifter (QPSPLITTER). The I and Q channels in the diagram represent one output signal from each of the two mixers. The second IQ signal processing module consists of two DAC chips (DA3 and DA4) and a frequency synthesizer PLL2; the rest is the same as the first IQ signal processing module, so it will not be described in detail here.
[0022] For example, the dual-carrier differential IQ frequency conversion circuit further includes a bandpass filter, the output terminal of the amplifier PA is connected to the input terminal of the bandpass filter, and the output terminal of the bandpass filter is connected to the antenna ANT, so that the signal output by the amplifier PA is filtered by the bandpass filter and then input to the antenna ANT.
[0023] For example, the frequency of the output signal of the first group of IQ signal processing modules is 640MHz, and the frequency of the output signal of the second group of IQ signal processing modules is 690MHz, that is, the frequencies of the output signals of the two groups of IQ signal processing modules are different.
[0024] Understandably, in actual use, the receiver receives the signal synthesized by the adder and only selects the output signal from the first group of IQ signal processing modules for demodulation. If the bit error rate of the signal output by the first group of IQ signal processing modules is high or there is packet loss, it can be adjusted to receive the output signal from the second group of IQ signal processing modules and demodulate it.
[0025] This invention utilizes two sets of IQ signal processing modules, each outputting a single signal to form a dual-carrier configuration. The dual-carrier backup effectively prevents co-channel interference. Furthermore, by shifting the IQ signal frequency to a radio frequency (a high-frequency band), IQ mixing is achieved, effectively suppressing interference from image frequencies. This dual-carrier differential IQ converter circuit exhibits strong anti-interference capabilities, improves user experience, and requires only mature integrated chips such as a DAC chip and mixer to construct the circuit, making it simple and inexpensive.
[0026] The embodiments disclosed in this specification are merely illustrative of one aspect of the features of this utility model. The protection scope of this utility model is not limited to this embodiment, and any other functionally equivalent embodiments fall within the protection scope of this utility model. Those skilled in the art can make various other corresponding changes and modifications based on the technical solutions and concepts described above, and all such changes and modifications should fall within the protection scope of the claims of this utility model.
Claims
1. An anti-interference dual-carrier differential IQ frequency converter circuit, characterized in that, It includes an audio signal conversion module, two sets of IQ signal processing modules, a combiner DIV2, an amplifier PA, and an antenna ANT. The audio signal conversion module is used to convert the received analog raw audio signal into a digital audio signal, modulate the digital audio signal into an IQ signal, and split the I / O signal into two paths, outputting them to the two sets of IQ signal processing modules respectively. One IQ signal is output to one set of IQ signal processing modules. The IQ signal processing module is used to upconvert the IQ signal to obtain the output signal of the target frequency. The output signals of the two IQ signal processing modules are input to the combiner DIV2. The combiner DIV2 is used to combine the two output signals into one signal and output it to the amplifier PA. The amplifier PA is used to amplify the received signal and output it to the antenna ANT, which then radiates it out.
2. The anti-interference dual-carrier differential IQ frequency converter circuit according to claim 1, characterized in that, The dual-carrier differential IQ frequency converter circuit also includes a bandpass filter. The output terminal of the amplifier PA is connected to the input terminal of the bandpass filter, and the output terminal of the bandpass filter is connected to the antenna ANT.
3. The anti-interference dual-carrier differential IQ frequency converter circuit according to claim 1, characterized in that, The audio signal conversion module includes an ADC chip and a processor. The ADC is electrically connected to the processor. The ADC is used to acquire sound and form an analog raw audio signal, or to directly receive an analog raw audio signal sent from an external source and send the raw audio signal to the processor. The processor modulates the original audio signal into an IQ signal and outputs two IQ signals, which are then sent to a corresponding set of IQ signal processing modules.
4. The anti-interference dual-carrier differential IQ frequency converter circuit according to claim 3, characterized in that, The processor is an integrated circuit composed of an FPGA.
5. The anti-interference dual-carrier differential IQ frequency converter circuit according to claim 3, characterized in that, The ADC chip is electrically connected to the processor via the IIS interface.
6. The anti-interference dual-carrier differential IQ frequency converter circuit according to claim 3, characterized in that, The IQ signal processing module includes two DAC chips, a frequency synthesizer, two IQ mixers, a quadrature phase shifter, and an adder. This adder serves as the combiner DIV2. The inputs of the two DAC chips and the input of the frequency synthesizer are all connected to the processor's output. The DAC chip is used to convert the digital IQ signal output by the processor into an analog IQ signal, and then output it to the corresponding IQ mixer. The frequency synthesizer receives the clock signal from the processor and outputs it as a local oscillator signal to the quadrature phase shifter. The quadrature phase shifter is used to divide the local oscillator signal into two orthogonal sub-signals, and outputs the two sub-signals to the IQ mixer respectively. The IQ mixer is used to upconvert the analog IQ signal output by the DAC chip, which is used as a sub-signal for the local oscillator signal, to obtain the output signal at the target frequency. The two output signals from the two IQ mixers are added together by an adder to form a single signal, which is then input to the adder. The single signal output from each of the two IQ signal processing modules is also input to the adder. The adder combines two signals into one signal.
7. The anti-interference dual-carrier differential IQ frequency converter circuit according to claim 6, characterized in that, The frequency of the output signal from the first group of IQ signal processing modules is different from the frequency of the output signal from the second group of IQ signal processing modules.
8. The anti-interference dual-carrier differential IQ frequency converter circuit according to claim 7, characterized in that, The first IQ signal processing module outputs a signal with a frequency of 640MHz, and the second IQ signal processing module outputs a signal with a frequency of 690MHz.