A low noise amplifier

Abstract

The application discloses a low noise amplifier, comprising: a substrate; an element layer on the substrate, the element layer comprising: an input pad, an input capacitor, an input trace and an amplification circuit, the input trace comprising a first input trace and a second input trace, the first input trace being used for connecting the input pad and the input capacitor, the second input trace being used for connecting the input capacitor and the amplification circuit; a shielding layer on the substrate, the shielding layer being located between the layer where the input pad is located and the layer where the substrate is located in the direction perpendicular to the plane where the substrate is located; wherein the shielding layer has a first projection on the substrate, the input pad has a second projection on the substrate, the input capacitor has a third projection on the substrate, and the first projection covers at least one of the second projection and the third projection, so as to improve the noise figure of the low noise amplifier.

Description

Technical Field

[0001] This application relates to the field of radio frequency technology, and in particular to a low-noise amplifier. Background Technology

[0002] For radio frequency low-noise amplifiers (RF low-noise amplifiers), the noise figure is a core performance indicator. In low-noise amplifiers, the input traces and input capacitors, due to parasitic capacitance and / or resistance, introduce additional noise, affecting the amplifier's performance. Utility Model Content

[0003] In view of the above problems, this application provides a low-noise amplifier, the specific solution of which is as follows:

[0004] A low-noise amplifier, comprising:

[0005] Substrate;

[0006] A component layer located on the substrate, the component layer including: input pads, input capacitors, input traces and amplifier circuits, the input traces including a first input trace and a second input trace, the first input trace being used to connect the input pads and the input capacitors, and the second input trace being used to connect the input capacitors and the amplifier circuits;

[0007] A shielding layer located on the substrate, in a direction perpendicular to the plane of the substrate, is situated between the layer containing the input pad and the layer containing the substrate;

[0008] The shielding layer has a first projection on the substrate, the input pad has a second projection on the substrate, and the input capacitor has a third projection on the substrate, wherein the first projection covers at least one of the second projection and the third projection.

[0009] Optionally, the component layer includes a multi-layer structure, with the input pads and the input capacitors located on different layers within the component layer, and the second projection covering the third projection or the third projection covering the second projection.

[0010] Optionally, the first projection covers the larger of the second and third projections, and the shielding layer is located between the layer containing the input capacitor and the layer containing the substrate.

[0011] Optionally, the component layer includes a multi-layer structure, with the input pads and the input capacitors located on different layers within the component layer, and the second projection and the third projection not overlapping at least partially.

[0012] Optionally, the first projection covers the second projection and the third projection, and the shielding layer is located between the layer containing the input capacitor and the layer containing the substrate.

[0013] Optionally, the first projection further covers the projection of the first input trace on the substrate, and the shielding layer is located between the layer containing the first input trace and the layer containing the substrate; and / or, the first projection further covers the projection of the second input trace on the substrate, and the shielding layer is located between the layer containing the second input trace and the layer containing the substrate.

[0014] Optionally, the shielding layer is grounded.

[0015] Optionally, the amplification circuit includes: an amplifying transistor and a first inductor, wherein the gate of the amplifying transistor is electrically connected to the second input trace, the source of the amplifying transistor is electrically connected to the first end of the first inductor, and the second end of the first inductor is grounded;

[0016] The shielding layer is electrically connected to a preset position of the first inductor, the preset position including a first end and a second end of the first inductor.

[0017] Optionally, the first inductor is an adjustable inductor, and the preset position further includes: the adjustable end of the first inductor.

[0018] Optionally, the amplification circuit includes: an amplifying transistor and a first inductor, wherein the gate of the amplifying transistor is electrically connected to the second input trace, the source of the amplifying transistor is electrically connected to the first end of the first inductor, and the second end of the first inductor is grounded;

[0019] The amplifier tube is a field-effect transistor or a bipolar junction transistor.

[0020] The shielding layer is electrically connected to the body electrode of the amplifier tube.

[0021] The low-noise amplifier provided in this application embodiment can, when a signal input from the input pad is transmitted to the amplification circuit via the input capacitor, utilize the shielding layer to shield the signal transmitted from the input pad and / or the signal transmitted from the input capacitor. This prevents the signal transmitted from the input pad from forming parasitic capacitance between the input pad and the substrate, and / or prevents the signal transmitted from the input capacitor from forming parasitic capacitance between the input capacitor and the substrate. Consequently, it avoids the parasitic capacitance from coupling into the substrate and causing losses, thus affecting the noise performance of the low-noise amplifier and improving its noise performance. Attached Figure Description

[0022] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. Throughout the drawings, the same or similar reference numerals denote the same or similar elements. It should be understood that the drawings are schematic, and the originals and elements are not necessarily drawn to scale.

[0023] Figure 1 This is a schematic diagram of the current low-noise amplifier circuit structure;

[0024] Figure 2 This is a schematic diagram of the structure of a low-noise amplifier provided in one embodiment of this application;

[0025] Figure 3 This is a schematic diagram of the circuit structure of a low-noise amplifier provided in one embodiment of this application;

[0026] Figure 4 A schematic diagram of the circuit structure of a low-noise amplifier provided in another embodiment of this application;

[0027] Figure 5 A schematic diagram of the circuit structure of a low-noise amplifier provided in another embodiment of this application;

[0028] Figure 6 A schematic diagram of the circuit structure of a low-noise amplifier provided in another embodiment of this application;

[0029] Figure 7 A schematic diagram of the circuit structure of a low-noise amplifier provided in another embodiment of this application;

[0030] Figure 8 A schematic diagram of the circuit structure of a low-noise amplifier provided in another embodiment of this application;

[0031] Figure 9 A schematic diagram of the circuit structure of a low-noise amplifier provided in another embodiment of this application;

[0032] Figure 10 A schematic diagram of the circuit structure of a low-noise amplifier provided in another embodiment of this application;

[0033] Figure 11 This is a schematic diagram of the equivalent circuit of a low-noise amplifier.

[0034] Figure 12 for Figure 11 The equivalent circuit diagram of the circuit shown;

[0035] Figure 13 This is a schematic diagram of the equivalent circuit of another low-noise amplifier;

[0036] Figure 14 for Figure 13The equivalent circuit diagram of the circuit shown. Detailed Implementation

[0037] The embodiments of this application are described below with reference to the accompanying drawings. The terminology used in the implementation section of this application is for explaining specific embodiments only and is not intended to limit the scope of this application.

[0038] The embodiments of this application will now be described with reference to the accompanying drawings. Those skilled in the art will recognize that, with technological advancements and the emergence of new scenarios, the technical solutions provided in the embodiments of this application are equally applicable to similar technical problems.

[0039] The terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such terms are interchangeable where appropriate; this is merely a way of distinguishing objects with the same attributes in the embodiments of this application. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion, so that a process, method, system, product, or apparatus that comprises a series of elements is not necessarily limited to those elements, but may include other elements not explicitly listed or inherent to those processes, methods, products, or apparatuses.

[0040] As described in the background section, in low-noise amplifiers, the input traces and input capacitors, among other components, can introduce additional noise due to the presence of parasitic capacitance and / or parasitic resistance, thus affecting the performance of the low-noise amplifier.

[0041] Currently, the common solution in the industry is to reduce the parasitic resistance of input traces and input capacitors through layout optimization, thereby improving the Q value (quality factor) of input traces and input capacitors, which in turn reduces the insertion loss of the low-noise amplifier and improves the noise performance of the low-noise amplifier.

[0042] However, the above solutions all aim to reduce the insertion loss of the low-noise amplifier and improve its noise performance by minimizing the inherent losses of the input traces and input capacitors. During the application of a low-noise amplifier, the signal input to the input pads is transmitted to the amplifier circuit via the input traces and input capacitors. Parasitic capacitances are generated between the input traces and the substrate, as well as between the input capacitors and the substrate. These parasitic capacitances couple into the substrate.

[0043] Since the substrate is not an ideal insulator, it has distributed parasitic resistance (RsubP, RsubL1, RsubC, RsubL2). The signal energy coupled to the substrate will be lost in this resistance, which will lead to the deterioration of the noise performance of the low noise amplifier.

[0044] Specifically, such as Figure 1 As shown, the low-noise amplifier includes an input pad PAD, an input capacitor C, and an input trace L. The input trace L includes input trace L1 located between the input pad PAD and the input capacitor C, and input trace L2 located between the input capacitor C and the amplifier LNA. The parasitic resistance in the input pad PAD is R. P The parasitic resistance at the corresponding input pad region in the substrate is R. subP The parasitic capacitance between the input pad and the corresponding input pad region in the substrate is C. P The parasitic resistance in the input capacitor C is R. C The parasitic resistance at the region corresponding to the input capacitor in the substrate is R. subC The parasitic capacitance between the input capacitor and the corresponding input capacitor region in the substrate is C. C The parasitic resistance in the input trace L1 is R. L1 The parasitic resistance at the region corresponding to the input trace L1 in the substrate is R. subL1 The parasitic capacitance between the input trace L1 and the corresponding region of the input trace L1 in the substrate is C. L1 The parasitic resistance in the input trace L2 is R. L2 The parasitic resistance at the region corresponding to the input trace L2 in the substrate is R. subL2 The parasitic capacitance between the input trace L2 and the corresponding region of the input trace L2 in the substrate is C. L21 .

[0045] In view of this, embodiments of this application provide a low-noise amplifier, such as Figure 2 and Figure 3 As shown, it includes:

[0046] Substrate 10;

[0047] The component layer 20 located on the substrate includes: an input pad 21, an input capacitor 22, an input trace 23, and an amplifier circuit 24. The input trace 23 includes a first input trace 231 and a second input trace 232. The first input trace 231 is used to connect the input pad 21 and the input capacitor 22, and the second input trace 232 is used to connect the input capacitor 22 and the amplifier circuit 24.

[0048] The shielding layer 25 located on the substrate 10 is situated between the layer containing the input pad 21 and the layer containing the substrate 10 in a direction perpendicular to the plane of the substrate 10.

[0049] The shielding layer 25 has a first projection on the substrate 10, the input pad 21 has a second projection on the substrate 10, and the input capacitor 22 has a third projection on the substrate 10. The first projection covers at least one of the second projection and the third projection.

[0050] Specifically, in one embodiment of this application, the first projection covers the second projection. In this embodiment, in a direction perpendicular to the plane of the substrate, the shielding layer is located between the layer where the input pad is located and the layer where the substrate is located. Thus, when a signal is transmitted in the input pad, the shielding layer is used to shield the signal transmission in the input pad, avoiding the formation of parasitic capacitance between the input pad and the substrate when the signal is transmitted in the input pad. This prevents the parasitic capacitance from coupling into the substrate and causing losses, thereby improving the noise figure of the low-noise amplifier.

[0051] In another embodiment of this application, the first projection covers the third projection. In this embodiment, the shielding layer is located between the layer containing the input capacitor and the layer containing the substrate in a direction perpendicular to the plane of the substrate. This shields the signal transmitted in the input capacitor, preventing the formation of parasitic capacitance between the input capacitor and the substrate when the signal is transmitted in the input capacitor. This avoids the parasitic capacitance from coupling into the substrate and causing losses, thereby improving the noise figure of the low-noise amplifier.

[0052] In yet another embodiment of this application, as Figure 3 As shown, the first projection covers the second projection and the third projection. In this embodiment, the shielding layer 25 is located between the layer where the input capacitor 22 is located and the layer where the substrate 10 is located, and between the layer where the input pad 21 is located and the layer where the substrate 10 is located. Thus, when the signal input in the input pad 21 is transmitted to the amplifier circuit 24 through the input capacitor 22, the shielding layer 25 shields the signal transmitted in the input pad 21 and the signal transmitted in the input capacitor 22, avoiding the formation of parasitic capacitance between the input pad 21 and the substrate 10, and avoiding the formation of parasitic capacitance between the input capacitor 22 and the substrate 10. This prevents the parasitic capacitance from coupling into the substrate 10 and causing losses, thereby improving the noise figure of the low-noise amplifier.

[0053] As can be seen from the above, the low-noise amplifier provided in this application embodiment can, when the signal input in the input pad is transmitted to the amplification circuit through the input capacitor, use the shielding layer to shield the signal transmitted in the input pad and / or the signal transmitted in the input capacitor, thereby preventing the signal transmitted in the input pad from forming parasitic capacitance between the input pad and the substrate, and / or preventing the signal transmitted in the input capacitor from forming parasitic capacitance between the input capacitor and the substrate, thereby preventing the parasitic capacitance from coupling into the substrate and causing loss, affecting the noise performance of the low-noise amplifier, so as to improve the noise performance of the low-noise amplifier.

[0054] Based on any of the above embodiments, in one embodiment of this application, the component layer includes a multilayer structure, the input pad and the input capacitor are located in different layers of the component layer, and optionally, the layer where the input capacitor is located is located between the layer where the input pad is located and the layer where the substrate is located.

[0055] Based on the above embodiments, in one embodiment of this application, the second projection covers the third projection. In this embodiment, the first projection can cover either the second projection or the third projection. Optionally, the first projection covers the second projection, that is, the first projection covers the larger of the second and third projections, so that the first projection covers both the second and third projections. The shielding layer is located between the layer containing the input capacitor and the layer containing the substrate. Therefore, when the signal input from the input pad is transmitted to the amplifier circuit via the input capacitor, the shielding layer shields both the signal transmitted from the input pad and the signal transmitted from the input capacitor. This prevents the signal transmitted from the input pad from forming parasitic capacitance between the input pad and the substrate, and also prevents the signal transmitted from the input capacitor from forming parasitic capacitance between the input capacitor and the substrate. This avoids the parasitic capacitance coupling into the substrate and causing losses, thereby improving the noise figure of the low-noise amplifier. In other embodiments of this application, the first projection may also cover the smaller of the second and third projections, but not the larger of the second and third projections. This application does not limit this; it depends on the specific circumstances.

[0056] It should be noted that, in this embodiment, if the first projection covers the smaller of the second projection and the third projection, that is, the first projection covers the third projection but does not cover the second projection, the shielding layer is located between the layer where the input capacitor is located and the layer where the substrate is located. This shields the signal transmitted in the input capacitor, preventing the signal generated in the input capacitor from forming a parasitic capacitance between the input capacitor and the substrate. This prevents the parasitic capacitance from coupling into the substrate and causing losses, thus affecting the performance of the low-noise amplifier.

[0057] It should also be noted that, in the above embodiments, if there is a first overlapping area between the second projection and the third projection, and the first projection covers the third projection, the first projection can also shield the signal transmitted in the input pad in the first overlapping area, reduce the parasitic capacitance formed between the input pad and the substrate by the signal transmitted in the input pad, thereby reducing the loss generated by the parasitic capacitance in the substrate and improving the coefficient of the low noise amplifier.

[0058] In another embodiment of this application, the third projection covers the second projection. In this embodiment, the first projection can cover either the second projection or the third projection. Optionally, the first projection covers the third projection, that is, the first projection covers the larger of the second and third projections, so that the first projection covers both the second and third projections. The shielding layer is located between the layer containing the input capacitor and the layer containing the substrate. Therefore, when the signal input from the input pad is transmitted to the amplifier circuit via the input capacitor, the shielding layer shields both the signal transmitted from the input pad and the signal transmitted from the input capacitor. This prevents the signal transmitted from the input pad from forming parasitic capacitance between the input pad and the substrate, and also prevents the signal transmitted from the input capacitor from forming parasitic capacitance between the input capacitor and the substrate. This avoids the parasitic capacitance coupling into the substrate and causing losses, thus improving the noise figure of the low-noise amplifier. In other embodiments of this application, the first projection may also cover the smaller of the second and third projections, but not the larger of the second and third projections. This application is not limited in this respect; it depends on the specific circumstances.

[0059] It should be noted that, in this embodiment, if the first projection covers the smaller of the second projection and the third projection, that is, the first projection covers the second projection but does not cover the third projection, the shielding layer can be located between the layer where the input pad is located and the layer where the input capacitor is located, or it can be located between the layer where the input capacitor is located and the layer where the substrate is located. This shields the signal transmitted in the input pad, preventing the signal generated in the input pad from forming a parasitic capacitance between the input pad and the substrate, thereby preventing the parasitic capacitance from coupling into the substrate and causing losses, which would affect the performance of the low-noise amplifier.

[0060] It should also be noted that, in the above embodiments, if there is a first overlapping area between the second projection and the third projection, and the shielding layer is located between the layer where the input capacitor is located and the layer where the substrate is located, when the first projection covers the second projection, in the first overlapping area, the first projection can also shield the signal transmitted in the input capacitor, reduce the parasitic capacitance formed between the input capacitor and the substrate by the signal transmitted in the input capacitor, thereby reducing the loss generated by the parasitic capacitance in the substrate and improving the coefficient of the low-noise amplifier.

[0061] The above embodiments describe the low-noise amplifier provided in this application by taking the second projection covering the third projection or the third projection covering the second projection as an example. In other embodiments of this application, the second projection and the third projection may at least partially not overlap.

[0062] Specifically, in one embodiment of this application, the component layer includes a multi-layer structure, with the input pad and the input capacitor located on different layers within the component layer, and the second projection and the third projection at least partially not overlapping. It should be noted that in this embodiment, "at least partially not overlapping" includes partial overlap, partial non-overlap, and complete non-overlap, meaning that in this embodiment, the second projection does not cover the third projection, and the third projection does not cover the second projection.

[0063] Optionally, in one embodiment of this application, when the second projection and the third projection at least partially overlap, the first transmission trace may be a conductive via electrically connecting the input pad and the input capacitor in the overlapping area of ​​the second projection and the third projection, or it may include a conductive via electrically connecting the layer where the input pad is located and the layer where the input capacitor is located, and a metal trace electrically connecting the conductive via and the input pad / input capacitor; when the second projection and the third projection do not overlap, the first input trace includes a conductive via electrically connecting the layer where the input pad is located and the layer where the input capacitor is located, and a metal trace electrically connecting the conductive via and the input pad / input capacitor.

[0064] Based on the above embodiments, in one embodiment of this application, the first projection covers the second projection but does not cover the third projection. In this embodiment, the shielding layer can be located between the input pad layer and the input capacitor layer, or between the input capacitor layer and the substrate layer, to shield the signal transmitted in the input pad, thereby preventing the signal generated in the input pad from forming a parasitic capacitance between the input pad and the substrate, and thus preventing the parasitic capacitance from coupling into the substrate and causing loss, which would affect the performance of the low-noise amplifier.

[0065] It should also be noted that, in the above embodiments, if there is a first overlapping area between the second projection and the third projection, and the shielding layer is located between the layer where the input capacitor is located and the layer where the substrate is located, when the first projection covers the second projection, in the first overlapping area, the first projection can also shield the signal transmitted in the input capacitor, reduce the parasitic capacitance formed between the input capacitor and the substrate by the signal transmitted in the input capacitor, thereby reducing the loss generated by the parasitic capacitance in the substrate and improving the coefficient of the low-noise amplifier.

[0066] In another embodiment of this application, the first projection covers the third projection but does not cover the second projection. The shielding layer is located between the layer containing the input capacitor and the layer containing the substrate. It shields the signal transmitted in the input capacitor to prevent the signal generated in the input capacitor from forming a parasitic capacitance between the input capacitor and the substrate. This prevents the parasitic capacitance from coupling into the substrate and causing losses, thus affecting the performance of the low-noise amplifier.

[0067] It should also be noted that, in the above embodiments, if there is a first overlapping area between the second projection and the third projection, and the first projection covers the third projection, the first projection can also shield the signal transmitted in the input pad in the first overlapping area, reduce the parasitic capacitance formed between the input pad and the substrate by the signal transmitted in the input pad, thereby reducing the loss generated by the parasitic capacitance in the substrate and improving the coefficient of the low noise amplifier.

[0068] In another embodiment of this application, the first projection covers the second projection and the third projection, and the shielding layer is located between the layer containing the input capacitor and the layer containing the substrate. Thus, when the signal input from the input pad is transmitted to the amplifier circuit via the input capacitor, the shielding layer shields both the signal transmitted from the input pad and the signal transmitted from the input capacitor. This prevents the signal transmitted from the input pad from forming parasitic capacitance between the input pad and the substrate, and also prevents the signal transmitted from the input capacitor from forming parasitic capacitance between the input capacitor and the substrate. This avoids the parasitic capacitance coupling into the substrate and causing losses, thereby improving the noise figure of the low-noise amplifier.

[0069] Since the input trace is a metal trace, parasitic capacitance will also be formed between the input trace and the substrate when the signal is transmitted in the input trace. Therefore, based on any of the above embodiments, in one embodiment of this application, the following continues... Figure 3 As shown, the first projection also covers the projection of the first input trace 231 on the substrate 10. In this embodiment, the shielding layer is also located between the layer where the first input trace is located and the layer where the substrate is located. So when the signal is transmitted in the first input trace, the shielding layer is used to shield the signal transmitted in the first input trace, so as to avoid the signal transmitted in the first input trace from forming parasitic capacitance between the first input trace and the substrate, thereby avoiding the parasitic capacitance from coupling into the substrate and generating loss in the substrate, affecting the noise performance of the low noise amplifier, so as to further improve the noise figure of the low noise amplifier.

[0070] In another embodiment of this application, such as Figure 4As shown, the first projection also covers the projection of the second input trace 232 on the substrate. In this embodiment, the shielding layer is located between the layer where the second input trace is located and the layer where the substrate is located. Thus, when a signal is transmitted in the second input trace, the shielding layer is used to shield the signal transmitted in the second input trace, avoiding the formation of parasitic capacitance between the second input trace and the substrate. This prevents the parasitic capacitance from coupling into the substrate, causing losses in the substrate, affecting the noise performance of the low-noise amplifier, and further improving the noise figure of the low-noise amplifier.

[0071] Based on any of the above embodiments, in one embodiment of this application, the following continues... Figure 3 and Figure 4 As shown, the shielding layer 25 is grounded to prevent the formation of parasitic capacitance between the shielding layer and the substrate, which would couple into the substrate and affect the noise performance of the low-noise amplifier. It should be noted that in this embodiment, the shielding layer grounding can be a direct grounding (i.e., directly connected to the grounding point in the low-noise amplifier) ​​or an indirect grounding; this application does not limit this, and the choice depends on the specific circumstances.

[0072] Optionally, in one embodiment of this application, the following continues... Figure 3 As shown, the amplifier circuit 24 includes an amplifier transistor T1 and a first inductor L1. The gate of the amplifier transistor T1 is electrically connected to the second input trace 232, meaning the gate of the amplifier transistor T1 is the input terminal of the amplifier circuit 24. It is electrically connected to the input capacitor 22 via the second input trace 232. The source of the amplifier transistor T1 is grounded through the first inductor L1. Specifically, the source of the amplifier transistor T1 is electrically connected to the first end of the first inductor L1, and the second end of the first inductor L1 is grounded, with the second end of the first inductor L1 opposite to the first end. In this embodiment, the shielding layer 25 is electrically connected to a predetermined position of the first inductor L1 to ground the shielding layer 25.

[0073] Based on the above embodiments, in one embodiment of this application, such as Figure 5 and Figure 6 As shown, the preset position may include the first end of the first inductor L1, that is, the shielding layer 25 may be electrically connected to one end of the first inductor L1, that is, electrically connected to the source of the amplifying tube T1, so that the shielding layer 25 is grounded through the first inductor L1; in another embodiment of this application, as Figure 7 and Figure 8As shown, the preset position may include the second end of the first inductor L1, that is, the shielding layer 25 may be electrically connected to the second end of the first inductor L1, that is, the shielding layer 25 is directly grounded and shares the same grounding point with the first inductor L1. This application does not limit this. In other embodiments of this application, when the shielding layer 25 is directly grounded, a separate grounding point may also be set to be electrically connected to the shielding layer 25, and so on. Figure 3 and Figure 4 As shown, the grounding of the shielding layer is achieved, depending on the specific circumstances.

[0074] In another embodiment of this application, the first inductor is an adjustable inductor. In this embodiment, such as... Figure 9 and Figure 10 As shown, the preset position may also include the adjustable end of the first inductor L1, that is, the shielding layer 25 is electrically connected to the adjustable end of the first inductor L1, that is, the shielding layer 25 is electrically connected to the tap of the first inductor L1, so that the shielding layer 25 is grounded through part of the first inductor L1.

[0075] Based on any of the above embodiments, in one embodiment of this application, the amplifying transistor T1 is a field-effect transistor (FET) or a bipolar junction transistor (BJT). In this embodiment, the shielding layer 25 can be grounded not only through the first inductor L1, but also through the amplifying transistor T1. Specifically, the shielding layer 25 is electrically connected to the body electrode of the amplifying transistor T1 so that the shielding layer 25 is grounded. However, this application does not limit this and it depends on the specific circumstances.

[0076] Optionally, if the projection of the gate of the amplifier transistor on the substrate at least partially overlaps with the projection of the input capacitor on the substrate, the second input trace may be a conductive via electrically connecting the gate of the amplifier transistor and the input capacitor in the overlapping region, or it may include a conductive via electrically connecting the layer containing the gate of the amplifier transistor and the layer containing the input capacitor, and a metal trace electrically connecting the conductive via and the gate / input capacitor of the amplifier transistor; if the projection of the gate of the amplifier transistor on the substrate does not overlap with the projection of the input capacitor on the substrate, the second input trace includes a conductive via electrically connecting the layer containing the gate of the amplifier transistor and the layer containing the input capacitor, and a metal trace electrically connecting the conductive via and the gate / input capacitor of the amplifier transistor.

[0077] Based on any of the above embodiments, in one embodiment of this application, the following continues... Figure 3As shown, the amplifier circuit 24 further includes a common-gate transistor T2. The gate of the common-gate transistor T2 and the gate of the amplifier transistor T1 are both electrically connected to the bias voltage terminal Vbias through a bias resistor R. The source of the common-gate transistor T2 is electrically connected to the drain of the amplifier transistor T1. The drain of the common-gate transistor T2 is grounded through a second inductor L2. The common-gate transistor T2 and the amplifier transistor T1 constitute a common-source common-gate transistor. In this embodiment, the gate of the common-gate transistor T2 is also grounded through a grounding capacitor 27, and the drain of the common-gate transistor T2 is also connected to the output terminal of the amplifier circuit 24 through an output capacitor 26.

[0078] Based on any of the above embodiments, in one embodiment of this application, the low-noise amplifier further includes other passive devices located above the substrate. In this embodiment, the first projection may also cover the projection of at least one of the other passive devices on the substrate, and the shielding layer is located between the substrate layer and the passive device layer to shield the signal transmitted in the passive device, so as to prevent the signal transmitted in the passive device from forming parasitic capacitance between the passive device and the substrate and coupling into the substrate, thereby affecting the noise performance of the low-noise amplifier.

[0079] It should be noted that in any of the above embodiments, the shape of the shielding layer can be a regular shape or an irregular shape. This application does not limit the shape of the shielding layer, and it can be set according to specific usage requirements.

[0080] Based on any of the above embodiments, in one embodiment of this application, the low-noise amplifier is used to transmit low-frequency signals in order to reduce the size of the low-noise amplifier while improving its noise figure. However, this application is not limited to this, and in other embodiments of this application, the low-noise amplifier can also be used to transmit high-frequency signals, depending on the specific circumstances.

[0081] like Figure 11 As shown, Figure 11 This is a circuit diagram of a low-noise amplifier. Figure 12 for Figure 11 The equivalent circuit diagram of the circuit shown is provided. Figure 12 It can be seen that the input equivalent impedance of this low-noise amplifier is:

[0082] (1)

[0083] in, f is the signal frequency.

[0084] Since the input capacitance Cg is generally quite large and the corresponding impedance is very low, it can be ignored. Therefore, the above formula (1) can be simplified to:

[0085] (2)

[0086] To achieve input impedance matching of the low-noise amplifier to 50 ohms, Zin needs to be 50 ohms. At this point, the real part of the input impedance Zin... The imaginary part of the input impedance Zin For MOSFETs, lower frequencies result in higher gm values; therefore, to satisfy this requirement... Cgs needs to be increased because The lower the frequency f, the smaller w is. The decrease is faster. If you want the increase in Cgs and gm to be synchronized, you need to increase... .

[0087] It should be noted that in this application, adding a grounded shielding layer to the low-noise amplifier introduces parasitic capacitance between the shielding layer and the input pads and / or input capacitors, which is equivalent to introducing a grounding capacitance Cc into the low-noise amplifier. Figure 13 and Figure 14 As shown, Figure 13 This is a schematic diagram of the equivalent circuit after adding a shielding layer. Figure 14 for Figure 13 The equivalent circuit diagram is shown below. Since Cg is a DC blocking capacitor, its impedance is 1 / (Cg×w). However, Cg typically takes a very large value, so its impedance is approximately 0 (1 / (Cg×w)) and can be ignored. Figure 14 It can be seen that, neglecting Cg, the input impedance of the low-noise amplifier is:

[0088]

[0089] (3)

[0090] To satisfy the real part of the input impedance Zin As can be seen from the formula, when Cc equals 0, the real part of the input impedance Zin can be simplified to the previous value. When Cc is not equal to 0, Cc is in the denominator of the formula for the real part of the input impedance Zin. At lower frequencies, since gm is larger, in order to maintain the real part of the input impedance Zin... The denominator needs to be increased. The introduction of Cc increases the denominator. With Cgs remaining unchanged, the introduction of Cc can increase the denominator, which is beneficial to meet the matching requirements of the lower frequency real part.

[0091] To satisfy the imaginary part of the input impedance Zin

[0092] =0; (4)

[0093] When Cc=0, the imaginary part of the input impedance Zin can also be simplified to... When Cc≠0, we can obtain from formula (4):

[0094] (5)

[0095] Analyze the formula (5) and Relationship, assuming ;

[0096] but ;

[0097] In formula (5), within the square root In the middle, the first term A The term is much larger than the latter term, so the radical term in formula (5) is much larger. ,

[0098] for The square root term, i.e. hour: And because , ,so,

[0099] By comparing T with The size, i.e., the contrast and Size, using Divide by ,get Due to low frequency This ratio is very small. ,so Compare Much larger, negligible This item, at this moment, (6)

[0100] It can be seen from formula (6) that, .

[0101] for The square root term, i.e. hour:

[0102] It should be noted that for mathematical equations (in In the case of ), we can obtain the following using binomial expansion [Taylor series expansion]:

[0103] Apply this formula to From this, we can obtain ,therefore ,

[0104] at this time, (7)

[0105] As can be seen from formula (7), as the frequency changes towards lower frequencies, The faster the decrease, the smaller the magnitude. The dominant term in the text is the first term, namely... ;

[0106] (follow) (Almost unchanged, negative, meaningless).

[0107] Therefore, for The square root term, i.e. This is a meaningless result and should be discarded; Cc can only be equal to... This result shows that In low-frequency applications, with Cgs remaining constant, the introduction of Cc can increase the denominator, which is beneficial for meeting the matching requirements of the real part at lower frequencies. In other words, in low-frequency applications, the introduction of Cc can reduce the amount of increase required for Cgs and reduce the size of Cgs while meeting the matching requirements of the real part at lower frequencies, thereby reducing the size of the low-noise amplifier.

[0108] In summary, the low-noise amplifier provided in this application embodiment can, when a signal input from the input pad is transmitted to the amplification circuit via the input capacitor, utilize the shielding layer to shield the signal transmitted from the input pad and / or the signal transmitted from the input capacitor. This prevents the signal transmitted from the input pad from forming parasitic capacitance between the input pad and the substrate, and / or prevents the signal transmitted from the input capacitor from forming parasitic capacitance between the input capacitor and the substrate. Consequently, it avoids the parasitic capacitance from coupling into the substrate and causing losses, thus affecting the noise performance of the low-noise amplifier and improving its noise performance.

[0109] The various embodiments in this specification are described in a progressive, parallel, or combined manner. Each embodiment focuses on its differences from other embodiments, and similar or identical parts between embodiments can be referred to interchangeably. For the apparatuses disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple, and relevant parts can be referred to the method section.

[0110] It should be noted that, in the description of this application, the accompanying drawings and embodiments are illustrative rather than restrictive. It should also be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that an article or device comprising a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or device. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in an article or device comprising the aforementioned element.

[0111] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A low-noise amplifier, characterized in that, include: Substrate; A component layer located on the substrate, the component layer including: input pads, input capacitors, input traces and amplifier circuits, the input traces including a first input trace and a second input trace, the first input trace being used to connect the input pads and the input capacitors, and the second input trace being used to connect the input capacitors and the amplifier circuits; A shielding layer located on the substrate, in a direction perpendicular to the plane of the substrate, is situated between the layer containing the input pad and the layer containing the substrate; The shielding layer has a first projection on the substrate, the input pad has a second projection on the substrate, and the input capacitor has a third projection on the substrate, wherein the first projection covers at least one of the second projection and the third projection.

2. The low-noise amplifier according to claim 1, characterized in that, The component layer includes a multi-layer structure, with the input pad and the input capacitor located on different layers within the component layer, and the second projection covering the third projection or the third projection covering the second projection.

3. The low-noise amplifier according to claim 2, characterized in that, The first projection covers the larger of the second and third projections, and the shielding layer is located between the layer containing the input capacitor and the layer containing the substrate.

4. The low-noise amplifier according to claim 1, characterized in that, The component layer includes a multi-layer structure, with the input pads and the input capacitors located on different layers within the component layer, and the second projection and the third projection not overlapping at least partially.

5. The low-noise amplifier according to claim 4, characterized in that, The first projection covers the second projection and the third projection, and the shielding layer is located between the layer containing the input capacitor and the layer containing the substrate.

6. The low-noise amplifier according to claim 1, characterized in that, The first projection also covers the projection of the first input trace on the substrate, and the shielding layer is located between the layer containing the first input trace and the layer containing the substrate; and / or, the first projection also covers the projection of the second input trace on the substrate, and the shielding layer is located between the layer containing the second input trace and the layer containing the substrate.

7. The low-noise amplifier according to any one of claims 1-6, characterized in that, The shielding layer is grounded.

8. The low-noise amplifier according to any one of claims 1-6, characterized in that, The amplifier circuit includes: an amplifier transistor and a first inductor. The gate of the amplifier transistor is electrically connected to the second input trace, the source of the amplifier transistor is electrically connected to the first end of the first inductor, and the second end of the first inductor is grounded. The shielding layer is electrically connected to a preset position of the first inductor, the preset position including a first end and a second end of the first inductor.

9. The low-noise amplifier according to claim 8, characterized in that, The first inductor is an adjustable inductor, and the preset position further includes: the adjustable terminal of the first inductor.

10. The low-noise amplifier according to any one of claims 1-6, characterized in that, The amplifier circuit includes: an amplifier transistor and a first inductor. The gate of the amplifier transistor is electrically connected to the second input trace, the source of the amplifier transistor is electrically connected to the first end of the first inductor, and the second end of the first inductor is grounded. The amplifier tube is a field-effect transistor or a bipolar junction transistor; The shielding layer is electrically connected to the body electrode of the amplifier tube.

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