High-resistance silicon single-chip radio frequency switch and radio frequency front-end module

CN224843731UActive Publication Date: 2026-10-09XINPLETEK SHANGHAI CO LTD
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Patent Information

Application Number
CN202522220908.X
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-10-21
Publication Date
2026-10-09
Estimated Expiration
2035-10-21

AI Technical Summary

Technical Problem

[0004]本实用新型的目的在于提供一种高阻硅单芯片射频开关及射频前端模组,解决在高阻硅单芯片上集成控制电路和射频开关时隔离度不足的问题,实现低成本、高性能的单芯片射频开关

Benefits of technology

本实用新型提出的高阻硅单芯片射频开关,在高阻硅单芯片上的控制模块与射频开关模块之间设置隔离结构,形成有效的衰减网络,提高了控制模块与射频开关模块之间的隔离度。

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model belongs to the field of electronic devices, disclose a kind of high resistance silicon single-chip radio frequency switch and radio frequency front-end module. The high resistance silicon single-chip radio frequency switch includes high resistance silicon single-chip and radio frequency substrate, and the high resistance silicon single-chip is fixed on the radio frequency substrate;Control module and radio frequency switch module are equipped on the high resistance silicon single-chip, and isolation structure is equipped between the control module and the radio frequency switch module, and the isolation structure is used to improve the isolation between the control module and the radio frequency switch module, to effectively attenuate the noise signal generated by control module, prevent noise signal from being coupled to radio frequency switch module by substrate, to reduce chip manufacturing cost while ensuring radio frequency performance.
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Description

Technical Field

[0001] This utility model relates to the field of electronic devices, and in particular to a high-resistivity silicon single-chip radio frequency switch and radio frequency front-end module. Background Technology

[0002] Radio frequency (RF) switches are key components in RF communication systems, used to control the switching of RF signals between different transmission paths. With the rapid development of mobile communication technology, the performance requirements for RF switches are constantly increasing, especially in high-frequency, multi-band, and multi-mode applications, where RF switches need to possess characteristics such as low insertion loss, high isolation, and good linearity.

[0003] Achieving the highest possible isolation is a key aspect of radio frequency switches. Utility Model Content

[0004] The purpose of this invention is to provide a high-resistivity silicon single-chip RF switch and RF front-end module, which solves the problem of insufficient isolation when integrating control circuits and RF switches on a high-resistivity silicon single chip, and realizes a low-cost, high-performance single-chip RF switch.

[0005] To address the aforementioned technical problems, this utility model provides a high-resistivity silicon single-chip RF switch and an RF front-end module. On one hand, the high-resistivity silicon single-chip RF switch proposed in this utility model includes a high-resistivity silicon single chip and an RF substrate, wherein the high-resistivity silicon single chip is fixed on the RF substrate; The high-resistivity silicon single chip is provided with a control module and an RF switch module. An isolation structure is provided between the control module and the RF switch module to improve the isolation between the control module and the RF switch module.

[0006] Furthermore, the isolation structure includes a PWell isolation strip, a pad, and a connecting line; the PWell isolation strip is disposed between the control module and the RF switch module, the pad is provided on one side of the PWell isolation strip, one end of the connecting line is connected to the pad, and the other end is connected to the ground on the RF substrate.

[0007] Furthermore, the isolation structure includes two PWell isolation strips, two pads, and two connection lines; The two PWell isolation strips are arranged in parallel between the control module and the RF switch module. One side of one PWell isolation strip has a pad, and the opposite side of the other PWell isolation strip has another pad. One end of the two connecting lines is connected to the first pad and the second pad, respectively, and the other end is connected to the ground on the RF substrate.

[0008] Furthermore, the PWell isolation band includes a deep P-type doped layer, a P-type doped layer, and a metal layer; The deep P-type doped layer is located above the high-resistivity silicon single chip, the P-type doped layer is located above the deep P-type doped layer, the metal layer is located above the P-type doped layer, and the metal layer is electrically connected to the P-type doped layer through a contact hole.

[0009] Furthermore, the metal layer is aluminum, copper, or an alloy thereof.

[0010] Furthermore, the contact hole is filled with tungsten or other conductive materials.

[0011] Furthermore, the isolation structure and the high-resistivity silicon single chip together form an attenuation network, which includes the equivalent horizontal resistance formed by the high-resistivity silicon single chip and the equivalent vertical resistance formed by the isolation structure, wherein the equivalent horizontal resistance and the equivalent vertical resistance together constitute a π-type network structure.

[0012] Furthermore, the equivalent horizontal resistance includes three horizontal resistors connected in series, and the equivalent vertical resistance includes two vertical resistors; one vertical resistor is connected between the connection node of the first and second horizontal resistors and ground, and the other vertical resistor is connected between the connection node of the second and third horizontal resistors and ground.

[0013] On the other hand, the present invention proposes a radio frequency front-end module, including the above-mentioned high-resistivity silicon single-chip radio frequency switch, wherein the radio frequency front-end module is used to process radio frequency signals in communication equipment.

[0014] Compared with the prior art, the present invention has at least the following beneficial effects: The high-resistivity silicon single-chip RF switch proposed in this invention features an isolation structure between the control module and the RF switch module on the high-resistivity silicon single chip, forming an effective attenuation network and improving the isolation between the control module and the RF switch module.

[0015] Furthermore, the isolation structure utilizes the π-type network structure formed by the PWell isolation band and the high-resistivity silicon substrate to effectively attenuate the noise signal generated by the control module and prevent the noise signal from coupling to the RF switch module through the substrate, thereby reducing the chip manufacturing cost while ensuring RF performance. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the structure of a radio frequency switch; Figure 2 This is a schematic diagram of another type of radio frequency switch; Figure 3 This is a schematic diagram of a radio frequency switch in one embodiment of the present invention; Figure 4 This is a schematic diagram of the specific structure of the radio frequency switch in one embodiment of the present invention; Figure 5 for Figure 4 A schematic diagram of the cross-section of line A-A'; Figure 6 This is an equivalent circuit diagram of the isolation structure in one embodiment of the present invention.

[0017] Reference numerals: 1. RF substrate; 21. CMOS chip; 22. SOI chip; 23. High-resistivity silicon single chip; 3. Control module; 4. RF switch module; 5. Isolation structure; 6. P-type isolation strip; 7. Connecting line; 8. Pad; 9. Deep P-type doped layer; 10. P-type doped layer; 11. Metal layer; R HRS Horizontal resistance; R PW Vertical resistance. Detailed Implementation

[0018] Based on the teachings of this specification, those skilled in the art can form new technical solutions by combining different implementation methods without creating technical contradictions. Such variations should be considered to fall within the protection scope of this patent.

[0019] The following is a more detailed description of a high-resistivity silicon single-chip RF switch and RF front-end module of the present invention, with reference to the accompanying drawings. Preferred embodiments of the present invention are shown. It should be understood that those skilled in the art can modify the present invention described herein while still achieving its advantageous effects. Therefore, the following description should be understood as being of general knowledge to those skilled in the art and is not intended to limit the present invention.

[0020] The present invention will be described in more detail below by way of example with reference to the accompanying drawings. The advantages and features of the present invention will become clearer from the following description. It should be noted that the drawings are in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.

[0021] It should be noted that in the illustrations, components that are identical or similar to those in the prior art are labeled with the same numbers for ease of understanding and correspondence. The actual differences between the components will be described in detail below.

[0022] In its long-term research and development, the applicant believes that an RF switch generally consists of two parts: an RF switch and a control module. Two structures have been further studied: one consists of two independent chips and an RF substrate 1, where the controller uses a CMOS chip 21 and the RF switch uses an SOI chip 22, as shown below. Figure 1As shown; another type is a structure consisting of a single SOI switch chip and an RF substrate, such as... Figure 2 As shown.

[0023] SOI (Silicon-On-Insulator) chips, due to their unique substrate structure, possess excellent isolation characteristics, effectively reducing interference from control circuit noise to radio frequency (RF) signals. However, the high manufacturing cost of SOI chips increases the overall product cost. While CMOS chips are cheaper, their substrate isolation is poor, allowing noise generated by the control circuit to easily couple to the RF circuit through the substrate, leading to degraded RF performance. Furthermore, while using a two-chip structure can achieve good isolation through physical separation, it also introduces additional packaging costs and increased size, hindering the miniaturization and integration of the RF front-end.

[0024] In single-chip integration solutions, integrating the control circuit and RF switch onto the same chip can reduce packaging costs and size, but it presents isolation challenges. This is especially true on high-resistivity silicon single-chip solutions, where the characteristics of high-resistivity silicon make it easier for digital switching noise generated by the control circuit to propagate through the substrate to the RF switch circuit, severely impacting key performance indicators such as isolation and insertion loss.

[0025] Based on this, the applicant made further improvements by setting a specific isolation structure between the control circuit and the RF switch on the same high-resistivity silicon chip, thereby improving the isolation between the control circuit and the RF switch and reducing the impact of noise.

[0026] Example 1 like Figures 3 to 5 As shown, this utility model proposes a high-resistivity silicon single-chip radio frequency switch, including a high-resistivity silicon single chip 23 and a radio frequency substrate 1, wherein the high-resistivity silicon single chip 23 is fixed on the radio frequency substrate 1.

[0027] Specifically, the high-resistivity silicon single chip 23 is provided with a control module 3 and an RF switch module 4. An isolation structure 5 is provided between the control module 3 and the RF switch module 4. The isolation structure 5 is used to improve the isolation between the control module 3 and the RF switch module 4.

[0028] The high-resistivity silicon single-chip 23 uses high-resistivity silicon material as a substrate. This high resistivity effectively reduces substrate current conduction and parasitic effects, resulting in lower signal loss in high-frequency applications. The RF substrate 1 can be a ceramic substrate, FR4 substrate, or other substrate materials suitable for RF applications, providing mechanical support and electrical connection functions. The control module 3 is responsible for receiving external logic signals and converting them into control signals suitable for driving the RF switch module 4, improving the system's flexibility and functional integration through signal processing.

[0029] In this embodiment, the isolation structure 5 includes a P-well isolation strip 6, a pad 8, and a connecting line 7. The P-well isolation strip 6 is disposed between the control module 3 and the RF switch module 4. The pad 8 is provided on one side of the P-well isolation strip 6. One end of the connecting line 7 is connected to the pad 8, and the other end is connected to the ground on the RF substrate 1.

[0030] The P-Well isolation band 6 is a P-type doped region formed on a high-resistivity silicon substrate. Due to its low resistance, the P-type doped region can form a low-resistivity path from the chip surface to the chip interior, providing a path for noise signals to be emitted to ground and reducing noise coupling between the control module 3 and the RF switch module 4. The pads 8 are typically made of metal and provide connection points to external interconnects, enhancing the reliability and mechanical strength of the electrical connection. The connecting lines 7 are typically made of metal wires (such as gold or aluminum wires) and connect the pads 8 to the ground on the RF substrate 1, forming a complete grounding path, allowing noise signals to be effectively conducted to the ground terminal.

[0031] In practical use, depending on the required isolation level between the control circuit and the RF switch, the number of the PWell isolation band 6, the solder pads 8, and the connecting lines 7 can be increased or decreased accordingly.

[0032] In one specific embodiment, the isolation structure 5 includes two P-well isolation bands 6, two pads 8, and two connecting lines 7. The two P-well isolation bands 6 are arranged in parallel between the control module 3 and the RF switch module 4. One pad is provided on one side of one P-well isolation band 6, and another pad is provided on the opposite side of the other P-well isolation band 6. One end of each of the two connecting lines 7 is connected to one pad 8 and the other pad 8, respectively, and the other end is connected to ground on the RF substrate 1. Placing the two pads on opposite sides of the P-well isolation bands 6 allows the two pads 8 to be located on both sides of the high-resistivity silicon single chip 23, forming a more balanced grounding path. This avoids the imbalance problem caused by the grounding current being concentrated on one side, which is beneficial for improving the isolation effect and reducing noise coupling.

[0033] In this embodiment, the width between the two PWell isolation bands 6 can be selected to be approximately 30 micrometers. This width provides sufficient isolation without excessively increasing the chip's area consumption. It is understood that the spacing between the two PWell isolation bands 6 can be flexibly set according to different needs, allowing the spacing to provide good isolation while maintaining reasonable chip area utilization. It should be noted that a larger spacing between the PWell isolation bands results in better isolation, but also increases the overall chip area. The specific spacing setting can be determined by balancing isolation effectiveness and area consumption based on the specific application scenario.

[0034] In addition, the distances between the control module 3 and the PWell isolation band 6, and between the RF switch module 4 and the PWell isolation band 6, are also important factors affecting the isolation effect. Generally, these distances can be adjusted according to the chip layout and isolation requirements, typically remaining within the range of tens to hundreds of micrometers. Closer distances result in smaller chip areas but may reduce the isolation effect; greater distances provide better isolation but increase the chip area.

[0035] It is worth noting that the number, width, spacing, and distance from the functional modules of the PWell isolation bands 6 all affect the final isolation effect. Generally speaking, increasing the number of PWell isolation bands, increasing the width of the isolation bands, and increasing the spacing between the isolation bands can improve the isolation, but it will also increase the chip area consumption. In actual design, the most suitable combination of parameters should be selected according to the specific requirements of the product for isolation and chip area.

[0036] In this embodiment, the PWell isolation band 6 includes a deep P-type doped layer 9, a P-type doped layer 10, and a metal layer 11.

[0037] The deep P-type doped layer 9 is located in the substrate of the high-resistivity silicon single chip 23, the P-type doped layer 10 is located above the deep P-type doped layer 9 to the upper surface of the substrate, the metal layer 11 is located above the P-type doped layer 10, and the metal layer 11 is electrically connected to the P-type doped layer 10 through a contact hole.

[0038] The deep P-type doped layer 9 has a low doping concentration and is mainly used to form a low-resistivity region extending from the chip surface into the chip interior, increasing the contact area with the substrate and improving noise collection efficiency. The P-type doped layer 10 has a relatively higher doping concentration than the deep P-type doped layer 9 and a lower resistivity, used to form a region with good contact with the metal layer 11, reducing contact resistance and improving noise conduction efficiency. The metal layer 11 covers the P-type doped layer 10 and forms an electrical connection with the P-type doped layer 10 through the contact hole, used to guide current from the P-type doped layer 10 to the pad 8, forming a complete current path. At the same time, the metal layer 11 also blocks the propagation of electromagnetic waves, reducing electromagnetic wave radiation and coupling through the Faraday shielding principle, which can further improve the isolation between the control module 3 and the RF switch module 4, and enhance the anti-interference capability of the RF switch in a high-frequency environment.

[0039] In this embodiment, the metal layer 11 is aluminum, copper, or an alloy thereof. Aluminum, copper, or their alloys have good electrical conductivity and compatibility with semiconductor processes, strong corrosion resistance, and good ductility and solderability, making them suitable for forming metal interconnects on a chip.

[0040] Furthermore, the contact hole is filled with tungsten or other conductive materials, thereby providing a low-impedance path from the metal layer 11 to the P-type doped layer 10, ensuring that current can flow smoothly from the metal layer 11 to the P-type doped layer 10, while also having good thermal stability and mechanical strength, improving the reliability of the overall structure.

[0041] In this embodiment, as Figure 6 As shown, the isolation structure 5 and the high-resistivity silicon single chip together form an attenuation network. The attenuation network includes the equivalent horizontal resistance formed by the high-resistivity silicon single chip and the equivalent vertical resistance formed by the isolation structure 5. The equivalent horizontal resistance and the equivalent vertical resistance together constitute a π-type network structure.

[0042] The equivalent horizontal resistance, determined by the resistivity of the high-resistivity silicon substrate, represents the horizontal signal propagation path between the control module 3 and the RF switch module 4, limiting the horizontal propagation rate of noise signals. The equivalent vertical resistance, formed by the PWell isolation band 6, the pads 8, and the connecting lines 7, represents the vertical discharge path from the high-resistivity silicon substrate to the ground of the RF substrate 1, providing a low-impedance discharge channel for noise signals. The π-type network structure effectively attenuates high-frequency signals while allowing low-frequency signals to pass through, effectively suppressing high-frequency noise generated by the control module 3.

[0043] Furthermore, the equivalent horizontal resistance comprises three horizontal resistors R connected in series.HRS The equivalent vertical resistance includes two vertical resistors R. PW One of the vertical resistors, R PW Connected to the first horizontal resistor R HRS With the second horizontal resistor R HRS Between the connection node and ground, another vertical resistor R PW Connected to the second horizontal resistor R HRS and the third horizontal resistor R HRS The connection between the node and the ground.

[0044] Example 2 In another aspect, this utility model proposes a radio frequency front-end module, including the high-resistivity silicon single-chip radio frequency switch proposed in Embodiment 1, wherein the radio frequency front-end module is used to process radio frequency signals in communication equipment.

[0045] The RF front-end module is responsible for transmitting and receiving RF signals and typically includes multiple functional modules such as a power amplifier, a low-noise amplifier, a filter, and an RF switch. The high-resistivity silicon single-chip RF switch is integrated into the RF front-end module to control the RF signal transmission path, enabling signal switching and improving system flexibility and functional integration.

[0046] In summary, the high-resistivity silicon single-chip RF switch proposed in this invention features an isolation structure between the control module and the RF switch module on the high-resistivity silicon single chip, forming an effective attenuation network and significantly improving the isolation between the control module and the RF switch module.

[0047] Furthermore, the isolation structure utilizes the π-type network structure formed by the PWell isolation band and the high-resistivity silicon substrate to effectively attenuate the noise signal generated by the control module and prevent it from coupling to the RF switch module through the substrate, thereby reducing chip manufacturing costs while ensuring RF performance.

[0048] Obviously, those skilled in the art can make various modifications and variations to this utility model without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this utility model and their equivalents, this utility model also intends to include these modifications and variations.

Claims

1. A high-resistivity silicon single-chip radio frequency switch, characterized in that, It includes a high-resistivity silicon single chip and an RF substrate, wherein the high-resistivity silicon single chip is fixed on the RF substrate; The high-resistivity silicon single chip is provided with a control module and an RF switch module. An isolation structure is provided between the control module and the RF switch module to improve the isolation between the control module and the RF switch module.

2. The high-resistivity silicon single-chip RF switch as described in claim 1, characterized in that, The isolation structure includes a PWell isolation strip, pads, and connectors; The PWell isolation strip is disposed between the control module and the RF switch module. The pad is provided on one side of the PWell isolation strip. One end of the connecting line is connected to the pad, and the other end is connected to the ground on the RF substrate.

3. The high-resistivity silicon single-chip RF switch as described in claim 2, characterized in that, The isolation structure includes two PWell isolation strips, two pads, and two connection lines; The two PWell isolation strips are arranged in parallel between the control module and the RF switch module. One side of one PWell isolation strip has a pad, and the opposite side of the other PWell isolation strip has another pad. One end of the two connecting lines is connected to the first pad and the second pad, respectively, and the other end is connected to the ground on the RF substrate.

4. The high-resistivity silicon single-chip RF switch as described in claim 2, characterized in that, The PWell isolation band includes a deep P-type doped layer, a P-type doped layer, and a metal layer; The deep P-type doped layer is located above the high-resistivity silicon single chip, the P-type doped layer is located above the deep P-type doped layer, the metal layer is located above the P-type doped layer, and the metal layer is electrically connected to the P-type doped layer through a contact hole.

5. The high-resistivity silicon single-chip RF switch as described in claim 4, characterized in that, The metal layer is aluminum, copper, or an alloy thereof.

6. The high-resistivity silicon single-chip RF switch as described in claim 4, characterized in that, The contact hole is filled with tungsten or other conductive materials.

7. The high-resistivity silicon single-chip RF switch as described in claim 2, characterized in that, The isolation structure and the high-resistivity silicon single chip together form an attenuation network. The attenuation network includes the equivalent horizontal resistance formed by the high-resistivity silicon single chip and the equivalent vertical resistance formed by the isolation structure. The equivalent horizontal resistance and the equivalent vertical resistance together constitute a π-type network structure.

8. The high-resistivity silicon single-chip RF switch as described in claim 7, characterized in that, The equivalent horizontal resistance includes three horizontal resistors connected in series, and the equivalent vertical resistance includes two vertical resistors; one vertical resistor is connected between the connection node of the first and second horizontal resistors and ground, and the other vertical resistor is connected between the connection node of the second and third horizontal resistors and ground.

9. A radio frequency front-end module, characterized in that, Includes the high-resistivity silicon single-chip RF switch as described in any one of claims 1-8, wherein the RF front-end module is used to process RF signals in communication equipment.