A test circuit for encryption and decryption chip of Xinchuang mobile terminal

Abstract

The utility model belongs to the field of mobile terminal encryption technology of Xinyuan, especially relate to a kind of test circuit of encryption and decryption chip of mobile terminal of Xinyuan, including encryption and decryption chip U1, linear voltage stabilizing circuit, interface circuit and external clock oscillating circuit, encryption and decryption chip U1 is electrically connected with external clock oscillating circuit by clock signal input pin, the USB interface function pin 26 of encryption and decryption chip U1 is electrically connected with the pin A7 of TYPEC connector J1;The USB interface function pin 27 of encryption and decryption chip U1 is electrically connected with the pin A6 of TYPEC connector J1, communication is carried out with Xinyuan mobile terminal by USB interface, realize that Xinyuan mobile terminal is in production line batch production stage and carries out the test to the encryption and decryption chip U1 function on the mainboard of Xinyuan mobile terminal, realize that Xinyuan mobile terminal is in production line batch production stage and carries out the test to the encryption chip function on the mainboard of Xinyuan mobile terminal.

Description

Technical Field

[0001] This utility model belongs to the field of encryption technology for domestically developed mobile terminals, and particularly relates to a test circuit for encryption and decryption chips in domestically developed mobile terminals. Background Technology

[0002] After the motherboard is manufactured and before the entire device is assembled, the functions of the motherboard in the domestically developed mobile terminal need to be tested and verified. Among them, the function testing of the encryption and decryption chip on the motherboard is a particularly challenging issue. The function of the encryption and decryption chip can be verified through the wireless channel or TF card in the whole device, but these conditions are not available at the motherboard stage. Therefore, how to efficiently and reliably test the function of the encryption and decryption chip on the motherboard of the domestically developed mobile terminal during the production line stage is currently a difficult problem. Summary of the Invention

[0003] The problem to be solved by the present invention is to overcome the shortcomings of the prior art and provide a test circuit for the encryption and decryption chip of a domestically developed mobile terminal.

[0004] This invention is achieved through the following technical solution: A test circuit for an encryption / decryption chip in a domestically developed mobile terminal includes an encryption / decryption chip U1, a linear voltage regulator circuit, an interface circuit, and an external clock oscillation circuit. The encryption / decryption chip U1 is electrically connected to the external clock oscillation circuit via a clock signal input pin. The linear voltage regulator circuit includes a linear regulator U2. The interface circuit includes a Type-C connector J1. The external clock oscillation circuit includes a crystal Y1. The USB interface functional pin 26 of the encryption / decryption chip U1 is electrically connected to pin A7 of the Type-C connector J1; the USB interface functional pin 27 of the encryption / decryption chip U1 is connected to... Pin A6 of TYPEC connector J1 is electrically connected; pin 23 of the external power input of encryption / decryption chip U1 is electrically connected to pin A9 of TYPEC connector J1, capacitor C1, capacitor C2, pin 4 of linear regulator U2, and resistor R6 respectively. The other pin of capacitor C1 is grounded, the other pin of capacitor C2 is grounded, and the other pin of resistor R6 is electrically connected to pin 3 of linear regulator U2; pin A5 of TYPEC connector J1 is electrically connected to resistor R1, and the other pin of resistor R1 is grounded; pin A1 of TYPEC connector J1 is grounded.

[0005] Furthermore, the clock signal input pin 20 of the encryption / decryption chip U1 is electrically connected to pin 3 of the crystal Y1 and capacitor C10, and the other pin of capacitor C10 is grounded; the clock signal input pin 21 of the encryption / decryption chip U1 is electrically connected to pin 1 of the crystal Y1 and capacitor C9, and the other pin of capacitor C9 is grounded; pins 2 and 4 of the crystal Y1 are both grounded.

[0006] Furthermore, the external power supply pins 9 and 25 of the encryption / decryption chip U1 are connected in parallel. External power supply pin 9 is electrically connected to capacitor C19, and the other pin of capacitor C19 is grounded. External power supply pin 25 is electrically connected to capacitor C14, and the other pin of capacitor C14 is grounded. External power supply pins 9 and 25 are simultaneously electrically connected to pin 1 of the linear regulator U2. Pin 1 of the linear regulator U2 is electrically connected to capacitor C3, and the other pin of capacitor C3 is grounded. The internal power function pins 1 and 25 of the encryption / decryption chip U1 are also connected. Pin 13 is connected in parallel and then electrically connected to capacitor C17, with the other pin of capacitor C17 grounded; pins 15 and 24 of the internal power function of encryption / decryption chip U1 are connected in parallel and then electrically connected to capacitor C12 and resistor R2 respectively, with the other pin of capacitor C12 grounded, and the other pin of resistor R2 connected to pin 22 of encryption / decryption chip U1; pin 11 of the internal power function of encryption / decryption chip U1 is electrically connected to capacitor C5, with the other pin of capacitor C5 grounded; pin 10 of the internal power function of encryption / decryption chip U1 is electrically connected to capacitor C7, with the other pin of capacitor C7 grounded.

[0007] Furthermore, pin 8 of the encryption / decryption chip U1 is grounded.

[0008] Furthermore, the frequency of the crystal Y1 is 12MHz.

[0009] Furthermore, the linear regulator U2 is selected from Shanghai Weir's WL2820D33.

[0010] Furthermore, the encryption / decryption chip U1 is selected from Tianjin Guoxin's CCM3302S-T.

[0011] The test circuit of this invention is low in cost, high in efficiency, reliable, simple and convenient. It communicates with the domestically developed mobile terminal through a USB interface, enabling the testing of the encryption chip function on the motherboard of the domestically developed mobile terminal during the mass production stage. This solves the current problem of functional testing of encryption and decryption chips on the motherboard of domestically developed mobile terminals during the production stage. Attached Figure Description

[0012] Figure 1 This is a schematic diagram of the overall circuit in this embodiment; Figure 2 This is a circuit diagram of the encryption / decryption chip in this embodiment; Figure 3 This is a schematic diagram of the interface circuit in this embodiment; Figure 4 This is a schematic diagram of the external clock oscillation circuit in this embodiment; Figure 5 This is a schematic diagram of the linear voltage regulator circuit in this embodiment. Figure 6 This is a schematic diagram of the architecture of this embodiment. Detailed Implementation

[0013] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some embodiments of the present invention, but not all embodiments.

[0014] This embodiment includes an encryption / decryption chip U1, a linear voltage regulator circuit, an interface circuit, and an external clock oscillation circuit, all electrically connected together. The encryption / decryption chip U1 is electrically connected to the external clock oscillation circuit via a clock signal input pin. The encryption / decryption chip U1 is a CCM3302S-T from Tianjin Guoxin. The linear voltage regulator circuit includes a linear regulator U2, which is a WL2820D33 from Shanghai Weier. The interface circuit includes a Type-C connector J1. The external clock oscillation circuit includes a crystal Y1 with a frequency of 12MHz. In this embodiment, communication with a domestically developed mobile terminal is achieved via a USB interface, enabling the testing of the encryption / decryption chip U1 on the domestically developed mobile terminal's motherboard during mass production. During production line testing, the encryption chip of the domestically developed mobile terminal is bound to the domestically developed mobile terminal via the USB interface according to an agreed-upon authentication process, testing related authentication, sensitive data storage, and other functions.

[0015] The external power supply pins 9 and 25 of the encryption / decryption chip U1 are connected in parallel. External power supply pin 9 is electrically connected to capacitor C19, and the other pin of capacitor C19 is grounded. External power supply pin 25 is electrically connected to capacitor C14, and the other pin of capacitor C14 is grounded. External power supply pins 9 and 25 are simultaneously electrically connected to pin 1 of the linear regulator U2. Pin 1 of the linear regulator U2 is electrically connected to capacitor C3, and the other pin of capacitor C3 is grounded.

[0016] The internal power function pins 1 and 13 of the encryption / decryption chip U1 are connected in parallel and then electrically connected to capacitor C17. The other pin of capacitor C17 is grounded.

[0017] The internal power function pins 15 and 24 of the encryption / decryption chip U1 are connected in parallel and then electrically connected to capacitor C12 and resistor R2 respectively. The other pin of capacitor C12 is grounded, and the other pin of resistor R2 is electrically connected to pin 22 of the encryption / decryption chip U1.

[0018] The internal power function pin 11 of the encryption / decryption chip U1 is electrically connected to capacitor C5, and the other pin of capacitor C5 is grounded; the internal power function pin 10 of the encryption / decryption chip U1 is electrically connected to capacitor C7, and the other pin of capacitor C7 is grounded.

[0019] The external power input pin 23 of the encryption / decryption chip U1 is electrically connected to pin A9 of the TYPEC connector J1, capacitor C1, capacitor C2, pin 4 of the linear regulator U2, and resistor R6. The other pin of capacitor C1 is grounded, the other pin of capacitor C2 is grounded, and the other pin of resistor R6 is electrically connected to pin 3 of the linear regulator U2.

[0020] Pin 26 of the USB interface of the encryption / decryption chip U1 is electrically connected to pin A7 of the TYPEC connector J1; pin 27 of the USB interface of the encryption / decryption chip U1 is electrically connected to pin A6 of the TYPEC connector J1.

[0021] The clock signal input pin 20 of the encryption / decryption chip U1 is electrically connected to pin 3 of the crystal Y1 and capacitor C10, and the other pin of capacitor C10 is grounded; the clock signal input pin 21 of the encryption / decryption chip U1 is electrically connected to pin 1 of the crystal Y1 and capacitor C9, and the other pin of capacitor C9 is grounded; pins 2 and 4 of the crystal Y1 are both grounded.

[0022] Pin 8 of the encryption / decryption chip U1 is grounded.

[0023] Pin 4 of the linear regulator U2 is the power input, and pin 1 is the power output; pins 2 and 5 of the linear regulator U2 are both grounded.

[0024] Pin A5 of TYPEC connector J1 is electrically connected to resistor R1, and the other pin of resistor R1 is grounded; pin A1 of TYPEC connector J1 is grounded.

[0025] The circuit diagram of this embodiment is shown in the attached figure. Crystal Y1, capacitor C9, and capacitor C10 constitute the external clock oscillation circuit of encryption / decryption chip U1. The corresponding internal clock circuit of encryption / decryption chip U1 forms the clock circuit of encryption / decryption chip U1. Capacitors C9 and C10 are two load capacitors. TYPEC connector J1 is a TYPEC plug. When TYPEC connector J1 is inserted into the TYPEC socket of the Xinchuang mobile terminal, due to the effect of resistor R1, the Xinchuang mobile terminal recognizes the inserted external circuit as a USB slave device. The Xinchuang mobile terminal outputs 5V voltage to pin A9 of VBUS of TYPEC connector J1. Pin 4 of the linear regulator U2 is used as a 5V input. Due to the pull-up effect of resistor R6, pin 1 of the linear regulator U2 outputs 3.3V to the external power supply pins 9 and 25 of the encryption / decryption chip U1. The internal power function pins 1, 13, 24, 15, 11, and 10 of the encryption / decryption chip U1 output their respective voltages. Capacitors C17, C12, C14, C19, C5, and C7 serve as power decoupling capacitors. After the encryption / decryption chip U1 completes its power-on reset and clock generation functions, the external power input pin 23 of the encryption / decryption chip U1 detects a 5V input. Simultaneously, due to the pull-up effect of resistor R2, the encryption / decryption chip U1, acting as a USB slave device control pin 27, outputs a high level through pin A6 of the TYPEC connector J1 to the domestic mobile terminal. Upon receiving the high-level signal, the domestic mobile terminal transmits the signal via USB. The -D+ / D- differential signals and the USB interface function pins 26 and 27 of the encryption / decryption chip U1 complete the enumeration and handshake process of the USB physical layer according to the USB protocol standard. Then, at the software business level, the encryption chip identity of the mobile terminal is bound to the mobile terminal through the USB interface according to the agreed identity authentication process. The relevant identity authentication, sensitive data storage and other functions are tested.

[0026] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; those skilled in the art should understand that modifications can still be made to the technical solutions described in the above embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A test circuit for an encryption / decryption chip in a domestically developed mobile terminal, comprising an encryption / decryption chip U1, a linear voltage regulator circuit, an interface circuit, and an external clock oscillation circuit, wherein the encryption / decryption chip U1 is electrically connected to the external clock oscillation circuit via a clock signal input pin, the linear voltage regulator circuit includes a linear regulator U2, the interface circuit includes a Type-C connector J1, and the external clock oscillation circuit includes a crystal Y1, characterized in that: The USB interface function pin 26 of the encryption / decryption chip U1 is electrically connected to pin A7 of the TYPEC connector J1; the USB interface function pin 27 of the encryption / decryption chip U1 is electrically connected to pin A6 of the TYPEC connector J1; the external power input pin 23 of the encryption / decryption chip U1 is electrically connected to pin A9 of the TYPEC connector J1, capacitor C1, capacitor C2, pin 4 of the linear regulator U2, and resistor R6 respectively; the other pin of capacitor C1 is grounded, the other pin of capacitor C2 is grounded, and the other pin of resistor R6 is electrically connected to pin 3 of the linear regulator U2; pin A5 of the TYPEC connector J1 is electrically connected to resistor R1, and the other pin of resistor R1 is grounded; pin A1 of the TYPEC connector J1 is grounded.

2. The test circuit for the encryption / decryption chip of the domestically developed mobile terminal according to claim 1, characterized in that: The clock signal input pin 20 of the encryption / decryption chip U1 is electrically connected to pin 3 of the crystal Y1 and capacitor C10, and the other pin of capacitor C10 is grounded; the clock signal input pin 21 of the encryption / decryption chip U1 is electrically connected to pin 1 of the crystal Y1 and capacitor C9, and the other pin of capacitor C9 is grounded; pins 2 and 4 of the crystal Y1 are both grounded.

3. The test circuit for the encryption / decryption chip of the domestically developed mobile terminal according to claim 1, characterized in that: The external power supply pins 9 and 25 of the encryption / decryption chip U1 are connected in parallel. External power supply pin 9 is electrically connected to capacitor C19, and the other pin of capacitor C19 is grounded. External power supply pin 25 is electrically connected to capacitor C14, and the other pin of capacitor C14 is grounded. External power supply pins 9 and 25 are simultaneously electrically connected to pin 1 of the linear regulator U2. Pin 1 of the linear regulator U2 is electrically connected to capacitor C3, and the other pin of capacitor C3 is grounded. The internal power function pins 1 and 13 of the encryption / decryption chip U1 are connected in parallel. After being connected, it is electrically connected to capacitor C17, and the other pin of capacitor C17 is grounded; the internal power function pins 15 and 24 of the encryption / decryption chip U1 are connected in parallel and then electrically connected to capacitor C12 and resistor R2 respectively, the other pin of capacitor C12 is grounded, and the other pin of resistor R2 is electrically connected to pin 22 of the encryption / decryption chip U1; the internal power function pin 11 of the encryption / decryption chip U1 is electrically connected to capacitor C5, and the other pin of capacitor C5 is grounded; the internal power function pin 10 of the encryption / decryption chip U1 is electrically connected to capacitor C7, and the other pin of capacitor C7 is grounded.

4. The test circuit for the encryption / decryption chip of the domestically developed mobile terminal according to claim 1, characterized in that: Pin 8 of the encryption / decryption chip U1 is grounded.

5. The test circuit for the encryption / decryption chip of the domestically developed mobile terminal according to claim 1, characterized in that: The frequency of the crystal Y1 is 12MHz.

6. The test circuit for the encryption / decryption chip of the domestically developed mobile terminal according to claim 1, characterized in that: The linear regulator U2 is selected from Shanghai Weir's WL2820D33.

7. The test circuit for the encryption / decryption chip of the domestically developed mobile terminal according to claim 1, characterized in that: The encryption / decryption chip U1 is the CCM3302S-T from Tianjin Guoxin.

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