A bidirectional ESD device structure

Abstract

The application relates to the technical field of semiconductor devices, in particular to a bidirectional ESD device structure which comprises an N+ type substrate, a P type epitaxial layer, an N type low-resistance epitaxial layer and a deep trench isolation structure. The deep trench isolation structure penetrates the N type low-resistance epitaxial layer and the P type epitaxial layer and extends to the N+ type substrate. Metal contact regions are connected with external circuits respectively, and a passivation layer and a metallization layer improve stability and reliability. The application realizes the symmetry of positive and negative electrical parameters by means of a multi-layer structure design combined with a deep trench isolation technology, simplifies a process flow, reduces manufacturing cost and is suitable for the ESD protection requirements of high-density integrated circuits.

Description

Technical Field

[0001] This utility model belongs to the field of semiconductor devices and electrostatic protection technology, specifically a bidirectional ESD device structure. Background Technology

[0002] Bidirectional capacitors typically utilize electrical parameters in both the front-side metal-to-back-substrate and back-side substrate-to-front-side metal directions to achieve their functionality. In existing technologies, a metal-to-back-substrate reverse PN junction is commonly formed using an implantation process, while a back-substrate-to-metal reverse PN junction is formed at the interface between the substrate and the epitaxial layer. The PN junction formed through implantation and high-temperature annealing is a gradually changing junction, while the PN junction formed between the epitaxial layer and the substrate is an abrupt junction. Due to the differences in the physical properties of these two types of PN junctions, it is difficult for the electrical parameters of the device to be perfectly symmetrical in both directions.

[0003] To address this issue, existing techniques attempt to use heavily doped N+ type substrates (resistivity approximately 0.005-0.008 Ω·cm) and grow heavily doped P+ type epitaxial layers (resistivity approximately 0.05 Ω·cm) on them, followed by further growing heavily doped N+ type epitaxial layers on the P+ type epitaxial layers, replacing the traditional N+ implantation process. This design can, to some extent, bring the electrical parameters of the device closer together in both directions. However, the existing processes still have limitations, especially in achieving bidirectional symmetry, where there is still room for improvement.

[0004] Against this backdrop, how to further optimize device structure and process flow to better achieve consistency of bidirectional electrical parameters has become one of the key issues of concern to those skilled in the art. Utility Model Content

[0005] The main purpose of this invention is to provide a bidirectional ESD device structure, which aims to solve the technical problem that the electrical parameters of bidirectional general-purpose devices are difficult to be symmetrical in both directions in the prior art.

[0006] To achieve the above objectives, this utility model provides a bidirectional ESD device structure, which includes an N+ type substrate, a P-type epitaxial layer, an N-type low-resistivity epitaxial layer, and a deep trench isolation structure. The P-type epitaxial layer is located above and in contact with the N+ type substrate, the N-type low-resistivity epitaxial layer is located above and in contact with the P-type epitaxial layer, and the deep trench isolation structure penetrates the N-type low-resistivity epitaxial layer and the P-type epitaxial layer and extends into the interior of the N+ type substrate. The deep trench isolation structure is filled with polycrystalline silicon material.

[0007] The N+ type substrate has a resistivity of 0.005-0.008 Ω·cm and serves as a ground electrode directly connected to the external circuit. The P-type epitaxial layer has a resistivity of 0.05 Ω·cm and a thickness ranging from 5 μm to 12 μm. The N-type low-resistivity epitaxial layer has a resistivity of 0.008 Ω·cm and a thickness ranging from 1 μm to 50 μm. The deep trench isolation structure has a width ranging from 1.5 μm to 3.0 μm and a depth ranging from 10 μm to 20 μm, ensuring that it penetrates the N-type low-resistivity epitaxial layer and the P-type epitaxial layer to achieve complete isolation.

[0008] Optionally, the surface of the N-type low-resistivity epitaxial layer is provided with a passivation layer, which is made of silicon nitride material and has a thickness ranging from 1.0 μm to 2.0 μm. The passivation layer is formed by plasma-enhanced chemical vapor deposition and pressure point windows are opened by photolithography and etching processes for electrical connection of external circuits.

[0009] Optionally, there are multiple deep trench isolation structures, which are uniformly distributed on the surface of the N-type low-resistivity epitaxial layer, and the spacing between two adjacent deep trench isolation structures ranges from 5 μm to 10 μm. The deep trench isolation structures are formed by inductively coupled plasma etching, and the etching depth and width are precisely controlled by process parameters.

[0010] This invention provides a bidirectional ESD device structure. By employing a multi-layer structure design consisting of an N+ type substrate, a P-type epitaxial layer, and an N-type low-resistivity epitaxial layer, combined with deep trench isolation technology, it achieves electrical parameter symmetry in both directions. The deep trench isolation structure penetrates both the N-type low-resistivity epitaxial layer and the P-type epitaxial layer, ensuring electrical isolation performance between different regions. The metal contact area is precisely formed through photolithography and etching processes, enabling reliable connection with external circuits. The design of the passivation layer and metallization layer further improves the stability and reliability of the device. This invention simplifies the process flow, reduces manufacturing costs, and simultaneously meets the stringent requirements for bidirectional electrical parameter symmetry, making it suitable for the ESD protection needs of high-density integrated circuits. Attached Figure Description

[0011] Figure 1 This is a schematic cross-sectional view of the overall structure of the bidirectional ESD device of this utility model.

[0012] Figure 2 This is a schematic diagram of the upper electrode structure installed in the bidirectional ESD device structure of this utility model.

[0013] Figure 3 This is a schematic diagram of the device circuit structure after deep trench etching and polysilicon filling for the bidirectional ESD device structure of this utility model.

[0014] The attached figures are labeled as follows: 1. N+ type substrate; 2. P type epitaxial layer; 3. N type low resistivity epitaxial layer; 4. Deep trench isolation structure; 5. Polycrystalline silicon material. Detailed Implementation

[0015] This invention provides a bidirectional ESD device structure, the overall cross-sectional schematic diagram of which is shown below. Figure 1-3 As shown, the structure mainly includes an N+ type substrate 1, a P-type epitaxial layer 2, an N-type low-resistivity epitaxial layer 3, and a deep trench isolation structure 4. The N+ type substrate 1 is located at the bottom layer, with a resistivity of 0.005-0.008 Ω·cm, and serves as the ground electrode directly connected to the external circuit. The P-type epitaxial layer 2 is located above the N+ type substrate 1, in complete contact with it, with a resistivity of 0.05 Ω·cm and a thickness ranging from 5 μm to 12 μm. The N-type low-resistivity epitaxial layer 3 is located above the P-type epitaxial layer 2, in complete contact with it, with a resistivity of 0.008 Ω·cm and a thickness ranging from 1 μm to 50 μm. The deep trench isolation structure 4 penetrates the N-type low-resistivity epitaxial layer 3 and the P-type epitaxial layer 2, and extends into the interior of the N+ type substrate 1, used to achieve electrical isolation between different areas.

[0016] The specific construction of the deep trench isolation structure 4 is as follows: Figure 1 and 2 As shown, its width ranges from 1.5 μm to 3.0 μm, and its depth ranges from 10 μm to 20 μm, ensuring that it can penetrate the N-type low-resistivity epitaxial layer 3 and the P-type epitaxial layer 2 to achieve complete isolation. The deep trench isolation structure 4 is filled with polycrystalline silicon material 5. The polycrystalline silicon material 5, with a thickness ranging from 2.0 μm to 3.5 μm, is filled inside the deep trench isolation structure 4. The top is planarized using a chemical mechanical polishing process to ensure surface flatness and avoid adverse effects in subsequent processes.

[0017] In the actual manufacturing process, a P-type epitaxial layer 2 and an N-type low-resistivity epitaxial layer 3 are first grown sequentially on an N+ type substrate 1 using chemical vapor deposition. The doping concentration of the P-type epitaxial layer 2 is in the range of 1×10¹. 6 cm⁻³ to 1×10¹ 8 cm⁻³, the doping concentration range of the N-type low-resistivity epitaxial layer 3 is 1×10¹ 9 cm⁻³ to 1×10² 0 cm⁻³. Subsequently, multiple deep trench isolation structures 4 are formed using inductively coupled plasma etching (ICP-C). The number of these structures is determined based on actual design requirements, and the spacing between adjacent deep trench isolation structures 4 ranges from 5 μm to 10 μm. The etching depth and width of the deep trench isolation structures 4 are precisely controlled through process parameters to ensure their electrical isolation performance.

[0018] Specifically, polycrystalline silicon material 5 is filled inside the deep trench isolation structure 4 using a chemical vapor deposition process, and its top is planarized using a chemical mechanical polishing process. This completes the fabrication of the deep trench isolation structure 4. (See also...) Figure 2 In the metal contact area, aluminum material is deposited through evaporation or sputtering processes, and electrode patterns are formed through photolithography and etching processes.

[0019] Subsequently, a passivation layer is formed on the surface of the N-type low-resistivity epitaxial layer 3 by plasma-enhanced chemical vapor deposition, and pressure point windows are opened by photolithography and etching processes.

[0020] This bidirectional ESD device structure employs a multilayer design consisting of an N+ type substrate 1, a P-type epitaxial layer 2, and an N-type low-resistivity epitaxial layer 3, combined with deep trench isolation technology, achieving electrical parameter symmetry in both directions. The deep trench isolation structure 4 penetrates both the N-type low-resistivity epitaxial layer 3 and the P-type epitaxial layer 2, ensuring electrical isolation between different regions. Metal contact areas are precisely formed using photolithography and etching processes, enabling reliable connection to external circuits. The design of passivation and metallization layers further enhances the device's stability and reliability. This structural design simplifies the process flow, reduces manufacturing costs, and simultaneously meets the stringent requirements for bidirectional electrical parameter symmetry, making it suitable for the ESD protection needs of high-density integrated circuits.

[0021] In summary, this invention achieves electrical parameter symmetry in both directions by employing a multilayer structure design consisting of an N+ type substrate 1, a P-type epitaxial layer 2, and an N-type low-resistivity epitaxial layer 3, combined with deep trench isolation technology. The deep trench isolation structure 4 penetrates both the N-type low-resistivity epitaxial layer 3 and the P-type epitaxial layer 2, ensuring electrical isolation performance between different regions. The metal contact areas are precisely formed through photolithography and etching processes, enabling reliable connection with external circuits. The design of the passivation layer and metallization layer further improves the stability and reliability of the device. This structural design simplifies the process flow, reduces manufacturing costs, and simultaneously meets the stringent requirements for bidirectional electrical parameter symmetry, making it suitable for the ESD protection needs of high-density integrated circuits.

[0022] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A bidirectional ESD device structure, characterized in that, The structure includes an N+ type substrate (1), a P type epitaxial layer (2), an N type low-resistivity epitaxial layer (3), and a deep trench isolation structure (4); the P type epitaxial layer (2) is located above and in contact with the N+ type substrate (1), the N type low-resistivity epitaxial layer (3) is located above and in contact with the P type epitaxial layer (2), and the deep trench isolation structure (4) penetrates the N type low-resistivity epitaxial layer (3) and the P type epitaxial layer (2) and extends into the interior of the N+ type substrate (1); the deep trench isolation structure (4) is filled with polycrystalline silicon material (5).

2. The bidirectional ESD device structure as described in claim 1, characterized in that, The resistivity of the N+ type substrate (1) is 0.005 Ω·cm to 0.008 Ω·cm, the resistivity of the P type epitaxial layer (2) is 0.05 Ω·cm and the thickness ranges from 5 μm to 12 μm, and the resistivity of the N type low-resistivity epitaxial layer (3) is 0.008 Ω·cm and the thickness ranges from 1 μm to 50 μm.

3. The bidirectional ESD device structure as described in claim 1, characterized in that, The width of the deep trench isolation structure (4) ranges from 1.5 μm to 3.0 μm, and the depth ranges from 10 μm to 20 μm.

4. The bidirectional ESD device structure as described in claim 1, characterized in that, The surface of the N-type low-resistivity epitaxial layer (3) is provided with a passivation layer, which is made of silicon nitride material and has a thickness ranging from 1.0 μm to 2.0 μm. The passivation layer is formed by plasma-enhanced chemical vapor deposition.

5. The bidirectional ESD device structure as described in claim 1, characterized in that, The number of deep trench isolation structures (4) is multiple, and the multiple deep trench isolation structures (4) are evenly distributed on the surface of the N-type low-resistivity epitaxial layer (3). The spacing between two adjacent deep trench isolation structures (4) ranges from 5 μm to 10 μm.

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