Pixel array and light detector array

Abstract

The utility model provides a kind of pixel array, comprising: substrate;Multiple light detectors in substrate;Deep trench isolation (DTI) structure has multiple sections between the light detector of multiple light detectors extends, the DTI structure includes: the first oxide layer with first oxygen density;The inner side wall of first metal oxide layer first oxide layer and has second oxygen density, and second oxygen density is greater than first oxygen density;Second oxide layer is lined the inner side wall of first metal oxide layer and has third oxygen density, and third oxygen density is less than second oxygen density;Second metal oxide layer is lined the inner side wall of second oxide layer and has fourth oxygen density, and fourth oxygen density is greater than third oxygen density.

Description

Technical Field

[0001] This utility model relates to a pixel array and a photodetector array. Background Technology

[0002] Integrated circuits (ICs) with image sensors are widely used in modern electronic devices such as cameras and mobile phones. Image sensors use multiple photodetectors to convert incident light into electrical signals. Signal processing circuitry then converts these electrical signals into computer-readable images. To prevent crosstalk or interference between the photodetectors, deep trench isolation (DTI) structures extend between them. Utility Model Content

[0003] This utility model provides a pixel array, including: a substrate; a plurality of photodetectors located within the substrate; a deep trench isolation (DTI) structure having a plurality of segments extending between the photodetectors of the plurality of photodetectors, the DTI structure including: a first oxide layer having a first oxygen density; a first metal oxide layer lining the inner sidewall of the first oxide layer and having a second oxygen density, the second oxygen density being greater than the first oxygen density; a second oxide layer lining the inner sidewall of the first metal oxide layer and having a third oxygen density, the third oxygen density being less than the second oxygen density; and a second metal oxide layer lining the inner sidewall of the second oxide layer and having a fourth oxygen density, the fourth oxygen density being greater than the third oxygen density.

[0004] In some embodiments, the third oxygen density is within 10% of the value of the first oxygen density, and the second oxygen density is within 10% of the value of the fourth oxygen density. In some embodiments, the first oxygen density and the third oxygen density are less than 1.25 g / cm³, and the second oxygen density and the fourth oxygen density are greater than 1.35 g / cm³. In some embodiments, the first metal oxide layer is on top of the first oxide layer, and the first oxide layer is on top of the substrate. In some embodiments, the second metal oxide layer is on top of the second oxide layer. In some embodiments, the first oxide layer has a first thickness and the second oxide layer has a second thickness greater than the first thickness.

[0005] This utility model provides a photodetector array, comprising: a substrate; a first photodetector located within the substrate; a second photodetector located within the substrate; a trench defined by an inner sidewall of the substrate surrounding the first and second photodetectors and extending between the first and second photodetectors; a first oxide layer lining the inner sidewall of the trench and the bottom surface of the trench; a first metal oxide layer lining the inner sidewall of the first oxide layer and the upper surface of the first oxide layer; a second oxide layer lining the inner sidewall of the first metal oxide layer and the upper surface of the first metal oxide layer; a second metal oxide layer lining the inner sidewall of the second oxide layer and the upper surface of the second oxide layer; and a filling structure extending between the inner sidewalls of the second metal oxide layer.

[0006] In some embodiments, the first oxide layer has a first oxygen density, and the first metal oxide layer has a second oxygen density and extends between the inner sidewalls of the first oxide layer, wherein the second oxygen density is greater than the first oxygen density. In some embodiments, the second oxide layer has a first oxygen density, and the second metal oxide layer has a second oxygen density and extends between the inner sidewalls of the second oxide layer, wherein the second oxygen density is greater than the first oxygen density. In some embodiments, the first oxide layer, the first metal oxide layer, the second oxide layer, and the second metal oxide layer are configured to form a deep trench isolation (DTI) structure, wherein the flat band voltage between the deep trench isolation structure and the substrate is greater than 3. In some embodiments, the first oxide layer has a first oxygen density and the first metal oxide layer has a second oxygen density, wherein the first oxygen density and the second oxygen density are configured to generate a first dipole, wherein the second oxide layer has a third oxygen density and the second metal oxide layer has a fourth oxygen density, and wherein the third oxygen density and the fourth oxygen density are configured to generate a second dipole. In some embodiments, a third oxide layer and a third metal oxide layer configured to generate a third dipole are further included, wherein the third oxide layer and the third metal oxide layer extend between the filling structure and the second metal oxide layer and isolate the filling structure from the second metal oxide layer. In some embodiments, the first oxide layer, the first metal oxide layer, the second oxide layer, the second metal oxide layer, the third oxide layer, and the third metal oxide layer have a total thickness of less than 250 angstroms.

[0007] To make the above-mentioned features and advantages of this utility model more apparent and understandable, specific embodiments are described below, and detailed descriptions are provided in conjunction with the accompanying drawings. Attached Figure Description

[0008] The best understanding of the features of this disclosure will be achieved by reading the following detailed description in conjunction with the accompanying drawings. It should be noted that, according to industry standard practice, the various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or decreased for clarity of explanation.

[0009] Figure 1A and Figure 1B Cross-sectional views of some embodiments of a DTI structure with a complementary dipole generation layer are shown.

[0010] Figure 2A and Figure 2B It shows having Figure 1A and Figure 1B Cross-sectional and top views of some embodiments of the DTI structure photodetector array.

[0011] Figure 3A and Figure 3B Defect density graphs and flat band voltage graphs are shown for different embodiments of a DTI structure with a complementary dipole generation layer.

[0012] Figure 4 Cross-sectional views of some embodiments of a DTI structure having a complementary dipole generation layer including a third dipole generation layer are shown.

[0013] Figures 5-14 A series of cross-sectional views are shown, illustrating some embodiments of a method for forming a DTI structure with a complementary dipole generation layer.

[0014] Figure 15 Flowcharts of some embodiments of a method for forming a DTI structure with a complementary dipole generation layer are shown. Detailed Implementation

[0015] The following disclosure provides numerous different embodiments or instances for implementing various features of the provided object. Specific examples of components and arrangements are described below to simplify this disclosure. Of course, these are merely examples and are not intended to be limiting. For example, the following description of a first feature formed on or on a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, thereby preventing direct contact between the first and second features. Furthermore, element reference numerals and / or letters may be reused in various instances of this disclosure. Such reuse is for the purpose of brevity and clarity, and is not intended to indicate any relationship between the various embodiments and / or configurations discussed.

[0016] Furthermore, for ease of explanation, this document may use spatial relative terms such as “beneath,” “below,” “lower,” “above,” “over,” “on,” “top,” and “upper” to describe the relationship between one component or feature shown in the figures and another component or feature. These spatial relative terms are intended to encompass different orientations of the device in use or operation, in addition to those shown in the figures. The device may have other orientations (rotated 90 degrees or in other orientations), and the spatial relative descriptions used herein may be interpreted accordingly.

[0017] It should be understood that in this written description and the following claims, terms such as “first,” “second,” and “third” are merely general identifiers used for ease of description to distinguish different elements in a figure or series of figures. In themselves, these terms do not imply any temporal order or structural proximity of these elements and are not intended to describe corresponding elements in different exemplary embodiments and / or embodiments not shown. For example, “first dielectric layer” described in conjunction with the first figure may not correspond to “first dielectric layer” described in conjunction with another figure, and may not correspond to “first dielectric layer” in embodiments not shown.

[0018] The image sensor includes a pixel array with multiple photodetectors and multiple pixel circuits coupled to the photodetectors. The multiple pixel circuits include a floating diffuser region, a transfer transistor extending between the floating diffuser region and the photodetectors, and an interconnect structure coupling the floating diffuser region to an output stage. The multiple photodetectors are organized into multiple rows and multiple columns, and the multiple rows and multiple columns are defined by a deep trench isolation (DTI) structure. The DTI structure surrounds the photodetectors among the multiple photodetectors, isolating them from each other to reduce noise and interference.

[0019] With the continuous advancement of photodetector technology, there is a need for smaller photodetector arrays to improve the resolution of the resulting images and reduce the size of the photodetector arrays. DTI structures are formed by etching trenches into a substrate and depositing one or more insulating layers within the trenches. Trench etching can cause damage, such as the formation of dangling bonds at the trench edges in the substrate. One way to reduce the photodetector size is to reduce the width of the formed trenches, thereby increasing the critical dimension of the etching (e.g., the depth-to-width ratio). However, increasing the critical dimension leads to greater damage to the surrounding substrate. Damage to the sidewalls of the substrate can cause an increase in dark current within the photodetector and reduce the efficiency of white pixels, thus degrading its performance. Some methods to reduce this damage or surface passivation involve using more advanced tools and more expensive materials in the etching process. However, these methods are costly. Therefore, there is a need for a method to increase the surface passivation of DTI structures inexpensively without using expensive materials.

[0020] This disclosure provides a DTI structure with a complementary dipole generation layer. The layering of metal oxide and oxide layers with different oxygen densities creates dipoles near the surface of the DTI structure. These dipoles introduce an electric field at the interface between the DTI structure and the substrate. When the oxygen density of the metal oxide layer is greater than that of the oxide layer, and the oxide layer is located between the metal oxide layer and the substrate, the generated electric field creates a depletion region in the sidewalls of the substrate surrounding the DTI structure. This depletion region includes multiple holes located on the sidewalls of the substrate. Electrons emitted from dangling bonds and damaged portions of the substrate sidewalls combine with these holes to capture dark current carriers before they enter the photodetector or floating diffusion region. The reduction in dark current and the improvement in white pixel performance enhance the performance of the resulting photodetector array.

[0021] Figure 1A and Figure 1B Cross-sectional views 100a and 100b of some embodiments of a DTI structure with a complementary dipole generation layer are shown.

[0022] like Figure 1A As shown, the DTI structure 104 contacts the substrate 102 at the first interface 106. The DTI structure 104 includes a first dipole generation layer 108 and a second dipole generation layer 110. The first dipole generation layer 108 has a first oxide layer 112 and a first metal oxide layer 114. The second dipole generation layer 110 has a second oxide layer 116 and a second metal oxide layer 118. In some embodiments, the DTI filler 120 lining the sidewalls of the second dipole generation layer 110.

[0023] The first oxide layer 112 has a first oxygen density, and the first metal oxide layer 114 has a second oxygen density greater than the first oxygen density. In some embodiments, the first oxygen density is less than 1.25 g / cm³, and / or ranges between 1.4 g / cm³ and 0.25 g / cm³. In some embodiments, the second oxygen density is greater than 1.35 g / cm³, and / or ranges between 1.3 g / cm³ and 3 g / cm³. The oxygen density difference between the first oxide layer 112 and the first metal oxide layer 114 results in a first dipole 122 within the first dipole generating layer 108. The second oxide layer 116 has a third oxygen density, and the second metal oxide layer 118 has a fourth oxygen density greater than the third oxygen density. The oxygen density difference between the second oxide layer 116 and the second metal oxide layer 118 results in a second dipole 124 within the first dipole generating layer 108. In some embodiments, the first oxygen density and the third oxygen density are approximately equal (e.g., differing from each other by less than 10%). In some embodiments, the second oxygen density and the fourth oxygen density are approximately equal (e.g., differing from each other by less than 10%). In other embodiments, the second oxygen density and the fourth oxygen density are different from each other.

[0024] The first dipole 122 enhances the electric field at the first interface 106, thereby increasing the width of the depletion region 126 within the substrate 102 that lies between the first interface 106 and the substrate 102. The depletion region 126 has a greater number of positive charge carriers (e.g., holes) than negative charge carriers (e.g., electrons). This difference in carrier concentration makes it more likely that electrons from dangling bonds and damage at the interface will recombine with positive charge carriers before leaving the depletion region 126. The proximity of the second dipole generation layer 110 to the first dipole generation layer 108 results in a second dipole 124 that further enhances the electric field at the first interface 106, thereby increasing the flatline voltage (e.g., a voltage applied to the DTI structure 104 that would result in no conduction band bending at the first interface 106). The increased flatline voltage leads to a higher concentration of positive charge carriers in the depletion region, thereby reducing dark current and improving the white pixel performance of the photodetector array.

[0025] like Figure 1B As shown, the first photodetector 128 is located within the substrate 102. Corresponding to... Figure 1AA portion 130 of the DTI structure 104 is shown in dashed lines. In some embodiments, the DTI structure covers a floating diffusion region 132 on a first side 102a of the substrate 102. A transfer transistor 134 is located between the first photodetector 128 and the floating diffusion region 132. An interconnect structure 136 is coupled to the floating diffusion region 132 and the transfer transistor 134. The interconnect structure 136 couples the floating diffusion region 132 to an output stage (not shown). The transfer transistor 134 is coupled to a charge transfer circuit that controls when the transfer transistor 134 transfers charge from the photodetector 128 to the floating diffusion region 132. An array of color filters 138 extends over the first photodetector 128. An array of microlenses 140 extends over the color filters 138.

[0026] In some embodiments, the floating diffusion region 132 is surrounded by a positive well 142. The positive well 142 separates the floating diffusion region 132 from the photodetector 128. During operation, a voltage greater than a voltage threshold of the transfer transistor 134 is applied to induce a channel through the positive well 142 between the first photodetector 128 and the floating diffusion region 132. In some embodiments, the transfer transistor 134 contacts the positive well 142 at a first side 102a of the substrate 102.

[0027] Figure 2A and Figure 2B It shows having Figure 1A and Figure 1B Cross-sectional view 200a and top view 200b of some embodiments of the DTI structure photodetector array. Figure 2A The sectional view 200a is along Figure 2B The line A-A' in the top view is intercepted.

[0028] like Figure 2A As shown in cross-sectional view 200a, the second photodetector 202 is located within the substrate 102 and spaced apart from the first photodetector 128 by a DTI structure 104. The DTI structure 104 includes multiple segments forming a continuous ring around the first photodetector 128 and the second photodetector 202. A first dipole generation layer 108 and a second dipole generation layer 110 extend through the outer sidewalls and bottom surface of the DTI structure 104, such that all sidewalls of the DTI structure 104 are isolated from the first dipole generation layer 108 and the second dipole generation layer 110 by a depletion region 126. In some embodiments, the first photodetector 128 and the second photodetector 202 share a floating diffusion region 132. That is, a floating diffusion region 132 couples the first photodetector 128 and the second photodetector 202 to an interconnect structure 136.

[0029] like Figure 2BAs shown in the top view 200b, a plurality of photodetectors 205 (including a first photodetector 128 and a second photodetector 202) are arranged in a plurality of rows 204 and a plurality of columns 206. The plurality of rows 204 and the plurality of columns 206 are separated by a plurality of segments of the DTI structure 104. The first row 204a of the plurality of rows 204 includes the first photodetector 128 and the second photodetector 202. The second row 204b of the plurality of rows 204 includes a third photodetector 208 and a fourth photodetector 210. The first column 206a of the plurality of columns 206 includes the first photodetector 128 and the third photodetector 208. The second column 206b of the plurality of columns 206 includes the second photodetector 202 and the fourth photodetector 210. In some embodiments, the floating diffusion region 132 is coupled to the first photodetector 128, the second photodetector 202, the third photodetector 208, and the fourth photodetector 210 via a plurality of transfer transistors (e.g., the first transistor 134a, the second transistor 134b, the third transistor 134c, and the fourth transistor 134d, respectively).

[0030] In some embodiments, the well 142 extends to the sidewall 140a of the DTI structure 104 closest to the floating diffusion region 132. In other embodiments, the well 142 extends beyond and covers the sidewall 140a. The well 142 provides greater isolation between the plurality of photodetectors 205 in the region surrounding the floating diffusion region 132. In some embodiments, the body contact 212 is spaced apart from the floating diffusion region 132 by the plurality of photodetectors 205.

[0031] Figure 3A and 3B Defect density graph 300a and flat band voltage graph 300b of different embodiments of a DTI structure with a complementary dipole generation layer are shown.

[0032] like Figure 3A As shown in Figure 300a, a single dipole generation layer (e.g., Figure 1A The flat band voltage 308 of the first embodiment 302 (with the second dipole generating layer 110 omitted) is compared with the flat band voltages 310 and 312 of embodiments 304 and 306 with complementary dipole generating layers of different widths. The second embodiment 304 has complementary dipole generating layers (e.g., multiple dipole generating layers with aligned dipoles can enhance the electric field at the first interface) and a first metal oxide layer 114 and a second metal oxide layer 118 with a thickness of less than 50 angstroms (see...). Figure 1A The third embodiment 306 has a complementary dipole generating layer (e.g., multiple dipole generating layers with aligned dipoles can enhance the electric field at the first interface) and a first metal oxide layer 114 and a second metal oxide layer 118 with a thickness greater than 50 angstroms (see...). Figure 1A ).

[0033] In some embodiments, the flat band voltages 310 and 312 of embodiments 304 and 306 having complementary dipole generation layers are more than twice the flat band voltage 308 of the first embodiment 302. The flat band voltages 308, 310, and 312 correspond to the flat band voltages 308, 308, 308, 308, 312 of the DTI structure (see...) Figure 1A 104) Substrate without external bias (see ) Figure 1A The degree of upward band bending of the Fermi level in (102). The increased flat band voltages 310, 312 of embodiments 304, 306 with complementary dipole generation layers make the substrate (see Figure 1A The greater upward band bending in (102) indicates that at the first interface (see Figure 1A The hole concentration at position 106 is relatively high.

[0034] like Figure 3B As shown in Figure 300b, the measured defect density 314 of the first embodiment 302 with a single dipole generation layer is greater than the measured interface trap densities 316 and 318 of the second and third embodiments 304 and 306. This is achieved by interpreting the substrate (see...). Figure 1A 102) and DTI structure (see ) Figure 1A The interface trap density is determined by the capacitance-voltage characteristics at the interface between the first embodiment 302 and the second and third embodiments 304, 306, which have complementary dipole generation layers. Compared to the first embodiment 302 with a single dipole generation layer, the enhanced passivation of these embodiments reduces the interface trap density. In some embodiments, first and second metal oxide layers 114, 118 (see [reference]) with a thickness of less than 50 angstroms are used. Figure 1A The interface trap density 316 of the second embodiment 304 is greater than that of the first and second metal oxide layers 114, 118 having a thickness greater than 50 angstroms (see...). Figure 1A The interface trap density of the third embodiment 306 is 318.

[0035] Figure 4 A cross-sectional view 400 is shown of some embodiments of a DTI structure having a complementary dipole generation layer including a third dipole generation layer.

[0036] In some embodiments, a third dipole generation layer 402 separates the second dipole generation layer 110 from the DTI filler 120. The third dipole generation layer includes a third oxide layer 404 and a third metal oxide layer 406 forming a third dipole 408. When the oxygen density of the third metal oxide layer 406 is greater than the oxygen density of the third oxide layer 404, the third dipole 408 has the same orientation as the second dipole 124 and the first dipole 122 (e.g., positive charge towards the DTI filler 120 and negative charge towards the first interface 106). In some embodiments, when the third dipole generation layer 402 is formed near the first interface 106 (e.g., within a first distance 410 of the first interface 106), the third dipole generation layer 402 increases the flat band voltage at the first interface 106 and reduces the interface trap density at the first interface 106. In other embodiments, when the third dipole generating layer 402 is farther from the first interface 106 than the first distance 410, the influence of the third dipole generating layer 402 on the flat band voltage and interface trap density at the first interface 106 is reduced. In some embodiments, the first distance is between 200 angstroms and 300 angstroms, between 250 angstroms and 350 angstroms, between 225 angstroms and 325 angstroms, etc. That is, the total thickness of the combination of dipole layers (e.g., the combined thickness of the first dipole generating layer 108, the second dipole generating layer 110, and in some embodiments, the combined thickness of the third dipole generating layer 402) is less than 225 angstroms, less than 250 angstroms, less than 300 angstroms, etc.

[0037] Figures 5-10 , Figure 11A , Figure 11B , Figure 11C , Figure 11D , Figure 12 , Figure 13A , Figure 13B and Figure 14 A series of cross-sectional views 500-1000, 1100a, 1100b, 1100c, 1100d, 1200, 1300a, 1300b, 1400 are shown, illustrating some embodiments of a method for forming a DTI structure with a complementary dipole generation layer. Although Figures 5-10 , Figure 11A , Figure 11B , Figure 11C , Figure 11D , Figure 12 , Figure 13A , Figure 13B and Figure 14 The actions are described as a series of actions, but it should be understood that these actions are not limiting, as the order of the actions may be changed in other embodiments, and the disclosed methods are applicable to other structures. In other embodiments, some of the illustrated and / or described actions may be omitted in whole or in part.

[0038] like Figure 5As shown in cross-sectional view 500, a first photodetector 128, a floating diffusion region 132, and a positive well 142 are formed within a substrate 102. The first photodetector 128, the floating diffusion region 132, and the positive well 142 are formed using a multi-stage ion implantation process. For example, in some embodiments, the first photodetector 128 is formed by applying and patterning a first mask (not shown), and then performing a first ion implantation process based on the first mask to implant an n-type dopant into the substrate 102. In some embodiments, the positive well 142 is formed by applying and patterning a second mask (not shown), and then performing a second ion implantation process based on the first mask to implant a p-type dopant into the substrate 102. In some embodiments, the floating diffusion region 132 is formed by applying and patterning a third mask (not shown), and then performing a third ion implantation process based on the first mask to implant an n-type dopant into the substrate 102. In some embodiments, multiple photodetectors (see...) Figure 2A The 205) is formed simultaneously with the first photodetector 128.

[0039] like Figure 6 As shown in cross-sectional view 600, a transfer transistor 134 is formed on a first side 102a of a substrate 102. The transfer transistor 134 extends between a first photodetector 128 and a floating diffusion region 132. In some embodiments, the transfer transistor 134 is formed by etching an opening in the substrate 102, forming a gate dielectric layer 602 on the first side 102a of the substrate 102 and within the opening, and forming a gate electrode 604 over the gate dielectric layer 602. In some embodiments, an insulating layer 606 is formed before or after the formation of the gate electrode 604. In some embodiments, forming the transfer transistor includes one or more etching processes, one or more patterning processes, one or more deposition processes (e.g., physical vapor deposition (PVD), atomic layer deposition (ALD), chemical vapor deposition (CVD), etc.), or similar processes. In some embodiments, the gate dielectric layer 602 is or includes an insulating material, such as silicon dioxide (SiO2), silicon nitride (Si3N4), etc. In some embodiments, the gate electrode 604 is or includes a conductive material, such as copper, aluminum, tungsten, a conductive metal alloy, etc.

[0040] like Figure 7As shown in cross-sectional view 700, an interconnect structure 136 is formed on a first side 102a of substrate 102. The interconnect structure 136 includes a plurality of contacts 702 coupled to a floating diffusion region 132 and a transfer transistor 134, and a plurality of metal lines 704 coupled to the contacts 702. In some embodiments, the plurality of metal lines 704 are portions of one or more metal line layers (not shown) coupled through one or more via layers (not shown). An interlayer dielectric 706 surrounds the interconnect structure 136. In some embodiments, the interconnect structure 136 is or includes a conductive material, such as copper, aluminum, tungsten, a conductive metal alloy, etc. In some embodiments, the interlayer dielectric 706 is or includes an insulating material, such as silicon dioxide (SiO2), silicon nitride (Si3N4), etc. In some embodiments, the interconnect structure 136 is formed by etching the openings of the contacts and metal lines within the interlayer dielectric 706 using one or more etching processes and deposition processes such as PVD, ALD, or CVD. In some embodiments, the interconnect structure 136 is formed using a mosaic process, a double mosaic process, or the like.

[0041] like Figure 8 As shown in the cross-sectional view 800, a fourth mask layer 804 is formed over the second side 102b of the substrate 102. In some embodiments, the fourth mask layer 804 includes photoresist and is formed using a deposition process, spin coating process, dip coating process, etc. The fourth mask layer 804 is then patterned to expose the DTI structure corresponding to the structure to be formed (see...). Figure 1B The portion of the second side 102b of the substrate 102 at position 104). In some embodiments, the fourth mask layer 804 is patterned using lithography or the like.

[0042] After patterning the fourth mask layer 804, a first etching process 802 is performed. The first etching process 802 forms a plurality of trenches 806 within the substrate 102. In some embodiments, the first etching process 802 forms trenches extending to a positive well 142. The first etching process 802 further results in the formation of damaged portions and dangling bonds in the inner sidewalls of the substrate 102. In some embodiments, the first etching process includes one or more dry etching operations to form a plurality of trenches with different depths. In other embodiments, one or more dry etching operations are separated by the removal and formation of an additional mask layer.

[0043] like Figure 9As shown in cross-sectional view 900, a first metal oxide layer 114 is deposited on substrate 102 and into a plurality of trenches 806. The deposition of the first metal oxide layer 114 results in the formation of a first oxide layer 112, as the substrate 102 at the inner sidewalls absorbs atoms from the first metal oxide layer 114 and forms a thin silicon dioxide (SiO2) insulating layer. The first metal oxide layer 114 liner the inner sidewalls of the first oxide layer 112. In some embodiments, the first metal oxide layer 114 is or comprises a metal oxide with a greater oxygen density than silicon dioxide (SiO2), such as aluminum oxide (Al2O3), hafnium oxide (HfO2), etc. In some embodiments, the first metal oxide layer 114 is formed using one of PVD, ALD, or CVD.

[0044] like Figure 10 As shown in the cross-sectional view 1000, a second oxide layer 116 is deposited over a first metal oxide layer 114 and into a plurality of trenches 806. In some embodiments, the second oxide layer 116 is or comprises silicon dioxide (SiO2) or another insulating oxide with an oxygen density less than that of the first metal oxide layer 114. In some embodiments, the thickness of the second oxide layer 116 is greater than the thickness of the first oxide layer 112. In other embodiments, the thickness of the second oxide layer 116 is approximately equal to the thickness of the first oxide layer 112 (e.g., varying by about 10%). In some embodiments, the first metal oxide layer 114 is formed using one of PVD, ALD, or CVD.

[0045] like Figure 11A As shown in cross-sectional view 1100a, a second metal oxide layer 118 is deposited on substrate 102 and into a plurality of trenches 806. In some embodiments, the second metal oxide layer 118 is or comprises a metal oxide with a greater oxygen density than silicon dioxide (SiO2), such as aluminum oxide (Al2O3), hafnium oxide (HfO2), etc. In some embodiments, the material of the second metal oxide layer 118 is the same as the material of the first metal oxide layer 114. In some embodiments, the first metal oxide layer 114 is formed using one of PVD, ALD, or CVD.

[0046] like Figure 11BAs shown in the cross-sectional view 1100b, in some embodiments, after the formation of the second metal oxide layer 118, a plurality of trenches 806 have a first width 1102 at the opening of the plurality of trenches (e.g., flush with the second side 102b of the substrate 102). Furthermore, the plurality of trenches 806 have a second width 1104 within the plurality of trenches 806 (e.g., below the second side 102b of the substrate 102), wherein the second width 1104 is greater than the first width 1102. In alternative embodiments, the second width 1104 is less than or approximately equal to the first width 1102.

[0047] like Figure 11C As shown in the cross-sectional view 1100c, in some embodiments, the widths of the plurality of trenches 806 are substantially equal at the central portions of the plurality of trenches 806 (e.g., varying by less than 10%). Furthermore, the thicknesses of the first oxide layer 112, the first metal oxide layer 114, the second oxide layer 116, and the second metal oxide layer 118 can vary within a first range (e.g., varying by less than 10% of the average thickness of the layers). Figure 11D As shown in the cross-sectional view 1100d, in some embodiments, a portion of the plurality of trenches 806 near the bottom surface has a width smaller than a first width and a second width (see...). Figure 11B The third width 1106 of 1104). That is, the multiple grooves 806 gradually taper as they reach the bottom surface, gradually decreasing in width.

[0048] like Figure 12 As shown in the cross-sectional view 1200, a DTI filler 120 is formed on top of a second metal oxide layer 118 within a plurality of trenches 806, and fills the trenches 806. In some embodiments, the DTI filler 120 is or includes polysilicon, silicon dioxide, or an insulating material. In some embodiments, the DTI filler 120 is formed using one or more of PVD, ALD, or CVD.

[0049] like Figure 13A As shown in the cross-sectional view 1300a, a planarization process (e.g., chemical mechanical planarization (CMP)) is performed on the DTI filler 120 to remove a portion of the DTI filler 120 above the second side 102b of the substrate 102. In some embodiments, portions of the first oxide layer 112, the first metal oxide layer 114, the second oxide layer 116, and the second metal oxide layer 118 above the second side 102b of the substrate 102 are also removed. In some embodiments, the planarization process removes a portion of the substrate 102, such that the second side 102b of the substrate 102 is closer to the first side 102a of the substrate 102.

[0050] like Figure 13BAs shown in cross-sectional view 1300b, in some embodiments, the planarization process stops at or above the upper surface of the second metal oxide layer 118 at a first line 1302, such that the first oxide layer 112, the first metal oxide layer 114, the second oxide layer 116, and the second metal oxide layer 118 remain above the second side 102b of the substrate 102. In other embodiments, the planarization process stops at or just below the second side 102b of the substrate 102 at a second line 1304, such that the first thickness 1102 is still greater than the second thickness 1104. In other embodiments, the planarization process stops at a third line 1306 below the second side 102b of the substrate 102, such that the first thickness 1102 is approximately equal to the second thickness 1104 (e.g., within 10% of the second thickness 1104).

[0051] like Figure 14 As shown in the cross-sectional view 1400, a plurality of color filters 138 and a plurality of microlenses 140 are formed on the second side 102b of the substrate 102. The plurality of color filters 138 are positioned such that individual photodetectors among a plurality of photodetectors (see [reference]). Figure 2B 205) is covered by individual color filters among multiple color filters 138. That is, only one color filter is located directly above any individual photodetector among the multiple photodetectors (see Figure 2B (205). In some embodiments, the plurality of microlenses 140 are independent of a single photodetector and are located directly above the single photodetector. In other embodiments, the plurality of microlenses are offset from the position centered on the respective photodetector based on their position in the photodetector array to better guide light from the aperture in the structure surrounding the photodetector array to the photodetector within the photodetector array.

[0052] Figure 15 Flowcharts of some embodiments of a method for forming a DTI structure with a complementary dipole generation layer are shown. Although the methods and other methods shown and / or described herein are depicted as a series of actions or events, it should be understood that this disclosure is not limited to the shown order or actions. Therefore, in some embodiments, actions may be performed in a different order than shown, and / or may be performed simultaneously. Furthermore, in some embodiments, the shown actions or events may be subdivided into multiple actions or events that may be performed at separate times or simultaneously with other actions or sub-actions. In some embodiments, some shown actions or events may be omitted, and other actions or events not shown may be included.

[0053] In step 1502, multiple photodetectors and multiple floating diffusion regions are implanted into the substrate. For example, it is possible to... Figure 5 Find an example of an illustration that explains this step.

[0054] In 1504, multiple transfer transistors are formed on the first side of the substrate. For example, it is possible to... Figure 6 Find an example of an illustration that explains this step.

[0055] In 1506, multiple trenches are etched in the second side of the substrate. For example, it can be done... Figure 8 Find an example of an illustration that explains this step.

[0056] At 1508, a first metal oxide layer is deposited on the substrate, wherein a first oxide layer is subsequently formed beneath the first metal oxide layer by attracting oxygen atoms from the first metal oxide layer. For example, it can be done... Figure 9 Find an example of an illustration that explains this step.

[0057] At 1510, a second oxide layer is deposited on the first metal oxide layer and within multiple trenches. For example, it can be... Figure 10 Find an example of an illustration that explains this step.

[0058] At 1512, a second metal oxide layer is deposited on the second oxide layer and within multiple trenches. For example, it can be... Figures 11A-11D Find an example with an accompanying diagram illustrating this step.

[0059] At 1514, a deep trench isolation (DTI) filler is deposited on top of the second metal oxide layer, and multiple trenches are filled. For example, it can be done... Figure 12 Find an example of an illustration that explains this step.

[0060] At step 1516, a planarization process is performed to remove a portion of the DTI filler above the second side of the substrate. An example illustrating this step can be found in Figure 13, for instance.

[0061] Some embodiments relate to a pixel array including: a substrate; a plurality of photodetectors located within the substrate; a deep trench isolation (DTI) structure having a plurality of segments extending between the photodetectors of the plurality of photodetectors, the DTI structure including: a first oxide layer having a first oxygen density; a first metal oxide layer lining the inner sidewalls of the first oxide layer and having a second oxygen density greater than the first oxygen density; a second oxide layer lining the inner sidewalls of the first metal oxide layer and having a third oxygen density less than the second oxygen density; and a second metal oxide layer lining the inner sidewalls of the second oxide layer and having a fourth oxygen density greater than the third oxygen density.

[0062] In some embodiments, the third oxygen density is within 10% of the value of the first oxygen density, and the second oxygen density is within 10% of the value of the fourth oxygen density. In some embodiments, the first oxygen density and the third oxygen density are less than 1.25 g / cm³, and the second oxygen density and the fourth oxygen density are greater than 1.35 g / cm³. In some embodiments, the first metal oxide layer is on top of the first oxide layer, and the first oxide layer is on top of the substrate. In some embodiments, the second metal oxide layer is on top of the second oxide layer. In some embodiments, the first oxide layer has a first thickness and the second oxide layer has a second thickness greater than the first thickness.

[0063] Other embodiments relate to a photodetector array, including: a substrate; a first photodetector located within the substrate; a second photodetector located within the substrate; a trench defined by an inner sidewall of the substrate surrounding the first and second photodetectors and extending between the first and second photodetectors; a first oxide layer lining the inner sidewall of the trench and a bottom surface of the trench; a first metal oxide layer lining the inner sidewall of the first oxide layer and a top surface of the first oxide layer; a second oxide layer lining the inner sidewall of the first metal oxide layer and a top surface of the first metal oxide layer; a second metal oxide layer lining the inner sidewall of the second oxide layer and a top surface of the second oxide layer; and a filling structure extending between the inner sidewalls of the second metal oxide layer.

[0064] In some embodiments, the first oxide layer has a first oxygen density, and the first metal oxide layer has a second oxygen density and extends between the inner sidewalls of the first oxide layer, wherein the second oxygen density is greater than the first oxygen density. In some embodiments, the second oxide layer has a first oxygen density, and the second metal oxide layer has a second oxygen density and extends between the inner sidewalls of the second oxide layer, wherein the second oxygen density is greater than the first oxygen density. In some embodiments, the first oxide layer, the first metal oxide layer, the second oxide layer, and the second metal oxide layer are configured to form a deep trench isolation (DTI) structure, wherein the flat band voltage between the deep trench isolation structure and the substrate is greater than 3. In some embodiments, the first oxide layer has a first oxygen density and the first metal oxide layer has a second oxygen density, wherein the first oxygen density and the second oxygen density are configured to generate a first dipole, wherein the second oxide layer has a third oxygen density and the second metal oxide layer has a fourth oxygen density, and wherein the third oxygen density and the fourth oxygen density are configured to generate a second dipole. In some embodiments, a third oxide layer and a third metal oxide layer configured to generate a third dipole are further included, wherein the third oxide layer and the third metal oxide layer extend between the filling structure and the second metal oxide layer and isolate the filling structure from the second metal oxide layer. In some embodiments, the first oxide layer, the first metal oxide layer, the second oxide layer, the second metal oxide layer, the third oxide layer, and the third metal oxide layer have a total thickness of less than 250 angstroms.

[0065] Another embodiment relates to a method of forming a photodetector array, comprising: injecting a plurality of photodetectors and a plurality of floating diffusion regions into a substrate; forming a plurality of transfer transistors on a first side of the substrate; etching a plurality of trenches in a second side of the substrate; depositing a first metal oxide layer on the substrate, wherein a first oxide layer is subsequently formed below the first metal oxide layer by attracting oxygen atoms from the first metal oxide layer; depositing a second oxide layer on the first metal oxide layer and within the plurality of trenches; depositing a second metal oxide layer on the second oxide layer and within the plurality of trenches; depositing a deep trench isolation (DTI) filler on the second metal oxide layer and filling the plurality of trenches; and performing a planarization process to remove a portion of the deep trench isolation filler above the second side of the substrate.

[0066] In some embodiments, the planarization process further removes a portion of the first oxide layer, a portion of the first metal oxide layer, a portion of the second oxide layer, and a portion of the second metal oxide layer above the second side of the substrate. In some embodiments, the process further includes: forming a plurality of color filters over the second side of the substrate; and forming a plurality of microlenses over the plurality of color filters. In some embodiments, the process further includes: forming a plurality of positive wells on the first side of the substrate before forming the plurality of floating diffusion regions, wherein the plurality of floating diffusion regions are formed within the plurality of positive wells. In some embodiments, the deep trench isolation filler has a first width between the inner sidewalls of the second metal oxide layer, flush with the second side of the substrate, and the deep trench isolation filler has a second width between the inner sidewalls of the second metal oxide layer within the substrate, wherein the first width is smaller than the second width. In some embodiments, the planarization process removes a portion of the deep trench isolation filler having the first width. In some embodiments, the first metal oxide layer and the second oxide layer comprise one of alumina or hafnium oxide, and wherein the first oxide layer and the second oxide layer comprise silicon dioxide.

[0067] It should be understood that in this written description and the following claims, terms such as “first,” “second,” and “third” are merely general identifiers used for ease of description to distinguish different elements in a figure or series of figures. In themselves, these terms do not imply any temporal order or structural proximity of these elements and are not intended to describe corresponding elements in different exemplary embodiments and / or embodiments not shown. For example, “first dielectric layer” described in conjunction with the first figure may not correspond to “first dielectric layer” described in conjunction with another figure, and may not correspond to “first dielectric layer” in embodiments not shown.

[0068] The foregoing has outlined features of several embodiments to enable those skilled in the art to better understand various aspects of this disclosure. Those skilled in the art should understand that they can readily use this disclosure as a basis for designing or modifying other processes and structures for the same purposes and / or to achieve the same advantages of the embodiments described herein. Those skilled in the art should also recognize that such equivalent structures do not depart from the spirit and scope of this invention, and that various alterations, substitutions, and modifications can be made to this document without departing from the spirit and scope of this invention.

Claims

1. A pixel array, characterized in that, include: Substrate; Multiple photodetectors are located within the substrate; A deep trench isolation structure having multiple segments extending between the photodetectors of the multiple photodetectors, the deep trench isolation structure comprising: The first oxide layer has a first oxygen density; A first metal oxide layer lining the inner sidewall of the first oxide layer and having a second oxygen density, wherein the second oxygen density is greater than the first oxygen density; A second oxide layer liner is fitted onto the inner sidewall of the first metal oxide layer and has a third oxygen density, the third oxygen density being less than the second oxygen density; and The second metal oxide layer lining the inner sidewall of the second oxide layer and having a fourth oxygen density, the fourth oxygen density being greater than the third oxygen density.

2. The pixel array according to claim 1, characterized in that, The first metal oxide layer is on top of the first oxide layer, and the first oxide layer is on the substrate.

3. The pixel array according to claim 2, characterized in that, The second metal oxide layer is on top of the second oxide layer.

4. The pixel array according to claim 1, characterized in that, The first oxide layer has a first thickness and the second oxide layer has a second thickness greater than the first thickness.

5. A photodetector array, characterized in that, include: Substrate; A first photodetector is located within the substrate; The second photodetector is located within the substrate; A trench defined by the inner sidewall of the substrate surrounds the first photodetector and the second photodetector and extends between the first photodetector and the second photodetector; The first oxide layer lines the inner sidewalls of the trench and the bottom surface of the trench; The first metal oxide layer lining the inner sidewall of the first oxide layer and the upper surface of the first oxide layer; The second oxide layer lining the inner sidewall of the first metal oxide layer and the upper surface of the first metal oxide layer; The second metal oxide layer lining the inner sidewall of the second oxide layer and the upper surface of the second oxide layer; as well as The filling structure extends between the inner sidewalls of the second metal oxide layer.

6. The photodetector array according to claim 5, characterized in that, The first oxide layer has a first oxygen density, and the first metal oxide layer has a second oxygen density and extends between the inner sidewalls of the first oxide layer, wherein the second oxygen density is greater than the first oxygen density.

7. The photodetector array according to claim 5, characterized in that, The second oxide layer has a first oxygen density, and The second metal oxide layer has a second oxygen density and extends between the inner sidewalls of the second oxide layer, wherein the second oxygen density is greater than the first oxygen density.

8. The photodetector array according to claim 5, characterized in that, The first oxide layer, the first metal oxide layer, the second oxide layer, and the second metal oxide layer are configured to form a deep trench isolation structure, wherein the flat band voltage between the deep trench isolation structure and the substrate is greater than 3.

9. The photodetector array according to claim 5, characterized in that, The first oxide layer has a first oxygen density and the first metal oxide layer has a second oxygen density, wherein the first oxygen density and the second oxygen density are configured to generate a first dipole, wherein the second oxide layer has a third oxygen density and the second metal oxide layer has a fourth oxygen density, wherein the third oxygen density and the fourth oxygen density are configured to generate a second dipole.

10. The photodetector array according to claim 5, characterized in that, It also includes a third oxide layer and a third metal oxide layer configured to generate a third dipole, wherein the third oxide layer and the third metal oxide layer extend between the filling structure and the second metal oxide layer and isolate the filling structure from the second metal oxide layer.

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