Semiconductor mos device

Abstract

This utility model discloses a semiconductor MOS transistor device, comprising: a MOS chip, a metal heat sink, a gate pin, a drain pin, and a source pin. The back side of the MOS chip is connected to the upper surface of the metal heat sink via an adhesive layer. The gate pad, drain pad, and source pad on the front side of the MOS chip are respectively connected to one end of the gate pin, drain electrode, and source electrode via gate wire, drain wire, and source wire, respectively. The drain electrode is electrically connected to the drain pin via one of an over-temperature fuse and an over-current fuse. The source electrode is electrically connected to the source pin via the other of an over-temperature fuse and an over-current fuse. An insulating package covers the MOS chip, the metal heat sink, the drain electrode, the source electrode, and the gate pin near the MOS chip. This utility model can automatically fuse and break under high temperature or high current conditions, providing high safety and reliability.

Description

Technical Field

[0001] This utility model relates to a semiconductor MOS transistor device, belonging to the field of MOS transistor technology. Background Technology

[0002] Metal-oxide-semiconductor field-effect transistors (MOSFETs) are core power switching devices in modern electronic devices and are widely used in power management, motor drive, power conversion and other technical fields. At present, MOSFETs face severe challenges of overcurrent and overheating in practical applications, which can lead to the burnout of the entire circuit board in severe cases. Therefore, there is an urgent need for a design to solve the overcurrent and overheating problems of MOSFETs. Summary of the Invention

[0003] The purpose of this invention is to provide a semiconductor MOS transistor device that can automatically melt and break under high temperature or high current conditions, thus exhibiting high safety and reliability.

[0004] To achieve the above objectives, the technical solution adopted by this utility model is as follows: a semiconductor MOS transistor device, comprising: a MOS chip, a metal heat sink, a gate pin, a drain pin, and a source pin. The back side of the MOS chip is connected to the upper surface of the metal heat sink through an adhesive layer. The gate pad, drain pad, and source pad on the front side of the MOS chip are respectively connected to one end of the gate pin, the drain electrode, and the source electrode through gate wire, drain wire, and source wire, respectively. The drain electrode is electrically connected to the drain pin through one of an over-temperature fuse and an over-current fuse. The source electrode is electrically connected to the source pin through the other of an over-temperature fuse and an over-current fuse. An insulating package covers the MOS chip, the metal heat sink, the drain electrode, the source electrode, and the gate pin at the end closest to the MOS chip.

[0005] The following are further improvements to the above technical solution: 1. In the above scheme, the gate pin, drain pin and source pin are arranged parallel to each other and spaced apart.

[0006] 2. In the above scheme, the adhesive layer is an epoxy resin adhesive layer.

[0007] 3. In the above scheme, the drain electrode and the drain pin are electrically connected by an overheat fuse.

[0008] 4. In the above scheme, the source electrode and the source pin are electrically connected through an overcurrent fuse.

[0009] 5. In the above scheme, the metal heat sink has an extension portion, which is disposed on the side of the insulating package opposite to the gate pin, drain pin and source pin.

[0010] Due to the application of the above technical solution, this utility model has the following advantages compared with the prior art: This utility model relates to a semiconductor MOS transistor device. The gate pad, drain pad, and source pad on the front side of the MOS chip are respectively connected to one end of the gate pin, drain electrode, and source electrode via gate wire, drain wire, and source wire, respectively. The drain electrode is electrically connected to the drain pin via one of an over-temperature fuse and an over-current fuse, and the source electrode is electrically connected to the source pin via the other of an over-temperature fuse and an over-current fuse. When the device experiences a large current flow or overheating, automatic fuse protection can be achieved, effectively preventing circuit board burnout and other malfunctions, and improving the safety and reliability of the applied circuit board. Attached Figure Description

[0011] Appendix Figure 1 This is a schematic diagram of the structure of the semiconductor MOS transistor device of this utility model; Appendix Figure 2 For the appendix Figure 1 A cross-sectional view from the perspective of the middle AA.

[0012] In the above figures: 1. MOS chip; 2. Metal heat sink; 3. Gate pin; 4. Drain pin; 5. Source pin; 6. Adhesive layer; 71. Gate pad; 72. Drain pad; 73. Source pad; 81. Gate wire; 82. Drain wire; 83. Source wire; 91. Drain electrode; 92. Source electrode; 10. Overheat fuse; 11. Overcurrent fuse; 12. Insulating package. Detailed Implementation

[0013] The present patent can be further understood through the specific embodiments given below, but they are not intended to limit the present patent.

[0014] Example 1: A semiconductor MOS transistor device includes: a MOS chip 1, a metal heat sink 2, a gate pin 3, a drain pin 4, and a source pin 5. The back side of the MOS chip 1 is connected to the upper surface of the metal heat sink 2 through an adhesive layer 6. The gate pad 71, drain pad 72, and source pad 73 on the front side of the MOS chip 1 are respectively connected to one end of the gate pin 3, the drain solder 91, and the source solder 92 through gate solder wire 81, drain solder wire 82, and source solder wire 83. The drain solder 91 is electrically connected to the drain pin 4 through one of the over-temperature fuse 10 and the over-current fuse 11. The source solder 92 is electrically connected to the source pin 5 through the other of the over-temperature fuse 10 and the over-current fuse 11. An insulating package 12 covers the MOS chip 1, the metal heat sink 2, the drain solder 91, the source solder 92, and the gate pin 3 near the end of the MOS chip 1.

[0015] The gate pin 3, drain pin 4 and source pin 5 are arranged parallel to each other and spaced apart.

[0016] The aforementioned adhesive layer 6 is an epoxy resin adhesive layer.

[0017] The materials of the aforementioned overheated fuse bar 10 and overflow fuse bar 11 are existing technologies.

[0018] Example 2: A semiconductor MOS transistor device includes: a MOS chip 1, a metal heat sink 2, a gate pin 3, a drain pin 4, and a source pin 5. The back side of the MOS chip 1 is connected to the upper surface of the metal heat sink 2 through an adhesive layer 6. The gate pad 71, drain pad 72, and source pad 73 on the front side of the MOS chip 1 are respectively connected to one end of the gate pin 3, the drain solder 91, and the source solder 92 through gate solder wire 81, drain solder wire 82, and source solder wire 83. The drain solder 91 is electrically connected to the drain pin 4 through one of the over-temperature fuse 10 and the over-current fuse 11. The source solder 92 is electrically connected to the source pin 5 through the other of the over-temperature fuse 10 and the over-current fuse 11. An insulating package 12 covers the MOS chip 1, the metal heat sink 2, the drain solder 91, the source solder 92, and the gate pin 3 near the end of the MOS chip 1.

[0019] The aforementioned drain electrode 91 is electrically connected to the drain pin 4 via an overheat fuse 10.

[0020] The aforementioned source electrode 92 is electrically connected to the source pin 5 via the overcurrent fuse strip 11.

[0021] The aforementioned metal heat sink 2 has an extension portion disposed on the side of the insulating package 12 opposite to the gate pin 3, drain pin 4 and source pin 5.

[0022] The working principle of this patent is as follows: When current flows between MOS chip 1 and drain pin 4, if the temperature is too high, the overheat fuse 10 will melt, thus preventing the MOS chip 1 from overheating. When current flows between MOS chip 1 and source pin 5, if the current is too large, the overcurrent fuse 11 will melt, thus preventing the related components from overloaded or short-circuited due to excessive current.

[0023] When the above-mentioned semiconductor MOSFET device is used, it can automatically fuse and protect itself when the device is subjected to a large current or overheats, effectively avoiding failures such as circuit board burnout and improving the safety and reliability of the applied circuit board.

[0024] The above embodiments are only for illustrating the technical concept and features of this utility model, and are intended to enable those skilled in the art to understand the content of this utility model and implement it accordingly. They should not be construed as limiting the scope of protection of this utility model. All equivalent changes or modifications made in accordance with the spirit and essence of this utility model should be included within the scope of protection of this utility model.

Claims

1. A semiconductor MOS transistor device, characterized in that: include: The MOS chip (1), metal heat sink (2), gate pin (3), drain pin (4), and source pin (5) are connected to the upper surface of the metal heat sink (2) via an adhesive layer (6). The gate pad (71), drain pad (72), and source pad (73) on the front side of the MOS chip (1) are connected to the gate pin (3), drain electrode (91), and source electrode (92) respectively via gate bonding wire (81), drain bonding wire (82), and source bonding wire (83). At one end, the drain electrode (91) is electrically connected to the drain pin (4) through one of the overheat fuse (10) and the overcurrent fuse (11), and the source electrode (92) is electrically connected to the source pin (5) through the other of the overheat fuse (10) and the overcurrent fuse (11). An insulating package (12) covers the MOS chip (1), the metal heat sink (2), the drain electrode (91), the source electrode (92), and the gate pin (3) near the end of the MOS chip (1).

2. The semiconductor MOS transistor device according to claim 1, characterized in that: The gate pin (3), drain pin (4) and source pin (5) are arranged parallel to each other and spaced apart.

3. The semiconductor MOS transistor device according to claim 1, characterized in that: The adhesive layer (6) is an epoxy resin adhesive layer.

4. The semiconductor MOS transistor device according to claim 1, characterized in that: The drain electrode electrode (91) and the drain pin (4) are electrically connected by an overheated fuse bar (10).

5. The semiconductor MOS transistor device according to claim 1, characterized in that: The source electrode (92) and the source pin (5) are electrically connected by an overcurrent fuse (11).

6. The semiconductor MOS transistor device according to claim 1, characterized in that: The metal heat sink (2) has an extension disposed on the side of the insulating package (12) opposite to the gate pin (3), drain pin (4) and source pin (5).

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