Electric motor cycle

Abstract

The application provides an electric motorcycle, which comprises a DC-DC converter, wherein the DC-DC converter comprises an output rectification circuit and a voltage spike absorption circuit; the output rectification circuit comprises a rectification element; the voltage spike absorption circuit comprises an NMOS tube, an absorption capacitor and a driving module; the source of the NMOS tube is connected to the rectification element; the absorption capacitor is connected to the drain of the NMOS tube; and the driving module is connected to the gate of the NMOS tube. Thus, the electric motorcycle provided by the application can reduce the loss of the DC-DC converter and improve the absorption rate of the voltage spike by using the NMOS tube with low conduction resistance.

Description

Technical Field

[0001] This application relates to the field of electric motorcycles, and more specifically, to an electric motorcycle. Background Technology

[0002] The electric motorcycle includes a DC-DC converter. The DC-DC converter provides power to the low-voltage loads of the electric motorcycle. These low-voltage loads include a low-voltage battery, lights, horn, and instruments. The DC-DC converter includes an output rectifier circuit, which contains rectifier elements. These rectifier elements rectify the input voltage of the DC-DC converter into an output voltage to power the loads of the electric motorcycle. Because rectifier elements have parasitic inductance and capacitance, they generate high voltage spikes when switching on and off, which can affect their performance and even damage them. Utility Model Content

[0003] In view of the above problems, this application provides an electric motorcycle whose DC-DC converter can better reduce the damage of voltage spikes to rectifier components.

[0004] An electric motorcycle includes a frame, body panels, a running gear system, a power system, and an electrical system. The body panels at least partially cover the frame. The running gear system is at least partially located below the frame. The power system includes a power battery and a drive motor. The power battery is connected to the drive motor to supply power to it, and the drive motor is connected to the running gear to drive it. The electrical system includes a DC-DC converter and a low-voltage load. The DC-DC converter includes an input-side circuit, an output rectifier circuit, and a voltage spike absorption circuit. The output rectifier circuit includes a rectifier element and an output inductor. The input terminal of the input-side circuit receives the input voltage from the DC-DC converter, and the output terminal of the input-side circuit is coupled to the input terminal of the output rectifier circuit. The input terminal of the output rectifier circuit is connected to the first terminal of the rectifier element, the first terminal of the output inductor, and the voltage spike absorption circuit. The second terminal of the rectifier element is grounded, and the second terminal of the output inductor outputs the output voltage of the DC-DC converter to supply power to the low-voltage load. The voltage spike absorption circuit includes an NMOS transistor, a snubber capacitor, and a drive module. The source of the NMOS transistor is connected to the first terminal of the rectifier element. The first terminal of the snubber capacitor is connected to the drain of the NMOS transistor, and the second terminal is grounded. The output terminal of the drive module is connected to the gate of the NMOS transistor.

[0005] In one implementation, the driving module includes an isolation driving unit, which includes a driving input terminal and a driving output terminal. The driving input terminal receives a preset pre-stage driving signal, and the driving output terminal is connected to the gate of an NMOS transistor.

[0006] In one implementation, the isolation drive unit further includes a power supply input terminal and a voltage input terminal. The voltage input terminal is connected to the source of the NMOS transistor, and the power supply input terminal receives the power supply voltage from the isolation drive unit.

[0007] In one implementation, the isolation drive unit further includes a bootstrap capacitor, with its two ends connected to the power supply input terminal and the voltage input terminal, respectively.

[0008] In one implementation, the isolation drive unit further includes a bootstrap diode, the cathode of which is connected to the power supply input terminal, and the anode of which receives the power supply voltage.

[0009] In one implementation, the driver module further includes a pre-drive unit, the output of which is connected to the driver input.

[0010] In one implementation, the voltage spike absorption circuit also includes a power diode, with its two ends connected to the source and drain of the NMOS transistor, respectively.

[0011] In one implementation, the output rectifier circuit further includes a current multiplier inductor, one end of which is connected to the first end of the rectifier element.

[0012] In one implementation, the output rectifier circuit further includes an output capacitor, with one end of the output capacitor connected to the other end of the current multiplier inductor and the second end of the output capacitor connected to the second end of the rectifier element.

[0013] In one implementation, the electrical system further includes a high-voltage power distribution unit and an on-board charger. The output of the high-voltage power distribution unit is connected to a DC-DC converter to provide the input voltage. The output of the on-board charger is connected to the input of the high-voltage power distribution unit, and the input of the on-board charger can be connected to an external charging device. The on-board charger can convert the charging voltage provided by the external charging device into high-voltage direct current and output the high-voltage direct current to the input of the high-voltage power distribution unit.

[0014] Therefore, the electric motorcycle provided in this application uses an NMOS transistor to control the absorption capacitor to absorb the voltage spikes of the rectifier components. Under the same on-resistance, the NMOS transistor has a lower cost and is easier to select. By using an NMOS transistor with low on-resistance, the loss of the DC-DC converter is reduced, the absorption rate of voltage spikes is improved, and the damage of voltage spikes to the rectifier components is greatly reduced. Attached Figure Description

[0015] Figure 1 A schematic diagram of the electric motorcycle provided in this application.

[0016] Figure 2 This is a schematic diagram of the vehicle power supply assembly provided in this application.

[0017] Figure 3 This is a schematic diagram of the DC-DC converter provided in this application.

[0018] Figure 4 A schematic diagram of the output rectifier circuit and voltage spike absorption circuit provided in this application.

[0019] Figure 5 A schematic diagram of the isolation drive unit provided in this application.

[0020] Figure 6 The signal timing diagram for the DC-DC converter provided in this application. Detailed Implementation

[0021] The technical solutions in the embodiments of this application will be clearly described below with reference to the accompanying drawings.

[0022] It is understood that the connection relationships described in this application refer to direct or indirect connections. For example, the connection between A and B can be a direct connection between A and B, or an indirect connection between A and B through one or more other electrical components. For example, A can be directly connected to C, and C can be directly connected to B, thus achieving a connection between A and B through C. It is also understood that the "A connects to B" described in this application can be a direct connection between A and B, or an indirect connection between A and B through one or more other electrical components.

[0023] In the description of this application, unless otherwise stated, " / " means "or". For example, A / B can mean A or B. The "and / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A exists alone, A and B exist simultaneously, and B exists alone.

[0024] Please see Figure 1 , Figure 1 This is a schematic diagram of the electric motorcycle 100 provided in this application. The electric motorcycle 100 includes a frame 11, a transmission system 12, a running system 13, an electrical system 14, a power system 15, and a body panel 16.

[0025] The frame 11 forms the basic framework of the electric motorcycle 100. A body panel 16 at least partially covers the frame 11. The running gear 13 is at least partially disposed beneath the frame 11. The power system 15 is supported by the frame 11 and is connected to the running gear 13 via a transmission system 12, thereby enabling the power system 15 to drive the running gear 13.

[0026] The electrical system 14 includes electrical equipment for the electric motorcycle 100 and controllers that work with the electrical equipment. For example, such as... Figure 2 As shown, the electrical system 14 may include an on-board power supply assembly 141. The electrical system 14 may also include a low-voltage load 144. The low-voltage load 144 may be a low-voltage electrical device of the electric motorcycle 100. The on-board power supply assembly 141 enables the electric motorcycle 100 to charge and discharge and supplies power to the low-voltage load 144.

[0027] The power system 15 includes a power battery 151 ( Figure 2 (as shown in the diagram) and a drive motor, the power battery 151 is connected to the drive motor to supply power to the drive motor, the drive motor is connected to the walking system 13 to drive the walking system 13.

[0028] It should be noted that, based on the number of wheels, electric motorcycle 100 can be any of two-wheeled, three-wheeled, or four-wheeled electric motorcycles. This application only uses two-wheeled electric motorcycle as an example for illustration and does not limit the specific type of electric motorcycle 100.

[0029] Please see Figure 2 , Figure 2 This is a schematic diagram of the vehicle power assembly 141 provided in this application. The vehicle power assembly 141 (Conversion & Distribution Unit, CDU) includes an on-board charger 1411 (OBC), a power distribution unit 1412 (PDU), and a DC-DC converter 1413.

[0030] The input terminal of DC-DC converter 1413 is connected to the output terminal of high-voltage distributor 1412, and the output terminal of DC-DC converter 1413 is connected to low-voltage load 144. DC-DC converter 1413 can receive the output voltage of high-voltage distributor 1412 as the input voltage of DC-DC converter 1413, and after voltage conversion, supply power to low-voltage load 144.

[0031] The input terminal of the high voltage distributor 1412 is connected to the output terminal of the on-board charger 1411. The high voltage distributor 1412 can distribute the output voltage of the on-board charger 1411 to the DC-DC converter 1413 to provide the input voltage of the DC-DC converter 1413.

[0032] The input terminal of the on-board charger 1411 can be connected to the output terminal of an external charging device. The on-board charger 1411 can convert the charging voltage provided by the external charging device into high-voltage DC power and output it to the high-voltage distributor 1412. The external charging device can be an AC charging pile, a battery swapping cabinet, a charging station, etc. This application does not limit the type of external charging device.

[0033] In some embodiments, the output terminal of the high-voltage distributor 1412 is connected to the power battery 151. The high-voltage distributor 1412 can also distribute the voltage converted by the on-board charger 1411 to the power battery 151, and / or distribute the voltage output by the power battery 151 to the DC-DC converter 1413. The high-voltage distributor 1412 can also charge the power battery 151 and / or control and protect the charging and discharging of the power battery 151.

[0034] In some embodiments, the low-voltage load 144 may include a low-voltage battery, vehicle lights, horn, instrument panel, etc.

[0035] Please see Figure 3 , Figure 3 This is a schematic diagram of the DC-DC converter 1413 provided in this application. The DC-DC converter 1413 includes an input-side circuit 1413a, an output rectifier circuit 1413b, and a voltage spike absorption circuit 1413c.

[0036] The input terminal of the input-side circuit 1413a can receive a preset input voltage. This preset input voltage can be the output voltage of the high-voltage distributor 1412. The input-side circuit 1413a can also perform filtering and noise reduction on the input voltage, thereby reducing its ripple. The input-side circuit 1413a includes a power switch transistor; by controlling the switching on and off of the power switch transistor, the input-side circuit 1413a can convert the input voltage into a pulsed AC voltage.

[0037] The input terminal of the output rectifier circuit 1413b is coupled to the output terminal of the input-side circuit 1413a. The output rectifier circuit 1413b includes a rectifier element and a transformer T1, which includes a primary coil and a secondary coil. The primary coil of transformer T1 receives a pulsed AC voltage. The secondary coil of transformer T1 is connected to the input terminal of the rectifier element. The output terminal of the rectifier element is connected to a low-voltage load 144. The rectifier element can rectify the pulsed AC voltage into an output voltage and supply power to the low-voltage load 144. The rectifier element may include diodes, MOSFETs, etc. By controlling the alternating switching of the rectifier element, the pulsed AC voltage is converted into a DC voltage that meets the requirements to supply power to the low-voltage load 144.

[0038] A voltage spike absorption circuit 1413c is connected to the rectifier element. The voltage spike absorption circuit 1413c can absorb voltage spikes generated when the rectifier element switches on and off. Specifically, if the rectifier element is a diode, a voltage spike will be generated during the reverse recovery process when the diode switches on and off. If the rectifier element is a MOSFET, when the MOSFET switches on and off, the parasitic inductance in the MOSFET generates a reverse electromotive force, and / or the charge stored in the parasitic capacitance in the MOSFET is rapidly released, thus generating a voltage spike. Voltage spikes can cause circuit noise, shorten the lifespan of the rectifier element, and even damage the rectifier element. Therefore, the voltage spike absorption circuit 1413c provided in this application can absorb voltage spikes generated when the rectifier element switches on and off, thereby reducing circuit noise, increasing the lifespan of the rectifier element, and protecting the rectifier element.

[0039] Specifically, taking a rectifier element including rectifier element Q1 and rectifier element Q2 as an example, please refer to [link to relevant documentation]. Figure 4 , Figure 4 A schematic diagram of the output rectifier circuit 1413b and the voltage spike absorption circuit 1413c provided in this application.

[0040] The output rectifier circuit 1413b includes a current multiplier inductor L1, a current multiplier inductor L2, rectifier elements Q1 and Q2, an output capacitor C3, and a transformer T1. The output rectifier circuit 1413b is a synchronous current multiplier rectifier circuit. Here, we will use an example where both rectifier elements Q1 and Q2 are NMOS transistors, but this application does not impose any limitations on the types of rectifier elements Q1 and Q2.

[0041] The voltage spike absorption circuit 1413c includes a driver module, NMOS transistors, and absorption capacitors. The driver module includes a pre-drive unit U1 and an isolation drive unit U2. The NMOS transistors in the voltage spike absorption circuit 1413c include NMOS transistors Q3 and Q4. The absorption capacitors include absorption capacitors C1 and C2. The isolation drive unit U2 includes a drive input terminal, a drive output terminal, a power supply input terminal, and a voltage input terminal. The drive output terminal includes drive output terminal OUTA and drive output terminal OUTB. The power supply input terminal includes power supply input terminal VDDA and power supply input terminal VDDB. The voltage input terminal includes voltage input terminal VSEC+ and voltage input terminal VSEC-.

[0042] The drain of rectifier element Q1 is connected to one end of the secondary winding of transformer T1. The source of rectifier element Q1 is connected to the source of rectifier element Q2. The gate of rectifier element Q1 receives a preset control signal, which controls the switching on and off of rectifier element Q1, enabling it to perform rectification.

[0043] The drain of rectifier element Q2 is connected to the other end of the secondary coil of transformer T1. The source of rectifier element Q2 is grounded. The gate of rectifier element Q2 receives a preset control signal, which controls the switching on and off of rectifier element Q2, enabling it to perform rectification.

[0044] One end of the current multiplier inductor L1 is connected to the drain of the rectifier element Q1. The other end of the current multiplier inductor L1 is connected to one end of the current multiplier inductor L2.

[0045] One end of the current multiplier inductor L2 is connected to one end of the output capacitor C3. The other end of the current multiplier inductor L2 is connected to the drain of the rectifier element Q2. The other end of the output capacitor C3 is grounded.

[0046] The source of NMOS transistor Q3 is connected to the drain of rectifier element Q1. The drain of NMOS transistor Q3 is connected to one end of snubber capacitor C1. The gate of NMOS transistor Q3 is connected to the drive output terminal OUTA of isolation drive unit U2. The other end of snubber capacitor C1 is grounded.

[0047] The source of NMOS transistor Q4 is connected to the drain of rectifier element Q2. The drain of NMOS transistor Q4 is connected to one end of snubber capacitor C2. The gate of NMOS transistor Q4 is connected to the drive output terminal OUTB of isolation drive unit U2. The other end of snubber capacitor C2 is grounded.

[0048] The drive input terminal of the isolation drive unit U2 is connected to the output terminal of the preceding drive unit U1. Both the power supply input terminals VDDA and VDDB of the isolation drive unit U2 receive the supply voltage. The voltage input terminal VSEC+ of the isolation drive unit U2 is connected to the drain of the rectifier element Q1. The voltage input terminal VSEC- of the isolation drive unit U2 is connected to the drain of the rectifier element Q2.

[0049] The pre-stage drive unit U1 can output a pre-stage drive signal to the isolation drive unit U2. The isolation drive unit U2 can receive the pre-stage drive signal, convert it into a drive output signal, and output it to the gate of the NMOS transistor. For example, the isolation drive unit U2 can output the corresponding drive output signals to the gates of NMOS transistors Q3 and Q4 through drive output terminals OUTA and OUTB, respectively.

[0050] Thus, the isolation drive unit U2 can control the on / off state of NMOS transistors Q3 and Q4 respectively through the drive output signals output from drive output terminals OUTA and OUTB. When rectifier Q1 is off and NMOS transistor Q3 is on, the voltage spike generated when rectifier Q1 is off is applied to the first terminal of absorption capacitor C1 through voltage input terminal VSEC+ and NMOS transistor Q3, charging absorption capacitor C1, thereby storing and absorbing the voltage spike generated when rectifier Q1 is off. When rectifier Q2 is off and NMOS transistor Q4 is on, the voltage spike generated when rectifier Q2 is off is applied to the first terminal of absorption capacitor C2 through voltage input terminal VSEC- and NMOS transistor Q4, charging absorption capacitor C2, thereby storing and absorbing the voltage spike generated when rectifier Q2 is off.

[0051] Furthermore, when rectifier Q1 is off and NMOS transistor Q3 is off, the voltage spike generated when rectifier Q1 is off is applied to the first terminal of absorption capacitor C1 through the voltage input terminal VSEC+ and the body diode of NMOS transistor Q3. Thus, absorption capacitor C1 can also store and absorb the voltage spike generated when rectifier Q1 is off. Similarly, when rectifier Q2 is off and NMOS transistor Q4 is off, the voltage spike generated when rectifier Q2 is off is applied to the first terminal of absorption capacitor C2 through the voltage input terminal VSEC- and the body diode of NMOS transistor Q4. Thus, absorption capacitor C2 can also store and absorb the voltage spike generated when rectifier Q2 is off.

[0052] When the absorption capacitor C1 is fully charged, if the NMOS transistor Q3 is turned on, the charge stored in the absorption capacitor C1 will flow back to the voltage input terminal VSEC+ through the NMOS transistor Q3, and then through the current multiplier inductor L1 and the output capacitor C3. Thus, the absorption capacitor C1 can transfer the absorbed voltage spike to the low-voltage load 144, thereby providing additional power to the low-voltage load 144. Similarly, when the absorption capacitor C2 is fully charged, if the NMOS transistor Q4 is turned on, the charge stored in the absorption capacitor C2 will flow back to the voltage input terminal VSEC- through the NMOS transistor Q4, and then through the current multiplier inductor L2 and the output capacitor C3. Thus, the absorption capacitor C2 can transfer the absorbed voltage spike to the low-voltage load 144, thereby providing additional power to the low-voltage load 144.

[0053] It's understandable that NMOS transistors offer better high-voltage and high-current withstand capabilities compared to PMOS transistors, while also being less expensive. Furthermore, the on-resistance of an NMOS transistor is significantly lower than that of a PMOS transistor. Therefore, voltage spikes experience greater losses on PMOS transistors, reducing the energy that the absorption capacitor can store and making it difficult to achieve lossless absorption of voltage spikes. Additionally, PMOS transistors require a negative voltage to ground at their gate to turn on, and the drive module structure for generating this negative voltage is complex, making precise control of the voltage level and timing difficult. In contrast, NMOS transistors do not require a negative voltage to ground at their gate, resulting in a simpler drive module structure for controlling their on / off states and easier, more precise control of the drive voltage and timing.

[0054] Please see Figure 5 , Figure 5 This is a schematic diagram of the isolation drive unit U2 provided in this application. The drive input terminals of the isolation drive unit U2 include drive input terminal INA and drive input terminal INB.

[0055] The driver input terminal INA receives the preceding driver signal DSA. The driver input terminal INB receives the preceding driver signal DSB. The isolation driver unit U2 converts the preceding driver signal DSA into a driver output signal and outputs it to the gate of NMOS transistor Q3 through the driver output terminal OUTA. The isolation driver unit U2 can also convert the preceding driver signal DSB into a driver output signal and output it to the gate of NMOS transistor Q4 through the driver output terminal OUTB. Thus, the isolation driver unit U2 can convert the preceding driver signal DSA into a driver output signal output from the driver output terminal OUTA, and the preceding driver signal DSB into a driver output signal output from the driver output terminal OUTB. In other words, the isolation driver unit U2 can isolate the preceding driver signal from the corresponding driver output signals, thereby ensuring the signal stability, operational stability, and driving efficiency of NMOS transistors Q3 and Q4 of the driver module. Different levels of the preceding driver signals DSA and DSB can control different on / off states of the corresponding NMOS transistors. For example, a high-level pre-amplifier drive signal DSA can control NMOS transistor Q3 to turn on, while a low-level pre-amplifier drive signal DSB can control NMOS transistor Q4 to turn off.

[0056] In some embodiments, the isolation drive unit U2 further includes a bootstrap unit and a bootstrap diode. Here, the description will be based on an example where the bootstrap capacitors include bootstrap capacitor C4 and bootstrap capacitor C5, and the bootstrap diodes include bootstrap diode D1 and bootstrap diode D2.

[0057] The anodes of bootstrap diodes D1 and D2 receive a preset supply voltage VCC, which serves as the positive supply voltage for the isolation drive unit U2. The cathode of bootstrap diode D1 is connected to the power supply input terminal VDDA. The cathode of bootstrap diode D2 is connected to the power supply input terminal VDDB.

[0058] One end of bootstrap capacitor C4 is connected to the power supply input terminal VDDA. The other end of bootstrap capacitor C4 is connected to the voltage input terminal VSEC+. One end of bootstrap capacitor C5 is connected to the power supply input terminal VDDB. The other end of bootstrap capacitor C5 is connected to the voltage input terminal VSEC-.

[0059] Thus, the bootstrap capacitor can stabilize the voltage between the corresponding power supply input terminal and the voltage input terminal, thereby improving the power supply stability of the isolation drive unit U2. In addition, the bootstrap diode can prevent the reverse current flow at the power supply input terminals VDDA and VDDB, enhancing the power supply safety of the isolation drive unit U2.

[0060] In some embodiments, the isolation drive unit U2 can be divided into two independent modules. That is, one module is provided with drive input terminal INA, power supply input terminal VDDA, voltage input terminal VSEC+, and drive output terminal OUTA. The other module is provided with drive input terminal INB, power supply input terminal VDDB, voltage input terminal VSEC-, and drive output terminal OUTB.

[0061] In some embodiments, a power diode may be connected in parallel between the source and drain of NMOS transistor Q3 and / or NMOS transistor Q4.

[0062] Please see Figure 6 , Figure 6 This is a signal timing diagram for the DC-DC converter 1413 provided in this application. Here, the charging current iCL of the absorption capacitor C1, the drive output signal output from the drive output terminal OUTA of the isolation drive unit U2, the pre-stage drive signal DSA received at the drive input terminal INA, and the voltage at the voltage input terminal VSEC+ are used as examples for explanation.

[0063] At time t0, the secondary coil voltage of transformer T1 reverses direction, and the voltage at the input terminal VSEC+ is positive, causing rectifier Q1 to turn off. During the turn-off process of rectifier Q1, the stray inductance in the turn-off circuit resonates through the body diode of NMOS transistor Q3 and the absorption capacitor C1. Since the capacitance of absorption capacitor C1 is much larger than the parasitic capacitance of rectifier Q1, the resonance period of stray inductance and absorption capacitor C1 is very large. Therefore, the current across absorption capacitor C1 can be approximated as changing linearly, i.e., the charging current iCL of absorption capacitor C1 gradually decreases. Because the voltage across absorption capacitor C1 cannot change instantaneously, the voltage at the input terminal VSEC+ is clamped and kept constant by the voltage across absorption capacitor C1 during the turn-off process of rectifier Q1.

[0064] At time t1, during the charging process of the absorption capacitor C1, i.e. when the charging current iCL of the absorption capacitor C1 is positive, the pre-stage drive signal DSA received by the drive input terminal INA is at a high level, thereby turning on the NMOS transistor Q3. At the same time, the body diode of the NMOS transistor Q3 is bypassed, so that the charging current iCL of the absorption capacitor C1 flows through the channel of the NMOS transistor Q3 and the absorption capacitor C1, thereby reducing the conduction loss of the NMOS transistor Q3 during the charging process of the absorption capacitor C1.

[0065] To ensure reliable turn-off of rectifier Q1, the time when the pre-stage drive signal DSA goes high can be delayed by a preset time compared to the turn-off time of rectifier Q1. That is, the pre-stage drive unit U1 can output a high-level pre-stage drive signal DSA after the rectifier has been off for a preset time. Here, the preset time is the duration between time t0 and time t1.

[0066] At time t2, the charging current iCL of the absorption capacitor C1 decreases to 0, and the absorption capacitor C1 begins to discharge. Therefore, the charging current iCL of the absorption capacitor C1 gradually becomes negative. The discharge current of the absorption capacitor C1 flows through the channel of the NMOS transistor Q3 and the current doubler inductor L1 into the low-voltage load 144, thereby releasing the energy of the stored voltage spike to the low-voltage load 144 to provide power to the low-voltage load 144.

[0067] At time t3, the discharge current of the absorption capacitor C1 decreases to 0, meaning the discharge of the absorption capacitor C1 ends, and the pre-stage drive signal DSA received at the drive input terminal INA becomes low. In other words, the pre-stage drive unit U1 can output a low-level pre-stage drive signal DSA when the discharge current of the absorption capacitor drops to a preset threshold. Here, the preset threshold is 0.

[0068] Therefore, the electric motorcycle provided in this application, by using an NMOS transistor to control the absorption capacitor to absorb voltage spikes in the rectifier element, utilizes an NMOS transistor with low on-resistance. Compared to a PMOS transistor with the same on-resistance, the NMOS transistor is less expensive and easier to select. By using an NMOS transistor with low on-resistance, the losses of the DC-DC converter are reduced, and the absorption rate of voltage spikes is improved. Furthermore, by incorporating an isolation drive unit and a bootstrap capacitor, the signal stability, operational stability, NMOS transistor drive efficiency, power supply stability, and safety of the isolation drive unit are improved.

[0069] Those skilled in the art should recognize that the above embodiments are only used to illustrate this application and are not intended to limit this application. Any appropriate changes and variations made to the above embodiments within the essential spirit and scope of this application fall within the scope of protection claimed in this application.

Claims

1. An electric motorcycle, comprising: Frame; A body panel that at least partially covers the vehicle frame; A walking system, at least partially located under the vehicle frame; The power system includes a power battery and a drive motor. The power battery is connected to the drive motor to supply power to the drive motor. The drive motor is connected to the walking system to drive the walking system. An electrical system includes a DC-DC converter and a low-voltage load. The DC-DC converter includes an input-side circuit, an output rectifier circuit, and a voltage spike absorption circuit. The output rectifier circuit includes a rectifier element and an output inductor. The input terminal of the input-side circuit receives the input voltage of the DC-DC converter. The output terminal of the input-side circuit is coupled to the input terminal of the output rectifier circuit. The input terminal of the output rectifier circuit is connected to a first terminal of the rectifier element, a first terminal of the output inductor, and the voltage spike absorption circuit. The second terminal of the rectifier element is grounded. The second terminal of the output inductor outputs the output voltage of the DC-DC converter to power the low-voltage load. The voltage spike absorption circuit is characterized in that it includes an NMOS transistor, an absorption capacitor, and a driving module. The source of the NMOS transistor is connected to the first terminal of the rectifier element; The first terminal of the absorption capacitor is connected to the drain of the NMOS transistor, and the second terminal of the absorption capacitor is grounded. The output of the driving module is connected to the gate of the NMOS transistor.

2. The electric motorcycle as described in claim 1, characterized in that, The driving module includes an isolation driving unit, which includes a driving input terminal and a driving output terminal. The driving input terminal receives a preset pre-stage driving signal, and the driving output terminal is connected to the gate of the NMOS transistor.

3. The electric motorcycle as described in claim 2, characterized in that, The isolation drive unit further includes a power supply input terminal and a voltage input terminal. The voltage input terminal is connected to the source of the NMOS transistor, and the power supply input terminal receives the power supply voltage of the isolation drive unit.

4. The electric motorcycle as described in claim 3, characterized in that, The isolation drive unit also includes a bootstrap capacitor, the two ends of which are respectively connected to the power supply input terminal and the voltage input terminal.

5. The electric motorcycle as described in claim 3, characterized in that, The isolation drive unit also includes a bootstrap diode, the cathode of which is connected to the power supply input terminal, and the anode of which receives the power supply voltage.

6. The electric motorcycle as described in claim 2, characterized in that, The drive module also includes a pre-drive unit, the output of which is connected to the drive input.

7. The electric motorcycle as described in claim 1, characterized in that, The voltage spike absorption circuit also includes a power diode, the two ends of which are connected to the source and drain of the NMOS transistor, respectively.

8. The electric motorcycle as described in claim 1, characterized in that, The output rectifier circuit also includes a current multiplier inductor, one end of which is connected to the first end of the rectifier element.

9. The electric motorcycle as described in claim 8, characterized in that, The output rectifier circuit also includes an output capacitor, the first end of which is connected to the other end of the current multiplier inductor, and the second end of which is connected to the second end of the rectifier element.

10. The electric motorcycle as described in claim 1, characterized in that, The electrical system also includes: A high-voltage distributor, the output of which is connected to the DC-DC converter, is used to provide the input voltage; The on-board charger has its output terminal connected to the input terminal of the high-voltage distributor. The input terminal of the on-board charger can be connected to an external charging device. The on-board charger can convert the charging voltage provided by the external charging device into high-voltage direct current and output the high-voltage direct current to the input terminal of the high-voltage distributor.

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