IC card

Abstract

An IC card comprises: a substrate; a first chip, a first induction coil electrically connected with the first chip, a second chip and a second induction coil electrically connected with the second chip arranged on the substrate; wherein a projection of the first induction coil on a first plane is a first closed figure, a projection of the second induction coil on the first plane is a second closed figure, and the second closed figure is located in an internal region of the first closed figure; wherein the first plane is a plane perpendicular to the thickness direction of the substrate. The application provides an IC card with small area and multiple functions.

Description

Technical Field

[0001] This utility model relates to the field of smart card technology, and more particularly to an IC card. Background Technology

[0002] Integrated Circuit (IC) cards, also known as smart cards, microcircuit cards, or microchip cards, are portable data carriers embedded with integrated circuit chips. They are currently the core technology for identity authentication and secure payment. IC cards can be divided into contact IC cards and contactless IC cards.

[0003] Currently, contactless IC cards are widely used in financial payments, public transportation, consumer electronics, and access control systems. Contactless IC cards operate by transmitting data via radio waves when brought close to the reader surface within a certain distance. Specifically, a contactless IC card consists of a chip and an induction coil. The induction coil receives electromagnetic waves of a specific frequency. These electromagnetic waves generate electrical charge through a resonant capacitor, providing the chip with its operating voltage to enable communication between the chip and the reader.

[0004] Currently, a contactless IC card consists of a chip and an induction coil electrically connected to that chip. Because a single contactless IC card contains only one chip, its functionality is very limited. Utility Model Content

[0005] One of the technical objectives of this utility model embodiment is to provide a small-area, multi-functional IC card.

[0006] Specifically, this utility model embodiment provides an IC card, including: a substrate; a first chip disposed on the substrate, a first induction coil electrically connected to the first chip, a second chip, and a second induction coil electrically connected to the second chip; wherein, the projection of the first induction coil on a first plane is a first closed shape, the projection of the second induction coil on the first plane is a second closed shape, and the second closed shape is located in the inner region of the first closed shape; wherein, the first plane is a plane perpendicular to the thickness direction of the substrate.

[0007] Optionally, the area of ​​the first closed figure is denoted as S1, and the area of ​​the second closed figure is denoted as S2, where S1 ≥ 2 × S2.

[0008] Optionally, the center point of the first closed shape overlaps with the center point of the second closed shape.

[0009] Optionally, the projection of the first chip onto the first plane is located in the inner region of the first closed pattern and in the outer region of the second closed pattern.

[0010] Optionally, the projection of the second chip onto the first plane is located within the inner region of the second closed pattern.

[0011] Optionally, the projection of the second chip onto the first plane is located at the center of the second closed pattern.

[0012] Optionally, the first induction coil and the second induction coil are disposed on the same side of the substrate, or the first induction coil and the second induction coil are disposed on different sides of the substrate.

[0013] Optionally, it also includes: a first resonant capacitor and a second resonant capacitor; wherein the first chip is electrically connected to the first induction coil through the first resonant capacitor, and the second chip is electrically connected to the second induction coil through the second resonant capacitor.

[0014] Optionally, the projection of the first resonant capacitor onto the first plane is located in the inner region of the first closed shape and in the outer region of the second closed shape; the projection of the second resonant capacitor onto the first plane is located in the inner region of the second closed shape.

[0015] Optionally, the IC card can be a transportation card or an access control card.

[0016] Optionally, the IC card is an irregularly shaped card.

[0017] Optionally, the substrate is circular, and the diameter of the substrate does not exceed 3 centimeters.

[0018] Optionally, the communication distance of the first chip is shorter than that of the second chip.

[0019] Optionally, the first chip is an ISO14443 chip, and the second chip is an ISO15693 chip.

[0020] Compared with the prior art, the technical solution of this utility model embodiment has the following beneficial effects:

[0021] In the embodiments of this application, the IC card includes: a substrate, a first chip disposed on the substrate, a first induction coil electrically connected to the first chip, a second chip, and a second induction coil electrically connected to the second chip; wherein, the projection of the first induction coil on a first plane is a first closed pattern, the projection of the second induction coil on the first plane is a second closed pattern, and the second closed pattern is located in the inner region of the first closed pattern; wherein, the first plane is a plane perpendicular to the thickness direction of the substrate.

[0022] In the above solution, the IC card includes a first chip and a first induction coil electrically connected to the first chip, as well as a second chip and a second induction coil electrically connected to the second chip. Thus, the IC card integrates multiple chips to achieve various functions, enriching the functionality of the IC card. Furthermore, the projection of the first induction coil onto the first plane is a first closed shape, and the projection of the second induction coil onto the first plane is a second closed shape. Since the second closed shape is located within the inner region of the first closed shape, compared to a solution where the second closed shape is located outside the first closed shape, this embodiment of the invention can effectively reduce the area of ​​the substrate occupied by the first and second induction coils, thereby reducing the area of ​​the IC card.

[0023] Furthermore, in the scheme of this application embodiment, the area of ​​the first closed shape is denoted as S1, and the area of ​​the second closed shape is denoted as S2, where S1 ≥ 2 × S2. This scheme ensures that a certain distance is maintained between the first and second induction coils to reduce interference between the two coils, thereby guaranteeing normal communication between the first and second chips and the card reader.

[0024] Furthermore, in the embodiments of this application, the center point of the first closed shape overlaps with the center point of the second closed shape. This design ensures that each position of the first induction coil maintains a certain distance from the second induction coil, preventing parts of the first and second induction coils from getting too close, thus reducing interference between the two coils and guaranteeing normal communication between the first and second chips and the card reader.

[0025] Furthermore, in the embodiments of this application, the projection of the first chip onto the first plane is located within the inner region of the first closed shape and outside the outer region of the second closed shape. This approach, utilizing the area between the first and second induction coils to house the first chip, helps reduce the area of ​​the IC card. Attached Figure Description

[0026] Figure 1 This is a top view schematic diagram of an IC card according to an embodiment of this utility model;

[0027] Figure 2 yes Figure 1 Side view of the IC card;

[0028] Figure 3 This is a schematic diagram of the projection of the first and second induction coils in an IC card in an embodiment of this application onto a first plane. Detailed Implementation

[0029] To improve the user experience, it is desirable to add new functions to existing contactless IC cards (hereinafter referred to as IC cards). For example, when a card reader (such as the user's mobile phone) is close to the IC card, the IC card can send a pre-configured link to the card reader. After receiving the link from the IC card, the card reader can access the link to achieve functions such as music playback, video playback, image display, and web browsing.

[0030] Currently, the chips on IC cards are typically ISO1443 chips, which refer to chips that conform to the ISO1443 standard. If the above-mentioned new functions are implemented based on the ISO1443 chip, an additional control unit needs to be introduced into the IC chip to manage the above-mentioned new functions and existing functions (such as identity recognition), which will greatly increase the circuit complexity and reduce the security of the IC card.

[0031] In view of this, this application provides an IC card, including: a substrate, a first chip disposed on the substrate, a first induction coil electrically connected to the first chip, a second chip, and a second induction coil electrically connected to the second chip; wherein, the projection of the first induction coil on a first plane is a first closed pattern, the projection of the second induction coil on the first plane is a second closed pattern, and the second closed pattern is located in the inner region of the first closed pattern; wherein, the first plane is a plane perpendicular to the thickness direction of the substrate.

[0032] In the above solution, the IC card includes a first chip and a first induction coil electrically connected to the first chip, as well as a second chip and a second induction coil electrically connected to the second chip. Thus, the IC card integrates multiple chips to achieve various functions, enriching the functionality of the IC card. Furthermore, the projection of the first induction coil onto the first plane is a first closed shape, and the projection of the second induction coil onto the first plane is a second closed shape. Since the second closed shape is located within the inner region of the first closed shape, compared to a solution where the second closed shape is located outside the first closed shape, this embodiment of the invention can effectively reduce the area of ​​the substrate occupied by the first and second induction coils, thereby reducing the area of ​​the IC card.

[0033] It should be noted that the IC card mentioned in this article refers to a contactless IC card.

[0034] The embodiments of this utility model will now be described in detail with reference to the accompanying drawings. The same reference numerals are used to denote the same parts in each drawing. The embodiments are merely illustrative, and of course, partial substitutions or combinations can be made to the structures shown in different embodiments.

[0035] Reference Figure 1 , Figure 1 This is a top view of an IC card according to an embodiment of this application.

[0036] like Figure 1 As shown, the IC card 100 may include a substrate 10, on which a first chip 11, a second chip 12, a first induction coil 13, and a second induction coil 14 may be disposed.

[0037] The substrate 10 can be used to carry the first chip 11, the second chip 12, the first induction coil 13, and the second induction coil 14.

[0038] In one embodiment of this application, the substrate 10 may be a regular shape, such as a circle, ellipse, or rectangle. Alternatively, the substrate 10 may be an irregular shape.

[0039] For example, the IC card 100 in this document can be an irregularly shaped card. An irregularly shaped card, as opposed to the standard size of an IC card, refers to an IC card that differs from the standard size. This standard size can be an international standard size. For example, a standard size could be 85.5mm × 54mm × 0.76mm.

[0040] In one example, the substrate 10 may be circular and have a diameter not exceeding 3 cm.

[0041] It should be noted that this article does not limit the material and process of substrate 10; it can be any existing material and manufacturing process of substrate 10.

[0042] In one embodiment of this application, the first chip 11 and the second chip 12 may be radio frequency identification (RFID) chips.

[0043] For example, the first chip 11 can be an ISO14443 chip. That is, the first chip 11 can be a chip that conforms to the ISO14443 standard.

[0044] For example, the second chip 12 can be an ISO15693 chip. That is, the second chip 12 can be a chip that conforms to the ISO15693 standard.

[0045] It should be noted that the embodiments of this application do not limit the types of the first chip 11 and the second chip 12.

[0046] Furthermore, the first chip 11 is electrically connected to the first induction coil 13, and the second chip 12 is electrically connected to the second induction coil 14. The first induction coil 13 and the second induction coil 14 can be formed by winding wire. For example, the first induction coil 13 and the second induction coil 14 can be formed by winding insulated copper wire. It should be noted that this document does not limit the number of turns of the first induction coil 13 and the second induction coil 14.

[0047] In a specific implementation, the two ends of the first induction coil 13 are electrically connected to the positive and negative pins of the first chip 11, respectively, and the two ends of the second induction coil 14 are electrically connected to the positive and negative pins of the second chip 12, respectively.

[0048] In one embodiment of this application, a first resonant capacitor 15 and a second resonant capacitor 16 are also provided on the substrate 10. The first chip 11 can be electrically connected to the first induction coil 13 through the first resonant capacitor 15, and the second chip 12 can be electrically connected to the second induction coil 14 through the second resonant capacitor 16.

[0049] In another embodiment of this application, the first resonant capacitor may be integrated inside the first chip 11, and the second resonant capacitor may be integrated inside the second chip 12.

[0050] In a specific implementation, the first induction coil 13 and the first resonant capacitor 15 are connected in parallel to form a first LC parallel resonant circuit. Furthermore, the first chip 11 is electrically connected to the first LC parallel resonant circuit. When the first induction coil 13 receives electromagnetic waves emitted by the first card reader, the first chip 11 can obtain electrical energy from the first LC parallel resonant circuit, thereby powering on and operating the first chip 11. For example, the first chip 11 can interact with the first card reader to complete data and security authentication, thereby realizing a transaction.

[0051] Furthermore, the second induction coil 14 and the second resonant capacitor 16 are connected in parallel to form a second LC parallel resonant circuit. The second chip 12 is also electrically connected to the second LC parallel resonant circuit. When the second induction coil 14 receives electromagnetic waves emitted by the second card reader, the second chip 12 can obtain electrical energy from the second LC parallel resonant circuit, thereby powering on and operating the second chip 12. For example, the second chip 12 can interact with the second card reader to complete data and security authentication, thereby enabling functions such as opening web pages, downloading songs, and opening images. The second card reader can be a user device, such as a mobile phone or wearable device.

[0052] The relative positional relationships between the components on the substrate 10 are explained in detail below.

[0053] In one embodiment of this application, the first induction coil 13 and the second induction coil 14 may be located on the same side of the substrate 10.

[0054] Reference Figure 2 , Figure 2 yes Figure 1 Side view of IC Card 100.

[0055] like Figure 2 As shown, in the thickness direction of the substrate 10, the substrate 10 has opposing first surfaces 21 and second surfaces 22. Wherein, Figure 2 In this context, direction D represents the thickness direction of substrate 10.

[0056] Furthermore, the first induction coil 13 and the second induction coil 14 may both be located on the first surface 21 of the substrate 10. Alternatively, the second induction coil 13 and the second induction coil 14 may both be located on the second surface 22 of the substrate 10.

[0057] In another embodiment of this application, the first induction coil 13 and the second induction coil 14 may be located on different surfaces of the substrate 10. For example, the first induction coil 13 may be located on the first surface of the substrate 10, and the second induction coil 14 may be located on the second surface of the substrate 10.

[0058] In a specific implementation, the first chip 11 and the first induction coil 13 can be located on the same side of the substrate 10, and the second chip 12 and the second induction coil 13 can be located on the same side of the substrate 10.

[0059] In this document, the projection of the first induction coil 13 onto the first plane is denoted as the first closed shape, and the projection of the second induction coil 14 onto the first plane is denoted as the second closed shape. The first plane refers to a plane perpendicular to the thickness direction of the substrate 10. For example, the first plane can be either the first surface or the second surface mentioned above, but is not limited thereto. The first plane can be parallel to either the first surface or the second surface.

[0060] For example, the first closed shape can be a circle, an ellipse, a square, etc.

[0061] For example, the second closed shape can be a circle, an ellipse, a square, etc.

[0062] It should be noted that the embodiments of this application do not limit the shape of the first closed shape and the second closed shape. The first closed shape and the second closed shape can be regular shapes, such as pentagrams, rectangles, sectors, etc., or they can be irregular shapes.

[0063] It should also be noted that the first closed figure and the second closed figure can be the same, or the first closed figure and the second closed figure can be different.

[0064] In the embodiments of this application, the second closed shape is located within the inner region of the first closed shape.

[0065] Reference Figure 3 , Figure 3 This is a schematic diagram of the projection of the first and second induction coils in an IC card according to an embodiment of this application onto a first plane. It should be noted that, compared to... Figure 1 , Figure 3 The number of turns of the induction coil has been omitted.

[0066] like Figure 3 As shown, the second closed pattern 32 is located within the inner region of the first closed pattern 31. Correspondingly, the first closed pattern 31 is located outside the outer region of the second closed pattern 32. In other words, the second closed pattern 32 is surrounded by the first closed pattern 31. The first closed pattern 31 is located within the inner region of the projection of the substrate onto the first plane. That is, the first closed pattern 31 does not extend beyond the projection of the substrate onto the first plane.

[0067] With this approach, the area occupied by the second induction coil on the substrate is a portion of the area occupied by the first induction coil on the substrate, thus minimizing the area occupied by the second induction coil on the substrate. This helps to reduce the size of the substrate, thereby reducing the size of the IC card.

[0068] It should be noted that, Figure 3 The shapes of the first closed figure 31 and the second closed figure 32 in the text are merely examples.

[0069] Furthermore, in one embodiment of this application, the communication distance of the first chip is less than that of the second chip. This approach, by placing the induction coil corresponding to the chip with the shorter communication distance on the periphery, not only ensures normal communication for the chip with the shorter communication distance but also facilitates the miniaturization of the IC card. Specifically, placing the chip with the shorter communication distance on the inside would result in a larger number of turns in the induction coil corresponding to that chip. If a certain distance needs to be maintained between the two induction coils, the area of ​​the substrate needs to be increased, which is detrimental to the miniaturization of the IC card.

[0070] In one embodiment of this application, the area of ​​the first closed pattern 31 can be N times the area of ​​the second closed pattern 32, where N ≥ 2. In other words, the area of ​​the first closed pattern 31 is denoted as S1, and the area of ​​the second closed pattern 32 is denoted as S2, where S1 ≥ 2 × S2. This approach ensures a certain distance between the first induction coil 31 and the second induction coil 32, reducing interference between the two coils and thus guaranteeing normal communication between the first chip, the second chip, and the card reader.

[0071] In one possible implementation, the first closed shape 31 and the second closed shape 32 can be regular shapes, with the center point of the first closed shape 31 overlapping the center point of the second closed shape 32. This design ensures that each position of the first induction coil maintains a certain distance from the second induction coil, preventing parts of the first and second induction coils from getting too close, thus reducing interference between the two coils and guaranteeing normal communication between the first and second chips and the card reader.

[0072] In a specific implementation, the projection of the first chip onto the first plane can be located within the inner region of the first closed pattern 31. That is, the first chip can be located inside the first induction coil. Alternatively, the projection of the first chip onto the first plane can be located outside the outer region of the first closed pattern 31. That is, the first chip can be located outside the first induction coil.

[0073] For example, the projection of the first chip onto the first plane can be located in the inner region of the first closed pattern 31, and the projection of the first chip onto the first plane can be located in the outer region of the second closed pattern 32. This approach, utilizing the area between the first and second induction coils to house the first chip, helps reduce the area of ​​the IC card.

[0074] Furthermore, the projection of the first resonant capacitor onto the first plane can be located in the inner region of the first closed pattern 31, or the projection of the first resonant capacitor onto the first plane can be located in the outer region of the first closed pattern 31.

[0075] For example, the projection of the first resonant capacitor on the first plane can be located in the inner region of the first closed pattern 31, and the projection of the first resonant capacitor on the first plane can be located in the outer region of the second closed pattern 32.

[0076] Furthermore, the projection of the second chip onto the first plane can be located within the inner region of the second closed pattern 32. That is, the second chip can be located inside the second induction coil. Alternatively, the projection of the second chip onto the first plane can be located outside the second closed pattern 32 and inside the first closed pattern 31. That is, the second chip can be located in the region between the first and second induction coils.

[0077] In one embodiment of this application, the IC card may further include a third chip and a third induction coil, wherein the third chip and the third induction coil are electrically connected. Further, the projection of the third induction coil onto the first plane is a third closed pattern, which may be located within the inner region of the second closed pattern. That is, the second closed pattern may include the third closed pattern. The communication distance of the third chip may be greater than the communication distance of the second chip. Further, the third chip may be located within the inner region of the second closed pattern and outside the outer region of the third closed pattern.

[0078] Therefore, the IC card in this application embodiment can include multiple chips. By adjusting the relative positions of the induction coils electrically connected to each of the chips, interference between the multiple chips is minimized to ensure normal communication between them, while also reducing the area occupied by the multiple induction coils. Thus, this application embodiment provides a multifunctional and small-area IC card.

[0079] In this embodiment, the IC card can be a transportation card, access control card, bank card, or electronic consumption card, etc. In a specific implementation, the IC card may also include an encapsulation layer, which can encapsulate the substrate, multiple chips, and the induction coils electrically connected to each chip.

[0080] It should be understood that the term "and / or" in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article indicates that the preceding and following related objects have an "or" relationship.

[0081] In the embodiments of this application, "multiple" refers to two or more.

[0082] The descriptions of "first," "second," etc., appearing in the embodiments of this application are for illustrative purposes and to distinguish the objects being described. They have no order and do not indicate any special limitation on the number of devices in the embodiments of this application, nor do they constitute any limitation on the embodiments of this application.

[0083] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the present invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. An IC card, characterized in that, include: substrate; A first chip, a first induction coil electrically connected to the first chip, a second chip, and a second induction coil electrically connected to the second chip are disposed on the substrate; Wherein, the projection of the first induction coil onto the first plane is a first closed shape, the projection of the second induction coil onto the first plane is a second closed shape, and the second closed shape is located in the inner region of the first closed shape; The first plane is a plane perpendicular to the thickness direction of the substrate.

2. The IC card according to claim 1, characterized in that, The area of ​​the first closed figure is denoted as S1, and the area of ​​the second closed figure is denoted as S2, where S1 ≥ 2 × S2.

3. The IC card according to claim 2, characterized in that, The center point of the first closed figure overlaps with the center point of the second closed figure.

4. The IC card according to claim 1, characterized in that, The projection of the first chip onto the first plane is located in the inner region of the first closed pattern and in the outer region of the second closed pattern.

5. The IC card according to claim 1, characterized in that, The projection of the second chip onto the first plane is located within the inner region of the second closed pattern.

6. The IC card according to claim 5, characterized in that, The projection of the second chip onto the first plane is located at the center of the second closed pattern.

7. The IC card according to claim 1, characterized in that, The first induction coil and the second induction coil are disposed on the same side of the substrate, or the first induction coil and the second induction coil are disposed on different sides of the substrate.

8. The IC card according to any one of claims 1 to 7, characterized in that, Also includes: First resonant capacitor and second resonant capacitor; The first chip is electrically connected to the first induction coil via the first resonant capacitor, and the second chip is electrically connected to the second induction coil via the second resonant capacitor.

9. The IC card according to claim 8, characterized in that, The projection of the first resonant capacitor onto the first plane is located in the inner region of the first closed shape and in the outer region of the second closed shape; The projection of the second resonant capacitor onto the first plane is located in the inner region of the second closed pattern.

10. The IC card according to claim 1, characterized in that, The IC card is either a transportation card or an access control card.

11. The IC card according to claim 1, characterized in that, The IC card is an irregularly shaped card.

12. The IC card according to claim 1, characterized in that, The substrate is circular and its diameter does not exceed 3 centimeters.

13. The IC card according to claim 1, characterized in that, The communication distance of the first chip is less than that of the second chip.

14. The IC card according to claim 13, characterized in that, The first chip is an ISO14443 chip, and the second chip is an ISO15693 chip.

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