A reverse-filling blocking circuit and electronic device
Patent Information
- Application Number
- CN202522390689.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-11
- Publication Date
- 2026-10-13
- Estimated Expiration
- 2035-11-11
AI Technical Summary
[0005]为了克服现有技术的不足,本申请提供了一种倒灌阻隔电路及电子设备,通过构建一套针对电力传输方向的动态监测与控制机制,防止了反向电流对电路造成的负荷异常,解决了现有双向快充系统中因倒灌导致的续航降低、设备寿命缩短及安全隐患等问题
[0016]本申请的工作原理为:供电模块与受电模块的输出端分别连接至倒灌识别模块的两个输入端,使该模块能够实时采集供电端电压与受电端电压,并通过对两者的比较得到电压比较结果。基于这一结果,倒灌识别模块向倒灌阻隔模块输出相应的阻隔控制信号,而倒灌阻隔模块则根据该信号调整其连接的供电模块与受电模块之间的通路状态。
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Figure CN224852087U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of fast charging, and more particularly to a backflow blocking circuit and electronic device. Background Technology
[0002] With the rapid development of mobile internet technology and the widespread adoption of smart terminal devices, fast charging technology has become a key element in enhancing user experience and is widely used in smartphones, tablets, laptops, and various wearable devices. To meet the power supply needs of various scenarios, modern fast charging systems often adopt a bidirectional power transmission design, allowing devices to flexibly switch between power supply and power receiving roles in different scenarios. For example, charging, discharging, or power sharing between devices can be achieved through the same interface. This design greatly improves the convenience and flexibility of device use.
[0003] Currently, mainstream fast-charging power supply lines generally adopt interface standards that support bidirectional power transmission (such as the Type-C interface). Their circuit structure usually does not have a strict power transmission direction locking mechanism, meaning that both ends of the line can be used as power input or output ports. However, in practical applications, if the power supply device and the power receiving device (such as smartphones or laptops with built-in batteries) are connected through such a line, the power receiving device often has a certain output capability due to its built-in battery or energy storage module. When the output voltage of the power receiving device is higher than the supply voltage of the discharging device, the current will flow back from the power receiving device to the discharging device.
[0004] This backflow phenomenon not only causes the electrical energy stored in the receiving equipment to be lost for no reason, reducing its endurance, but may also cause abnormal load on the internal circuit of the equipment due to continuous reverse current, affecting its service life and even causing safety hazards. Utility Model Content
[0005] To overcome the shortcomings of the prior art, this application provides a backflow blocking circuit and electronic device. By constructing a dynamic monitoring and control mechanism for the power transmission direction, it prevents the abnormal load caused by reverse current on the circuit and solves the problems of reduced battery life, shortened equipment life and safety hazards caused by backflow in the existing bidirectional fast charging system.
[0006] The technical solution adopted by this application to solve its technical problem is: In a first aspect, this application provides a backflow blocking circuit, including: a power supply module, a backflow identification module, a backflow blocking module, and a power receiving module; The output terminal of the power supply module is connected to the first input terminal of the backflow identification module for collecting the power supply voltage. The output terminal of the power receiving module is connected to the second input terminal of the backflow identification module for collecting the power receiving voltage. A voltage comparison result is obtained based on the power supply voltage and the power receiving voltage. The output terminal of the backflow identification module is connected to the first input terminal of the backflow blocking module, and is used to provide the backflow blocking module with a blocking control signal corresponding to the voltage comparison result; The second input terminal of the backflow blocking module is connected to the output terminal of the power supply module, and the output terminal of the backflow blocking module is connected to the input terminal of the power receiving module, for adjusting the power supply connection and disconnection between the power supply module and the power receiving module according to the blocking control signal.
[0007] Optionally, the backflow identification module includes an identification chip of model HUSB251; The VIN terminal of the identification chip is connected to the output terminal of the power supply module; The GPIO7 pin of the identification chip is connected to the first input pin of the backflow blocking module; The GPIO2 pin of the identification chip is connected to the output pin of the power receiving module.
[0008] Optionally, the power supply module includes a power supply device and a power supply interface; The power supply device is connected to the VIN terminal of the identification chip through the power supply terminal of the power supply interface; The connection point between the power supply interface and the identification chip is connected to the second input terminal of the backflow prevention module.
[0009] Optionally, the backflow prevention module includes a first logic unit, a second logic unit, and a third logic unit; The first terminal of the first logic unit is connected to the GPIO7 terminal of the identification chip, the second terminal of the first logic unit is grounded, and the third terminal of the first logic unit is connected to the first terminal of the second logic unit and the first terminal of the third logic unit. The second terminal of the second logic unit is connected to the output terminal of the power supply module, the third terminal of the second logic unit is connected to the second terminal of the third logic unit, and the third logic unit is connected to the input terminal of the power receiving module.
[0010] Optionally, the first logic unit includes a transistor; The base of the transistor is connected to the GPIO7 terminal of the identification chip, the emitter of the transistor is grounded, and the collector of the transistor is connected to the first terminal of the second logic unit and the first terminal of the third logic unit.
[0011] Optionally, the second logic unit includes a first MOS transistor; The gate of the first MOS transistor is connected to the collector of the transistor; The source of the first MOS transistor is connected to the output terminal of the power supply module, and the drain of the first MOS transistor is connected to the second terminal of the third logic unit.
[0012] Optionally, the third logic unit includes a second MOS transistor; The gate of the second MOS transistor is connected to the collector of the transistor; The drain of the second MOSFET is connected to the drain of the first MOSFET, and the source of the second MOSFET is connected to the input terminal of the power receiving module.
[0013] Optionally, the backflow prevention module further includes a voltage stabilizing unit; The first terminal of the voltage regulator unit is connected to the first terminal of the second logic unit and the first terminal of the third logic unit; The second terminal of the voltage regulator unit is connected to the third terminal of the second logic unit and the second terminal of the third logic unit.
[0014] Optionally, the voltage regulating unit includes a Zener diode; The positive terminal of the Zener diode is connected to the gate of the first MOSFET and the gate of the second MOSFET. The negative terminal of the Zener diode is connected to the drain of the first MOSFET and the drain of the second MOSFET.
[0015] Secondly, this application provides an electronic device equipped with the aforementioned backflow blocking circuit.
[0016] The working principle of this application is as follows: the output terminals of the power supply module and the power receiving module are respectively connected to the two input terminals of the backflow identification module, enabling the module to collect the voltage at the power supply end and the voltage at the power receiving end in real time, and obtain the voltage comparison result by comparing the two. Based on this result, the backflow identification module outputs a corresponding blocking control signal to the backflow blocking module, and the backflow blocking module adjusts the path state between its connected power supply module and power receiving module according to the signal.
[0017] When the output voltage of the receiving module is higher than the supply voltage of the power supply module due to its own energy storage characteristics (such as built-in battery), the backflow detection module will identify this abnormal voltage relationship and send a control signal to the backflow blocking module to cut off the path. At this time, the backflow blocking module disconnects the connection between the power supply module and the receiving module, preventing the current from flowing in reverse from the receiving end to the supply end.
[0018] Based on the above working principle, the beneficial effects of this application are: by actively identifying the risk of voltage reversal and cutting off the reverse path in time, it prevents the abnormal load caused by reverse current on the circuit, effectively solves the problems of reduced battery life, shortened equipment life and safety hazards caused by reverse current in the existing bidirectional fast charging system, and improves the reliability and stability of system operation. Attached Figure Description
[0019] Figure 1 This is a module connection diagram of the backflow blocking circuit provided in the embodiments of this application; Figure 2 This is a circuit diagram of the backflow blocking circuit provided in the embodiments of this application.
[0020] Figure label: J1, power supply interface; U1, identification chip; Q3, transistor; Q1, first MOSFET; Q2, second MOSFET; ZD1, Zener diode. Detailed Implementation
[0021] The present application will be further described below with reference to the accompanying drawings and embodiments.
[0022] The following will clearly and completely describe the concept, specific structure, and resulting technical effects of this application in conjunction with embodiments and accompanying drawings, so as to fully understand the purpose, features, and effects of this application. Obviously, the described embodiments are only a part of the embodiments of this application, not all of them. Other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are all within the scope of protection of this application. Furthermore, all connections / linkages involved in the patent do not simply refer to direct contact between components, but rather to the ability to form a better connection structure by adding or reducing connecting accessories according to specific implementation conditions. The various technical features in this application can be combined interactively without contradicting each other.
[0023] Reference Figure 1 , Figure 1 This is a module connection diagram of the backflow prevention circuit provided in the embodiments of this application. The diagram shows several key modules involved in the circuit provided in this application that can intelligently identify backflow and adaptively perform backflow prevention, including: a power supply module, a backflow identification module, a backflow prevention module, and a power receiving module. These are described in detail below: The output terminal of the power supply module is connected to the first input terminal of the backflow identification module for collecting the power supply voltage. The output terminal of the power receiving module is connected to the second input terminal of the backflow identification module for collecting the power receiving voltage. A voltage comparison result is obtained based on the power supply voltage and the power receiving voltage.
[0024] Among them, the power supply module refers to the equipment or circuit part that provides electrical energy, and its output terminal is used to output voltage to the outside; the reverse current identification module is a circuit module used to detect and identify whether there is reverse current flow, and it has a first input terminal and a second input terminal, which can process the input voltage signal; the power receiving module refers to the equipment or circuit part that receives electrical energy, and its output terminal can reflect the voltage status of the power receiving terminal.
[0025] Specifically, the output of the power supply module is connected to the first input of the backflow detection module, allowing the backflow detection module to acquire the power supply voltage through the first input. Simultaneously, the output of the power receiving module is connected to the second input of the backflow detection module, enabling the backflow detection module to acquire the power receiving voltage through the second input. The backflow detection module internally compares and analyzes the acquired power supply and power receiving voltages to determine their relative magnitudes. This direct comparison provides crucial information for determining the presence of backflow, ensuring the circuit responds promptly to voltage changes and preventing reverse current flow caused by voltage anomalies.
[0026] The output terminal of the backflow identification module is connected to the first input terminal of the backflow blocking module, and is used to provide the backflow blocking module with a blocking control signal corresponding to the voltage comparison result; Among them, the backflow blocking module is an execution module used to control the on / off of the power supply path. It realizes the conduction or disconnection of the circuit by receiving control signals. The blocking control signal is a command signal generated by the backflow identification module based on the voltage comparison result, which is used to control the working state of the backflow blocking module.
[0027] The second input terminal of the backflow blocking module is connected to the output terminal of the power supply module, and the output terminal of the backflow blocking module is connected to the input terminal of the power receiving module, for adjusting the power supply connection and disconnection between the power supply module and the power receiving module according to the blocking control signal.
[0028] Specifically, after comparing the voltage at the power supply end and the voltage at the power receiving end, the backflow identification module converts the voltage comparison result into a corresponding blocking control signal and transmits it to the first input terminal of the backflow blocking module through its output terminal. Simultaneously, the second input terminal of the backflow blocking module is connected to the output terminal of the power supply module to obtain the power supply voltage, and its output terminal is directly connected to the input terminal of the power receiving module.
[0029] When the backflow detection module determines that the voltage at the power supply end is higher than the voltage at the power receiving end (no risk of backflow), it will output a blocking control signal (such as a high level) to allow conduction, causing the internal switching device of the backflow blocking module to conduct, and the power supply voltage will be transmitted to the power receiving module through this module; if it determines that the voltage at the power supply end is lower than the voltage at the power receiving end (risk of backflow exists), it will output a blocking control signal (such as a low level) to cut off the path, causing the internal switching device of the backflow blocking module to disconnect, preventing the voltage at the power receiving end from flowing back into the power supply module.
[0030] Furthermore, in this application embodiment, based on the above-mentioned key modules, a circuit principle diagram of each key module in a specific embodiment is provided, referring to... Figure 2 , Figure 2This is a circuit diagram of the backflow blocking circuit provided in the embodiments of this application. The following is a detailed explanation. Figure 2 Please provide a detailed explanation: Regarding the backflow identification module: The backflow identification module includes an identification chip U1 with model number HUSB251; The VIN terminal of the identification chip U1 is connected to the output terminal of the power supply module; The GPIO7 terminal of the identification chip U1 is connected to the first input terminal of the backflow blocking module; The GPIO2 pin of the identification chip U1 is connected to the output pin of the power receiving module.
[0031] The identification chip U1 is the core component of the reverse-current identification module, responsible for voltage acquisition, comparison, and control signal output. The specific model here is HUSB251. The VIN terminal is the power input terminal of the identification chip U1, used to receive the external power supply voltage; the GPIO7 terminal (General-Purpose Input / Output 7) is the control signal output terminal of the identification chip U1, used to send control commands to external circuits; and the GPIO2 terminal (General-Purpose Input / Output 2) is the voltage detection input terminal of the identification chip U1, used to acquire voltage signals from external circuits.
[0032] Specifically, the core of the backflow detection module is the HUSB251 identification chip U1. Its VIN terminal is connected to the output terminal of the power supply module, receiving the power supply voltage to start the chip. Simultaneously, the chip's GPIO2 terminal is connected to the output terminal of the powered module, acquiring the voltage (i.e., VBUS voltage) of the powered end in real time, while the GPIO7 terminal is connected to the first input terminal of the backflow blocking module for outputting control signals. When the power supply module is connected, the VIN terminal receives the power supply voltage to start the HUSB251. The chip detects the voltage of the powered end through the GPIO2 terminal and compares it with the power supply voltage at the VIN terminal: if the voltage of the powered end is lower than the power supply voltage, the GPIO7 terminal outputs a high-level control signal, triggering the backflow blocking module to conduct the power supply path; if the voltage of the powered end is higher than the power supply voltage, it is determined that there is a risk of backflow, and the GPIO7 terminal outputs a low-level control signal, causing the backflow blocking module to cut off the path and prevent voltage reverse flow.
[0033] Regarding the power supply module: The power supply module includes a power supply device and a power supply interface J1; The power supply device is connected to the VIN terminal of the identification chip U1 through the power supply terminal of the power supply interface J1; The connection point between the power supply interface J1 and the identification chip U1 is connected to the second input terminal of the backflow prevention module.
[0034] Specifically, the power supply device of the power supply module is directly connected to the VIN terminal of the identification chip U1 through the power supply terminal of the power supply interface J1, providing the operating voltage to the identification chip U1. At the same time, the connection node between the power supply interface J1 and the VIN terminal of the identification chip U1 also has a line leading out to the second input terminal of the backflow blocking module, enabling the backflow blocking module to obtain the voltage signal from the power supply terminal in real time.
[0035] Regarding the backflow prevention module: The backflow prevention module includes a first logic unit, a second logic unit, and a third logic unit; The first end of the first logic unit is connected to the GPIO7 terminal of the identification chip U1, the second end of the first logic unit is grounded, and the third end of the first logic unit is connected to the first end of the second logic unit and the first end of the third logic unit. The second terminal of the second logic unit is connected to the output terminal of the power supply module, the third terminal of the second logic unit is connected to the second terminal of the third logic unit, and the third logic unit is connected to the input terminal of the power receiving module.
[0036] Specifically, the first logic unit of the backflow prevention module receives the control signal from the identification chip U1GPIO7 at its first terminal, forms a loop by grounding its second terminal, and connects to the first terminals of both the second and third logic units at its third terminal, transmitting the control signal to the subsequent unit. The second terminal of the second logic unit is connected to the voltage output from the power supply module, and its third terminal is connected to the second terminal of the third logic unit, jointly regulating the conduction state of the third logic unit. The third logic unit is directly connected to the input terminal of the powered module, ultimately controlling whether the power supply voltage is transmitted to the powered module.
[0037] When the identification chip U1 determines that there is no risk of backflow, the GPIO7 pin outputs a high level, the first logic unit is turned on, and a signal is transmitted to the subsequent stage through the third pin, causing the second logic unit to turn on and establish a sufficient voltage difference, thereby driving the third logic unit to turn on, and the supply voltage flows into the powered module through the third logic unit; if there is a risk of backflow, the GPIO7 pin outputs a low level, the first logic unit is turned off, and the second and third logic units then cut off the path to prevent the voltage at the powered end from flowing back into the power supply module.
[0038] More specifically, the first logic unit includes a transistor Q3; the second logic unit includes a first MOSFET Q1; and the third logic unit includes a second MOSFET Q2. The base of transistor Q3 is connected to the GPIO7 terminal of the identification chip U1, the emitter of transistor Q3 is grounded, and the collector of transistor Q3 is connected to the first terminal of the second logic unit and the first terminal of the third logic unit.
[0039] The gate of the first MOS transistor Q1 is connected to the collector of the transistor Q3; The source of the first MOSFET Q1 is connected to the output terminal of the power supply module, and the drain of the first MOSFET Q1 is connected to the second terminal of the third logic unit.
[0040] The gate of the second MOS transistor Q2 is connected to the collector of the transistor Q3; The drain of the second MOSFET Q2 is connected to the drain of the first MOSFET Q1, and the source of the second MOSFET Q2 is connected to the input terminal of the power receiving module.
[0041] Specifically, the base of transistor Q3 in the first logic unit receives the control signal from the GPIO7 terminal of the identification chip U1, its emitter is grounded, and its collector is connected to the gates of both the first MOSFET Q1 and the second MOSFET Q2. When the identification chip U1 determines that there is no risk of backflow, the GPIO7 terminal outputs a high level, transistor Q3 is turned on, and its collector outputs a voltage signal to the gates of the two MOSFETs: the source of the first MOSFET Q1 is connected to the output terminal of the power supply module, and its gate is turned on after receiving the voltage, allowing the supply voltage to be transmitted to the drain of the second MOSFET Q2 through its drain; the gate of the second MOSFET Q2 simultaneously receives the voltage signal, and its source is connected to the input terminal of the power receiving module. At this time, the source and drain are connected, and the supply voltage flows into the power receiving module through the second MOSFET Q2.
[0042] If there is a risk of backflow, the GPIO7 output will be low, the transistor Q3 will be cut off, there will be no voltage output at the collector, the gates of the two MOSFETs will lose the drive signal and turn off, cutting off the power supply path and preventing the voltage at the receiving end from flowing back into the power supply module.
[0043] Furthermore, the backflow prevention module also includes a voltage stabilizing unit; The first terminal of the voltage regulator unit is connected to the first terminal of the second logic unit and the first terminal of the third logic unit; The second terminal of the voltage regulator unit is connected to the third terminal of the second logic unit and the second terminal of the third logic unit.
[0044] The voltage regulator unit is a functional module used to stabilize the voltage of specific nodes in the circuit. Its core component is the Zener diode ZD1, which can maintain a basically constant voltage across its terminals in the reverse breakdown state, thus playing a voltage limiting protection role.
[0045] Specifically, the voltage regulator unit of the reverse-current blocking module connects the first terminal to the first terminal (i.e., the gates of the two MOSFETs) of the second logic unit (first MOSFET Q1) and the third logic unit (second MOSFET Q2), and the second terminal to the third terminal (drain of the first MOSFET Q1) and the second terminal (drain of the second MOSFET Q2) of the third logic unit. Specifically, the positive terminal of Zener diode ZD1 is connected to the gates of the two MOSFETs, and the negative terminal is connected to the drains of the two MOSFETs. When transistor Q3 is turned on and outputs a drive voltage to the MOSFET gates, if the gate voltage rises abnormally due to power supply fluctuations or interference, Zener diode ZD1 will reverse-break down and clamp the voltage between the gate and drain at its regulated value (e.g., 15V) to prevent the gate voltage from exceeding the rated withstand voltage of the MOSFET. If the gate voltage is normal, Zener diode ZD1 is in the off state and does not affect the normal operation of the circuit.
[0046] Secondly, this application provides an electronic device equipped with the aforementioned backflow blocking circuit.
[0047] The above is a detailed description of the preferred embodiments of this application. However, the invention of this application is not limited to the embodiments described. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of this application. All such equivalent modifications or substitutions are included within the scope defined by the claims of this application.
Claims
1. A backflow blocking circuit, characterized in that, include: Power supply module, backflow identification module, backflow blocking module, and power receiving module; The output terminal of the power supply module is connected to the first input terminal of the backflow identification module for collecting the power supply voltage. The output terminal of the power receiving module is connected to the second input terminal of the backflow identification module for collecting the power receiving voltage. A voltage comparison result is obtained based on the power supply voltage and the power receiving voltage. The output terminal of the backflow identification module is connected to the first input terminal of the backflow blocking module, and is used to provide the backflow blocking module with a blocking control signal corresponding to the voltage comparison result; The second input terminal of the backflow blocking module is connected to the output terminal of the power supply module, and the output terminal of the backflow blocking module is connected to the input terminal of the power receiving module, for adjusting the power supply connection and disconnection between the power supply module and the power receiving module according to the blocking control signal.
2. The backflow blocking circuit according to claim 1, characterized in that, The backflow identification module includes an identification chip of model HUSB251; The VIN terminal of the identification chip is connected to the output terminal of the power supply module; The GPIO7 pin of the identification chip is connected to the first input pin of the backflow blocking module; The GPIO2 pin of the identification chip is connected to the output pin of the power receiving module.
3. The backflow blocking circuit according to claim 2, characterized in that, The power supply module includes power supply equipment and power supply interface; The power supply device is connected to the VIN terminal of the identification chip through the power supply terminal of the power supply interface; The connection point between the power supply interface and the identification chip is connected to the second input terminal of the backflow prevention module.
4. The backflow blocking circuit according to claim 2, characterized in that, The backflow prevention module includes a first logic unit, a second logic unit, and a third logic unit; The first terminal of the first logic unit is connected to the GPIO7 terminal of the identification chip, the second terminal of the first logic unit is grounded, and the third terminal of the first logic unit is connected to the first terminal of the second logic unit and the first terminal of the third logic unit. The second terminal of the second logic unit is connected to the output terminal of the power supply module, the third terminal of the second logic unit is connected to the second terminal of the third logic unit, and the third logic unit is connected to the input terminal of the power receiving module.
5. The backflow blocking circuit according to claim 4, characterized in that, The first logic unit includes a transistor; The base of the transistor is connected to the GPIO7 terminal of the identification chip, the emitter of the transistor is grounded, and the collector of the transistor is connected to the first terminal of the second logic unit and the first terminal of the third logic unit.
6. The backflow blocking circuit according to claim 5, characterized in that, The second logic unit includes a first MOS transistor; The gate of the first MOS transistor is connected to the collector of the transistor; The source of the first MOS transistor is connected to the output terminal of the power supply module, and the drain of the first MOS transistor is connected to the second terminal of the third logic unit.
7. The backflow blocking circuit according to claim 6, characterized in that, The third logic unit includes a second MOS transistor; The gate of the second MOS transistor is connected to the collector of the transistor; The drain of the second MOSFET is connected to the drain of the first MOSFET, and the source of the second MOSFET is connected to the input terminal of the power receiving module.
8. The backflow blocking circuit according to claim 7, characterized in that, The backflow prevention module also includes a voltage stabilizing unit; The first terminal of the voltage regulator unit is connected to the first terminal of the second logic unit and the first terminal of the third logic unit; The second terminal of the voltage regulator unit is connected to the third terminal of the second logic unit and the second terminal of the third logic unit.
9. The backflow blocking circuit according to claim 8, characterized in that, The voltage stabilizing unit includes a voltage regulator diode; The positive terminal of the Zener diode is connected to the gate of the first MOSFET and the gate of the second MOSFET. The negative terminal of the Zener diode is connected to the drain of the first MOSFET and the drain of the second MOSFET.
10. An electronic device, characterized in that, It is equipped with a backflow blocking circuit as described in any one of claims 1-9.