Bus control circuit, inverter and parallel system

Abstract

The embodiment of the present application provides a bus control circuit, an inverter and a parallel system, the circuit comprises a bus and at least one single-machine module mounted on the bus; wherein, a switching module is arranged between the interface of each single-machine module and the bus; when any single-machine module is abnormal, the switching module corresponding to the single-machine module is closed to disconnect the connection between the interface of the single-machine module and the bus. According to the scheme, the single-machine modules can be connected in parallel through the bus, when a single-machine module is abnormal, the switching module corresponding to the single-machine module is closed to cut off the connection between the interface of the single-machine module and the bus, the influence of the impedance abnormality of the abnormal single-machine module on the bus voltage can be reduced, and the reliability of bus signal transmission is improved.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, and in particular to a bus control circuit, an inverter, and a parallel system. Background Technology

[0002] Power electronic devices, such as inverters or converters, can be used to convert different forms of electrical energy. Inverters convert direct current (DC) to alternating current (AC), while converters can regulate the frequency, phase, or voltage of AC power. In scenarios requiring higher power or redundancy, individual units are typically connected via a bus to enable parallel operation of multiple inverters / converters.

[0003] In related solutions, when any single component fails, the interface built with discrete components within that component often exhibits impedance abnormalities, affecting the bus voltage and further leading to abnormal system synchronization control. Therefore, the current challenge is to improve the reliability of bus signal transmission. Utility Model Content

[0004] This application provides a bus control circuit, an inverter, and a parallel system to improve the reliability of bus signal transmission.

[0005] On one hand, this application provides a bus control circuit, including: a bus and at least one stand-alone module mounted on the bus; wherein, a switching module is provided between the interface of each stand-alone module and the bus; wherein, when any stand-alone module malfunctions, the switching module corresponding to that stand-alone module is shut down to disconnect the connection between the interface of the stand-alone module and the bus.

[0006] In one possible implementation, the switching module includes: a relay, a first switching transistor, and a first switching power supply; one end of the relay's contact is connected to the interface of the corresponding stand-alone module, and the other end of the contact is connected to the bus; one end of the relay's coil is connected to the first switching power supply, and the other end is connected to the first end of the first switching transistor; the second end of the first switching transistor is grounded; wherein, when the stand-alone module is normal, the first switching transistor controls the relay's contacts to be turned on; when the stand-alone module is abnormal, the first switching transistor controls the relay's contacts to be turned off.

[0007] In one possible implementation, the switching module further includes: a first resistor and a second resistor; one end of the first resistor is connected to the control terminal signal input of the first switching transistor, and the other end is connected to the control terminal of the first switching transistor and one end of the second resistor; the other end of the second resistor is grounded.

[0008] In one possible implementation, the switching module further includes a diode; the anode of the diode is connected to the first terminal of the first switching transistor, and the cathode is connected to the first switching power supply.

[0009] In one possible implementation, each standalone module includes a signal processing unit; wherein the input terminal and the first output terminal of the signal processing unit are both connected to an interface for sending working signals to the bus through the interface, or receiving working signals from the bus through the interface; the second output terminal of the signal processing unit is connected to a corresponding switching module for controlling the corresponding switching module.

[0010] In one possible implementation, the interface includes: a buffer unit, a second switching transistor, and a second switching power supply; the first input terminal of the buffer unit is connected to the output terminal of the signal processing unit, and the first output terminal is connected to the control terminal of the second switching transistor; both the control terminal and the first terminal of the second switching transistor are connected to the second switching power supply, and the second terminal is grounded; the second input terminal of the buffer unit is connected to the first terminal of the second switching transistor, and the first output terminal is connected to the input terminal of the signal processing unit.

[0011] In one possible implementation, the interface module further includes: a third resistor and a fourth resistor; one end of the third resistor is connected to the control terminal of the second switching transistor, and the other end is connected to the first terminal of the second switching transistor and one end of the fourth resistor; the other end of the fourth resistor is connected to the second switching power supply.

[0012] In one possible implementation, the signal processing unit is a digital signal processor.

[0013] On the other hand, this application provides an inverter that includes the single-unit module described above.

[0014] On the other hand, this application provides a parallel system, which includes at least one inverter as described above and a bus control circuit as described above.

[0015] The bus control circuit, inverter, and parallel system provided in this application include a bus and at least one stand-alone module mounted on the bus. Each stand-alone module has a switching module between its interface and the bus. When any stand-alone module malfunctions, the corresponding switching module shuts down, disconnecting the stand-alone module's interface from the bus. In this solution, the stand-alone modules can be connected in parallel via the bus. When a stand-alone module malfunctions, the corresponding switching module shuts down, cutting off the connection between the stand-alone module's interface and the bus. This reduces the impact of impedance abnormalities in malfunctioning stand-alone modules on the bus voltage, thereby improving the reliability of bus signal transmission. Attached Figure Description

[0016] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0017] Figure 1 This is a schematic diagram of the bus control circuit provided in an embodiment of this application;

[0018] Figure 2 This is a schematic diagram of the bus control circuit provided in an embodiment of this application;

[0019] Figure 3 This is a schematic diagram of the bus control circuit provided in an embodiment of this application;

[0020] Figure 4 This is a schematic diagram of the bus control circuit provided in an embodiment of this application;

[0021] Figure 5 This is a schematic diagram of the bus control circuit provided in an embodiment of this application;

[0022] Figure 6 This is a schematic diagram of the bus control circuit provided in an embodiment of this application;

[0023] Figure 7 This is a schematic diagram of the bus control circuit provided in an embodiment of this application.

[0024] Explanation of reference numerals in the attached diagram: Bus 10, Standalone Module 20, Switching Module 30; Interface 21, Signal Processing Unit 22, Buffer Unit 23, Second Switching Transistor 24, Second Switching Power Supply 25, Third Resistor 26, Fourth Resistor 27; Relay 31, First Switching Transistor 32, First Switching Power Supply 33, First Resistor 34, Second Resistor 35, Diode 36.

[0025] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0026] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0027] It should be noted that the brief descriptions of terms in this application are only for the convenience of understanding the embodiments described below, and are not intended to limit the embodiments of this application. Unless otherwise stated, these terms should be understood in their ordinary and common meaning. In addition, the terms "comprising" and "having," and any variations thereof, are intended to be omnipresent but not exclusive. For example, a product or device that comprises a series of components is not necessarily limited to those components that are explicitly listed, but may include other components that are not explicitly listed or that are inherent to such product or device.

[0028] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0029] The following disclosure provides many different embodiments or examples for implementing various structures of this invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of the invention. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, examples of various specific processes and materials are provided in this invention, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0030] Inverters and converters in power electronic equipment are core components for energy conversion. Inverters convert DC power from batteries and photovoltaic panels into standard AC power, applicable to solar power generation, electric vehicle drive, and uninterruptible power supplies (UPS). Converters adjust AC parameters through rectification, inversion, and frequency conversion, such as for wind turbine variable frequency speed control, or to achieve interface conversion in hybrid AC / DC microgrids. In scenarios requiring higher power or redundancy, multiple inverters or converters need to operate in parallel. For example, in new energy power generation systems such as photovoltaic power plants and energy storage systems, multiple inverters need to be connected in parallel to expand capacity; in microgrids or off-grid systems, parallel operation is required to achieve load current sharing and stable power supply; in emergency power systems, parallel operation provides redundancy backup to ensure uninterrupted operation of critical equipment.

[0031] In related solutions, to achieve coordinated operation of multiple inverters or converters, the system typically employs a bus architecture for communication and power synchronization. This primarily involves transmitting synchronization signals via the bus to ensure consistency in the phase and frequency of the output voltage of each unit, preventing circulating currents. Furthermore, the bus can be used to adjust the output current of each unit or to collect real-time parameters such as voltage, current, and temperature. However, during parallel operation, a failure in any single unit can lead to impedance anomalies in the interfaces constructed using discrete components. These anomalies can affect the voltage stability of the bus, consequently causing problems with the synchronization control of the entire system and impacting its normal operation.

[0032] To address the aforementioned technical problems, embodiments of this application provide a bus control circuit, an inverter, and a parallel system. The circuit includes a bus and at least one stand-alone module mounted on the bus. Each stand-alone module has a switching module between its interface and the bus. When any stand-alone module malfunctions, the corresponding switching module shuts down, disconnecting the stand-alone module's interface from the bus. In this solution, the stand-alone modules can be connected in parallel via the bus. When a stand-alone module malfunctions, the corresponding switching module shuts down, cutting off the connection between the stand-alone module's interface and the bus. This reduces the impact of impedance abnormalities in malfunctioning stand-alone modules on the bus voltage, thereby improving the reliability of bus signal transmission.

[0033] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will now be described with reference to the accompanying drawings.

[0034] Figure 1 This is a schematic diagram of the bus control circuit provided in an embodiment of this application. Figure 1 As shown, the bus control circuit includes: a bus 10 and at least one stand-alone module 20 mounted on the bus 10; wherein,

[0035] Each stand-alone module 20 has a switching module 30 between its interface 21 and the bus 10. When any stand-alone module 20 malfunctions, the switching module 30 corresponding to that stand-alone module 20 is shut down to disconnect the connection between the interface 21 of the stand-alone module 20 and the bus 10.

[0036] In some embodiments, the stand-alone module 20 in a power electronic system typically refers to a power unit with independent power conversion capabilities, such as a photovoltaic grid-connected inverter, an energy storage converter, or an uninterruptible power supply module. Such modules include power semiconductor devices, drive circuits, and a local controller, capable of performing DC-AC or AC-DC conversion and adjusting output power in response to external dispatch commands.

[0037] For example, the bus 10 connected to the standalone module 20 can be used to transmit various signals: synchronization control signals such as fundamental synchronization signals, carrier synchronization signals, or phase references required by the phase-locked loop; power scheduling commands such as active / reactive power setpoints issued by the main controller; and status feedback signals such as the output voltage, current, temperature, and fault codes of each standalone module 20. In practical applications, the bus protocol can be selected according to requirements, such as CAN bus or RS485 bus.

[0038] In some embodiments, the switching module 30 may be composed of devices such as relays, solid-state relays, metal-oxide-semiconductor field-effect transistors (MOSFETs), and switching ICs. For example, the switching module 30 may include one or more of the aforementioned devices to control the connection and disconnection between the stand-alone module 20 and the bus 10.

[0039] In some optional embodiments, a diagnostic circuit can be embedded in the standalone module 20 to detect faults such as switch tube shoot-through, DC bus overvoltage, or communication timeout in the standalone module 20. A fault diagnosis unit in the switching module 30 or the standalone module 20 can control the switching module 30 to disconnect when the diagnostic circuit outputs an abnormal signal. In practical applications, the diagnostic circuit and the fault diagnosis unit can be set independently or integrated together; this example does not limit this.

[0040] In some embodiments, the number of stand-alone modules 20 connected to the bus 10 is single. In this case, the core function of the switching module 30 is to isolate the reverse interference of internal circuit faults of the stand-alone module 20 to the bus 10. Specifically, when a power device in the stand-alone module 20 fails or the control power supply is short-circuited, the impedance change of its interface 21 circuit will directly threaten the electrical characteristics of the bus 10. At this time, the switching module 30 can cut off the optocoupler power supply circuit and activate the physical isolation switch to prevent the faulty module from forming a low-impedance path through the bus 10, thus avoiding the abnormal pull-down of the bus 10 voltage.

[0041] In some embodiments, multiple stand-alone modules 20 are mounted on the bus 10, and these modules adopt a master-slave architecture. Specifically, the master continuously broadcasts a synchronization clock signal and power scheduling commands through the bus 10, and each slave adjusts its own output according to the received phase reference. In this configuration, if a slave module fails, its corresponding switching module 30 can be isolated to prevent the fault point from interfering with the communication level of the bus 10. Optionally, when the master fails, the corresponding switching module 30 can be disconnected through a redundancy switching mechanism, and a normally operating slave can be upgraded to a master.

[0042] In some embodiments, there are multiple standby modules 20 connected to the bus 10, and each standby module 20 receives instructions from the main controller through the bus 10. Specifically, if any standby module 20 malfunctions, the switching module 30 corresponding to the malfunctioning standby module 20 can be disconnected to prevent the malfunctioning standby module 20 from affecting the operation of other standby modules 20 or the main controller through the bus 10.

[0043] The bus control circuit provided in this application includes: a bus and at least one standalone module mounted on the bus; wherein, a switching module is provided between the interface of each standalone module and the bus; when any standalone module malfunctions, the corresponding switching module is shut down to disconnect the connection between the standalone module's interface and the bus. In this solution, the standalone modules can be connected in parallel via the bus. When a standalone module malfunctions, the corresponding switching module shuts down, cutting off the connection between the standalone module's interface and the bus. This reduces the impact of impedance abnormalities in malfunctioning standalone modules on the bus voltage, thereby improving the reliability of bus signal transmission.

[0044] Figure 2 This is a schematic diagram of the bus control circuit provided in an embodiment of this application. Figure 2 As shown, the switching module 30 includes: a relay 31, a first switching transistor 32, and a first switching power supply 33;

[0045] One end of the relay 31 is connected to the interface 21 of the corresponding stand-alone module 20, and the other end is connected to the bus 10; one end of the coil of the relay 31 is connected to the first switching power supply 33, and the other end is connected to the first end of the first switching transistor 32; the second end of the first switching transistor 32 is grounded.

[0046] When the stand-alone module 20 is normal, the first switch 32 controls the contacts of the relay 31 to be turned on; when the stand-alone module 20 is abnormal, the first switch 32 controls the contacts of the relay 31 to be turned off.

[0047] In this example, relay 31 acts as an electrical switch to control the connection between standalone module 20 and bus 10. Specifically, the contacts of relay 31 connect standalone module 20 and bus 10. When the coil of relay 31 is energized, the contacts close or open depending on the type of relay 31, thereby connecting or disconnecting the circuit.

[0048] In some embodiments, the first switching transistor 32 can be a MOSFET or a bipolar junction transistor (BJT) to control the on / off state of the relay 31 coil. Specifically, when the first switching transistor 32 is turned on, the relay 31 coil is energized and the contacts actuate; when the first switching transistor 32 is turned off, the coil is de-energized and the contacts reset.

[0049] In this example, the first switching power supply 33 provides the necessary voltage and current to the coil of the relay 31 to drive the operation of the relay 31.

[0050] In some optional embodiments, relay 31 is normally open. When the stand-alone module 20 is functioning normally, the first switching transistor 32 is turned on, the coil of relay 31 is energized, the contacts of relay 31 are closed, and the stand-alone module 20 is connected to the bus 10. When a fault is detected in the stand-alone module 20, the first switching transistor 32 is turned off, the coil of relay 31 is not energized, the contacts of relay 31 remain in the normally open state, and the stand-alone module 20 is disconnected from the bus 10.

[0051] In some optional embodiments, relay 31 is normally closed. When the stand-alone module 20 is functioning normally, the first switch 32 is off, the coil of relay 31 is not energized, the contacts of relay 31 remain in the normally closed state, and the stand-alone module 20 is connected to the bus 10. When a fault is detected in the stand-alone module 20, the first switch 32 is turned on, the coil of relay 31 is energized, the contacts of relay 31 are open, and the stand-alone module 20 is disconnected from the bus 10.

[0052] The scheme in this example isolates the faulty module by controlling the relay contacts to open when a single module malfunctions, thus preventing it from affecting the normal operation of the bus and other modules.

[0053] Figure 3 This is a schematic diagram of the bus control circuit provided in an embodiment of this application. Figure 3 As shown, the switching module 30 also includes: a first resistor 34 and a second resistor 35;

[0054] One end of the first resistor 34 is connected to the control terminal signal input of the first switch transistor 32, and the other end is connected to the control terminal of the first switch transistor 32 and one end of the second resistor 35; the other end of the second resistor 35 is grounded.

[0055] In this example, the first resistor 34 is typically used to limit the current flowing to the control terminal of the first switching transistor 32, thereby protecting the control terminal from damage caused by excessive current. Specifically, the first resistor 34 can reduce damage to the switching transistor caused by unexpected excessive current from the control signal source.

[0056] In practical applications, the resistance value of the first resistor 34 is typically chosen based on the voltage of the control signal source and the required gate or base current. For example, assuming the control signal voltage is V and the required gate current is A, the resistance value can be calculated using Ohm's law as V / A. Alternatively, a standard value, such as 1kΩ, may be chosen in practical applications.

[0057] In this example, the second resistor 35 is typically used as a pull-down resistor. When the control signal is not input or is floating, the voltage at the control terminal of the first switch 32 is pulled down to ground potential, thereby keeping the switch in the off state. Furthermore, the second resistor 35 can reduce false turn-on due to floating voltage. In practical applications, the resistance value of the second resistor 35 needs to be large enough to avoid affecting the normal operation of the circuit when a normal signal is input. At the same time, the resistance value of the second resistor 35 should not be too high to ensure effective voltage reduction when floating. In practical applications, a standard value of 10kΩ to 100kΩ is typically chosen for the second resistor 35, such as 10kΩ.

[0058] The scheme in this example improves the reliability of the system by introducing a current-limiting first resistor and a pull-down second resistor at the control terminal of the first switching transistor, which reduces the risk of damage to the switching transistor from excessive current when the control signal is input and prevents false turn-on when the signal is floating.

[0059] Figure 4 This is a schematic diagram of the bus control circuit provided in an embodiment of this application. Figure 4 As shown, the switching module 30 also includes: a diode 36;

[0060] The anode of diode 36 is connected to the first terminal of the first switching transistor 32, and the cathode is connected to the first switching power supply 33.

[0061] For example, diode 36 can be a rectifier diode or a Schottky diode.

[0062] In this example, when the relay 31 coil is de-energized, the current in the coil decreases rapidly, generating a back electromotive force (EMF) that could damage the first switching transistor 32. Diode 36 provides a loop for this current, preventing damage to the switching transistor from the back EMF. Additionally, diode 36 provides a return path, allowing the current in the coil to flow back through diode 36 when the switching transistor is off, thus avoiding voltage spikes.

[0063] In some embodiments, when the first switching transistor 32 is turned on, current flows from the first switching power supply 33 through the coil of the relay 31, the first switching transistor 32, and to ground, energizing the coil of the relay 31 and actuating its contacts. Specifically, when the first switching transistor 32 is turned off, the current in the coil of the relay 31 does not immediately stop due to its inductive characteristics, but instead forms a loop through the diode 36. The current flows from the coil of the relay 31 to the anode of the diode 36, and then back from the cathode to the first switching power supply 33, forming a closed loop and dissipating the energy in the coil.

[0064] The solution in this example, by incorporating a diode in the switching module, can effectively protect the switching transistor from damage by back electromotive force and improve the overall stability and reliability of the circuit.

[0065] Figure 5 This is a schematic diagram of the bus control circuit provided in an embodiment of this application. Figure 5 As shown, each standalone module 20 includes a signal processing unit 22; wherein,

[0066] The input terminal and the first output terminal of the signal processing unit 22 are both connected to the interface 21, which is used to send working signals to the bus 10 through the interface 21, or to receive working signals from the bus 10 through the interface 21.

[0067] The second output terminal of the signal processing unit 22 is connected to the corresponding switching module 30 and is used to control the corresponding switching module 30.

[0068] For example, the signal processing unit 22 can be integrated into the standalone module 20 in various forms, such as any of the following: microcontroller, digital signal processor, application-specific integrated circuit, or field-programmable gate array. Optionally, if the standalone module 20 is an inverter or converter, the signal processing unit 22 can be an existing signal processing element in the inverter or converter to achieve reuse of the existing signal processing element.

[0069] In some embodiments, when the standalone module 20 is the host in a master-slave architecture, the input terminal of the host's signal processing unit 22 is used to receive operating signals from other slave devices, such as the output voltage, current, temperature, and fault codes of each slave device; the first output terminal of the host's signal processing unit 22 is used to send operating signals, such as fundamental frequency synchronization signals and carrier synchronization signals, to other slave devices. The input terminals and first output terminals of the corresponding signal processing units 22 of the other slave devices can cooperate with the host to send and receive corresponding operating signals.

[0070] It should be noted that the second output terminal of the signal processing unit 22 of each standalone module 20 is used to control the corresponding switching module 30, and to send control signals such as enable signals to control the operation of the switching module 30. For example, when the standalone module 20 malfunctions, the signal processing unit 22 can disconnect the corresponding switching module 30.

[0071] In this example, the signal processing unit of the standalone module can receive and send working signals with the bus, and the operation of the switching module corresponding to the standalone module is also integrated in the signal processing unit, which improves the integration of the circuit.

[0072] Figure 6 This is a schematic diagram of the bus control circuit provided in an embodiment of this application. Figure 6 As shown, interface 21 includes: a buffer unit 23, a second switching transistor 24, and a second switching power supply 25;

[0073] The first input terminal of the buffer unit 23 is connected to the output terminal of the signal processing unit 22, and the first output terminal is connected to the control terminal of the second switching transistor 24.

[0074] Both the control terminal and the first terminal of the second switching transistor 24 are connected to the second switching power supply 25, and the second terminal is grounded.

[0075] The second input terminal of the buffer unit 23 is connected to the first terminal of the second switching transistor 24, and the first output terminal is connected to the input terminal of the signal processing unit 22.

[0076] For example, the main function of buffer unit 23 is to stabilize signal transmission and prevent signal attenuation or distortion. In actual circuits, buffer unit 23 can take the following forms: operational amplifier, logic gate circuit, transistor buffer, etc.

[0077] In some embodiments, when the signal processing unit 22 outputs an enable signal, current flows from the second switching power supply 25 to the control electrode of the second switching transistor 24, driving the second switching transistor 24 into a conducting state. At this time, two paths are formed: the input signal is transmitted to the switching module 30 through the conducting second switching transistor 24, forming a complete signal path; and the bias loop from the power supply to the ground terminal is connected.

[0078] In some embodiments, when the signal processing unit 22 does not output an enable signal, both of the above-mentioned conduction paths are cut off by the high-impedance second switch 24.

[0079] The solution in this example can achieve physical isolation of the signal path through the second switching transistor, and can improve the stability of the transmitted signal through the buffer unit, thereby improving the security and reliability of the interface of the stand-alone module.

[0080] Figure 7 This is a schematic diagram of the bus control circuit provided in an embodiment of this application. Figure 7 As shown, interface 21 also includes: a third resistor 26 and a fourth resistor 27;

[0081] One end of the third resistor 26 is connected to the control terminal of the second switch transistor 24, and the other end is connected to the first terminal of the second switch transistor 24 and one end of the fourth resistor 27.

[0082] The other end of the fourth resistor 27 is connected to the second switching power supply 25.

[0083] For example, the third resistor 26 is connected between the control terminal and the first terminal of the second switch 24, and its core function is to form a discharge circuit between the control terminal and the first terminal. When the enable signal jumps to a low level, the third resistor 26 quickly discharges the base region charge, forcing the second switch 24 to switch from the on state to the off state, realizing the turn-off response, thereby shortening the disconnection delay of the signal transmission path.

[0084] For example, one end of the fourth resistor 27 is connected to the second switching power supply 25, and the other end is connected to the control terminal of the second switching transistor 24. The fourth resistor 27 can establish a base current limiting bias: when the enable signal is high, this resistor and the third resistor 26 form a voltage divider network to precisely control the base injection current, ensure deep saturation conduction of the switching transistor, and limit the base drive current to prevent overload.

[0085] This example solution uses a voltage divider between the third and fourth resistors to precisely control the switching transistor's on / off state, achieving high-speed physical isolation of the signal path with a simple structure.

[0086] As yet another example, in any example of the technology, the signal processing unit 22 is a digital signal processor.

[0087] For example, in practical applications, the signal processing unit 22 can be an existing digital signal processor in the stand-alone module 20 to achieve the reuse of existing components.

[0088] The solution in this example improves signal processing efficiency and the reliability of communication with the bus by leveraging the high-precision real-time computation and hardware-level signal processing capabilities of a digital signal processor.

[0089] The bus control circuit provided in this application includes: a bus and at least one standalone module mounted on the bus; wherein, a switching module is provided between the interface of each standalone module and the bus; when any standalone module malfunctions, the corresponding switching module is shut down to disconnect the connection between the standalone module's interface and the bus. In this solution, the standalone modules can be connected in parallel via the bus. When a standalone module malfunctions, the corresponding switching module shuts down, cutting off the connection between the standalone module's interface and the bus. This reduces the impact of impedance abnormalities in malfunctioning standalone modules on the bus voltage, thereby improving the reliability of bus signal transmission.

[0090] This application also provides an inverter, which includes the single-unit module as described in any of the above embodiments.

[0091] This application also provides a parallel system, which includes at least one inverter as described in any of the above embodiments and a bus control circuit as described in any of the above embodiments.

[0092] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the utility models disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims.

[0093] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.

Claims

1. A bus control circuit, characterized in that, include: A bus and at least one standalone module mounted on the bus; wherein, Each of the stand-alone modules has a switching module between its interface and the bus; wherein, when any stand-alone module malfunctions, the switching module corresponding to that stand-alone module is shut down to disconnect the connection between the stand-alone module's interface and the bus.

2. The circuit according to claim 1, characterized in that, The switching module includes: a relay, a first switching transistor, and a first switching power supply; One end of the relay is connected to the interface of the corresponding stand-alone module, and the other end is connected to the bus; one end of the relay coil is connected to the first switching power supply, and the other end is connected to the first end of the first switching transistor; the second end of the first switching transistor is grounded. When the stand-alone module is functioning normally, the first switching transistor controls the relay contacts to open; when the stand-alone module is malfunctioning, the first switching transistor controls the relay contacts to open.

3. The circuit according to claim 2, characterized in that, The switching module further includes: a first resistor and a second resistor; One end of the first resistor is connected to the control signal input of the first switch, and the other end is connected to the control terminal of the first switch and one end of the second resistor; the other end of the second resistor is grounded.

4. The circuit according to claim 2, characterized in that, The switching module also includes: a diode; The anode of the diode is connected to the first terminal of the first switching transistor, and the cathode is connected to the first switching power supply.

5. The circuit according to claim 1, characterized in that, Each of the single-unit modules includes a signal processing unit; wherein... The input terminal and the first output terminal of the signal processing unit are both connected to the interface, and are used to send working signals to the bus through the interface, or to receive working signals from the bus through the interface. The second output terminal of the signal processing unit is connected to the corresponding switching module and is used to control the corresponding switching module.

6. The circuit according to claim 5, characterized in that, The interface includes: a buffer unit, a second switching transistor, and a second switching power supply; The first input terminal of the buffer unit is connected to the output terminal of the signal processing unit, and the first output terminal is connected to the control terminal of the second switching transistor. The control terminal and the first terminal of the second switching transistor are both connected to the second switching power supply, and the second terminal is grounded; The second input terminal of the buffer unit is connected to the first terminal of the second switching transistor, and the first output terminal is connected to the input terminal of the signal processing unit.

7. The circuit according to claim 6, characterized in that, The interface module further includes: a third resistor and a fourth resistor; One end of the third resistor is connected to the control terminal of the second switching transistor, and the other end is connected to the first terminal of the second switching transistor and one end of the fourth resistor. The other end of the fourth resistor is connected to the second switching power supply.

8. The circuit according to claim 5, characterized in that, The signal processing unit is a digital signal processor.

9. An inverter, characterized in that, The inverter includes a stand-alone module as described in any one of claims 1-8.

10. A parallel system, characterized in that, The parallel system includes at least one inverter as described in claim 9 and a bus control circuit as described in any one of claims 1-8.

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