An ai headset and multi-microphone circuit therefor

Abstract

The utility model discloses an AI head -mounted earphone and multi -microphone circuit thereof, and the circuit includes bluetooth main control circuit and multi -microphone drive circuit, and multi -microphone drive circuit is respectively the drive circuit of talk -through microphone, right main microphone drive circuit, right auxiliary microphone drive circuit, left main microphone drive circuit, left auxiliary microphone drive circuit, and each drive circuit is independently powered and controlled. The utility model discloses AI head -mounted earphone increases multiple microphones, at least increases 4: one right main microphone, one right auxiliary microphone, one left main microphone, one left auxiliary microphone, is assembled to the left and right ear shell of AI head -mounted earphone respectively, and the main microphone is assembled to the mouth position close to the person wearing, and the auxiliary microphone is assembled to the back of the person wearing, and the multi -microphone works, and this design hardware circuit greatly improves the accuracy of AI head -mounted earphone to the target human voice pickup, and also can restrain the signal of environmental interference, so that the user can also experience the convenience brought by AI voice recognition in any noisy environment.

Description

Technical Field

[0001] This utility model relates to the field of wearable smart voice terminals, and in particular to an AI headset and its multi-microphone circuit. Background Technology

[0002] Current AI headsets typically use only one microphone for voice capture. In noisy environments such as subways and streets, the target voice is easily drowned out by ambient noise, leading to a sharp drop in speech recognition accuracy and a poor user experience. Although there have been attempts to use two microphones, their spatial layout and circuit design have failed to achieve effective beamforming and noise suppression capabilities, and they also have the following drawbacks: 1. Large gain and phase mismatch between microphone channels affects beamforming accuracy; 2. The microphone bias power supply is shared with the digital and RF sections, resulting in severe noise coupling; 3. No low-noise, independently adjustable bias and amplification links are provided for the four-microphone array; 4. In terms of layout, the secondary microphone is far away from the main microphone, making it impossible to form a front-to-back spatial filter. Utility Model Content

[0003] In view of this, the present invention addresses the deficiencies of the existing technology and its main purpose is to provide a multi-microphone circuit for AI headphones. Through the collaboration of a four-microphone array, differential analog front end, independent low-noise bias power supply and SoC-level algorithm, it achieves high signal-to-noise ratio voice signal output and significantly improves the accuracy of AI voice recognition.

[0004] To achieve the above objectives, the present invention adopts the following technical solution: A multi-microphone circuit for an AI-powered headset includes a Bluetooth main control circuit, a power interface circuit, a speaker circuit, a button circuit, an external analog audio input circuit, and a multi-microphone driver circuit. The power interface circuit, speaker circuit, button circuit, external analog audio input circuit, and multi-microphone driver circuit are all electrically connected to the Bluetooth main control circuit. The multi-microphone driver circuit drives the call microphone, right main microphone, right secondary microphone, left main microphone, and left secondary microphone driver circuits, respectively. Each driver circuit is independently powered and controlled.

[0005] As a preferred embodiment, the Bluetooth master control circuit includes a JL7083F6 master control SoC, which has a built-in 4-channel differential ADC and a programmable MIC BIAS power supply. As a preferred embodiment, the power interface circuit includes a linear charging chip U1 LP5308 and its peripheral devices.

[0006] As a preferred embodiment, the external analog audio input circuit includes a physical interface J1, a signal conditioning link, an insertion detection, and an analog switch.

[0007] As a preferred embodiment, the speaker circuit includes a stereo differential headphone amplifier U2, model WAS4729QB.

[0008] As a preferred embodiment, the button circuit includes four mechanical buttons: Play, Vol+, Vol-, and ANC. One end of each mechanical button is grounded, and the other end is connected to the KEY line. The cathodes of two LEDs are connected to the KEY line, and the anodes are pulled up to 3.3V through current-limiting resistors R24 and R25, respectively.

[0009] An AI headset, based on the multi-microphone circuit of the AI ​​headset, includes a call microphone, a right main microphone, a right secondary microphone, a left main microphone, and a left secondary microphone. The call microphone, the right main microphone, the right secondary microphone, the left main microphone, and the left secondary microphone are electrically connected to and driven by the call microphone driving circuit, the right main microphone driving circuit, the right secondary microphone driving circuit, the left main microphone driving circuit, and the left secondary microphone driving circuit, respectively.

[0010] As a preferred embodiment, the left and right main microphones are located close to the wearer's mouth, the left and right secondary microphones are located close to the back of the wearer's ears, and the call microphone is closer to the wearer's mouth than the left and right main microphones.

[0011] As a preferred embodiment, the left main microphone and the right main microphone are symmetrical, and the left auxiliary microphone and the right auxiliary microphone are also symmetrical.

[0012] As a preferred embodiment, the AI ​​headset has a retractable and adjustable headband and earcups, with a call microphone, a right main microphone, a right secondary microphone, a left main microphone, and a left secondary microphone mounted on the shell of the earcups.

[0013] Compared with the prior art, this utility model has significant advantages and beneficial effects. Specifically, as can be seen from the above technical solution, multiple microphones are added to the AI ​​headset, at least four: one right main microphone, one right secondary microphone, one left main microphone, and one left secondary microphone, which are respectively mounted on the left and right ear shells of the AI ​​headset. The main microphone is mounted near the wearer's mouth, and the secondary microphone is mounted behind the wearer. With multiple microphones working, this hardware circuit design greatly improves the accuracy of the AI ​​headset in picking up the target human voice, while also suppressing environmental interference signals, allowing users to experience the convenience brought by AI voice recognition even in noisy environments.

[0014] To more clearly illustrate the structural features and effects of this utility model, the following detailed description of this utility model is provided in conjunction with the accompanying drawings and specific embodiments. Attached Figure Description

[0015] Figure 1 This is a block diagram of a multi-microphone circuit structure according to an embodiment of the present invention.

[0016] Figure 2 This is a Bluetooth master control circuit diagram of an embodiment of the present invention.

[0017] Figure 3 This is a power interface circuit diagram of an embodiment of the present invention.

[0018] Figure 4 This is an external analog audio input circuit diagram of an embodiment of the present invention.

[0019] Figure 5 This is a speaker circuit diagram of an embodiment of the present invention.

[0020] Figure 6 This is a multi-microphone driver circuit diagram according to an embodiment of the present invention.

[0021] Figure 7 This is a circuit diagram of a button according to an embodiment of the present invention.

[0022] Figure 8 This is a battery protection circuit diagram according to an embodiment of the present invention.

[0023] Figure 9 This is a schematic diagram of an AI-powered headset according to an embodiment of the present invention.

[0024] Explanation of reference numerals in the attached diagram: 10. Bluetooth main control circuit; 20. Power interface circuit 30. Speaker circuit 40. Button circuit 50. External analog audio input circuit; 60. Multi-microphone driver circuit 70. Battery protection circuit 100. AI-powered headphones; 101. Call microphone 102. Right main wheat 103. Right secondary wheat 104. Left main mic 105. Left auxiliary mic 107. Headband 108. Earmuffs Detailed Implementation

[0025] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.

[0026] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0027] It should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0028] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0029] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments.

[0030] Please refer to Figures 1 to 9 The diagram illustrates the specific structure of a preferred embodiment of this invention, which is a multi-microphone circuit for an AI headset. The AI ​​headset 100 includes five MEMS microphones arranged in the left and right earcups: a call microphone 101, a right main microphone 102, a right secondary microphone 103, a left main microphone 104, and a left secondary microphone 105. When worn, the main microphone is positioned close to the wearer's mouth, and the secondary microphone is positioned close to the back of the wearer's ear. The four-microphone array spatial layout, combined with a differential analog front-end, provides sufficient spatial information for the beamforming algorithm, improving the noise suppression ratio by ≥30 dB. The multi-microphone circuit designed for this purpose includes a Bluetooth main control circuit 10, a power interface circuit 20, a speaker circuit 30, a button circuit 40, an external analog audio input circuit 50, a multi-microphone driver circuit 60, and a battery protection circuit 70. The power interface circuit 20, speaker circuit 30, button circuit 40, external analog audio input circuit 50, multi-microphone driver circuit 60, and battery protection circuit 70 are all electrically connected to the Bluetooth main control circuit 10.

[0031] The multi-microphone driver circuit 60 drives the call microphone 101, right main microphone 102, right secondary microphone 103, left main microphone 104, and left secondary microphone 105 respectively. Independent low-noise microphone drivers and zoned power supply design reduce the microphone channel noise floor to -126dBV, improving far-field recognition distance (≥5 m). The multi-microphone driver circuit 60 is electrically connected to the Bluetooth main control circuit 10. Dynamic switching and low-power monitoring strategies for the right main microphone 102, right secondary microphone 103, left main microphone 104, and left secondary microphone 105 improve overall battery life by 25%. Furthermore, the Bluetooth main control circuit 10 is deeply coupled with the SoC algorithm, supporting OTA upgrades and facilitating future functional expansion.

[0032] More specifically, such as Figure 2 As shown, the Bluetooth main control circuit 10 includes a JL7083F6 main control SoC, which has a built-in 4-channel differential ADC and a programmable MIC BIAS power supply. Targeting the TWS and over-ear headphone market, it integrates RF, power management, audio codec, multi-channel ADC, NPU (or DSP), and abundant IO resources, enabling functions such as a "one-to-four" microphone array, echo cancellation, AI noise reduction, and local keyword wake-up. Its audio subsystem includes stereo DACs: DACLN / DACLP, DACRN / DACRP differential output → headphone amplifier → SPK_LN / LP, SPK_RN / RP. It also includes ADC channels: MIC0_P / N, MIC1_P / N, MIC2_P / N, and MIC3_P / N pins corresponding to the five-microphone array call microphone, right main microphone 102, right secondary microphone 103, left main microphone 104, and left secondary microphone 105, respectively. In addition, it features built-in programmable microphones (MIC_BIAS_A / B / C / D), selectable between 2.7 V and 1.275 V, with source impedances of 1.5 kΩ / 0.3 kΩ. Furthermore, it boasts a 24-bit, 192 kHz Σ-Δ ADC per channel, with PGA + DRC + AGC, capable of directly outputting 32-bit I / O. 2 S / PCM supplies computation to the on-chip NPU.

[0033] The JL7083F6 SoC of this utility model is implemented through I... 2The S-interface sends four PCM data streams to the built-in NPU, running MVDR beamforming and DNN-NR algorithms to achieve ≥30 dB ambient noise suppression and >95% speech recognition accuracy. The JL7083F6 main control SoC features a built-in 4-channel differential ADC and programmable microphone BIAS power supply. Integrated beamforming and deep neural network noise reduction algorithm modules within the SoC are used for real-time processing of the four microphone signals. The microphone BIAS voltage can be dynamically switched between 1.275 V and 2.7 V via registers to adapt to the different sensitivity requirements of the main and secondary microphones.

[0034] like Figure 3 As shown, the power interface circuit 20 includes a linear charging chip U1 LP5308 and its peripheral components, completing the linear charging management function from the USB-C port to the battery. Essentially, it is a linear 500 mA single-cell lithium-ion charger, featuring CC / CV curves, NTC temperature protection, and full USB-C interface protection. Due to space and heat dissipation limitations in headphones, a linear solution eliminates the need for a DC-DC inductor, resulting in lower cost and EMI. The only trade-off is a charging efficiency of approximately 70%, but this is sufficient for low-current applications up to 500 mA.

[0035] like Figure 4 As shown, the external analog audio input circuit 50 receives the left and right channel analog audio signals from the 3.5 mm headphone jack (AUX socket) and inputs them into the JL7083F6 SoC. The chip then internally amplifies, samples using an ADC, or performs bypass processing to achieve seamless switching between wired and Bluetooth audio. Its circuit structure includes a physical interface J1, a signal conditioning link, insertion detection, and an analog switch.

[0036] The physical interface J1 is a USB-C audio jack, featuring both USB-C and a 3.5 mm headphone plug. The traditional 4-pin headphone jack pads correspond to the left channel, right channel, analog ground, and headset remote. In addition, a 5th pin is added, corresponding to the AUX_IN_DET pin, which is pulled up to 3V3 via a 100kΩ pull-up. When the headphone plug is inserted, the plug's metal sleeve pulls AUX_IN_DET to AGND, generating a low-level interrupt. Upon detecting the falling edge, the MCU software shuts down the Bluetooth audio link and switches to the AUX channel.

[0037] like Figure 5As shown, the speaker circuit 30 is used for playing sound from the left and right earphones. The speaker circuit 30 includes a stereo differential headphone amplifier U2 (model WAS4729QB). The stereo differential headphone amplifier U2 has a built-in PMOS+NMOS power switch, which is responsible for amplifying the DAC differential output of the Bluetooth main control circuit 10, including the JL7083F6 main control SoC, to drive the 32Ω earphones.

[0038] like Figure 6 As shown, the multi-microphone driving circuit 60 includes a call microphone driving circuit, a right main microphone driving circuit, a right secondary microphone driving circuit, a left main microphone driving circuit, and a left secondary microphone driving circuit. The right main microphone driving circuit, the right secondary microphone driving circuit, the left main microphone driving circuit, and the left secondary microphone driving circuit form a four-microphone differential array. The four array microphones upload the picked-up sound to the 4-channel ADC inside the JL7083F6 chip of the Bluetooth main control circuit 10.

[0039] The MIC BIAS voltage can be dynamically switched between 1.275 V and 2.7 V via a register to adapt to the different sensitivity requirements of the main and secondary microphones. As a preferred embodiment, the interface of the right main microphone 102 (near the mouth) is MIC0_P / N; the interface of the right secondary microphone 103 (behind the ear) is MIC1_P / N; the interface of the left main microphone 104 is MIC2_P / N; and the interface of the left secondary microphone 105 is MIC3_P / N. Each microphone is powered through the MIC_VDD interface at 2.7 V. MIC_VDD is pulled up to 1.5 kΩ from the internal LDO (capable of 50 mA load) of the JL7083F6 chip before being sent to the VDD pin of each microphone. The call microphone 101 is connected to the VDD pin of the call microphone 101 via another low-voltage LDO pulled up to 0.3 kΩ through the TKMIC_VDD pin. In addition, each VDD channel is equipped with capacitors and resistors to suppress digital noise coupling in the 100 kHz-20 MHz range.

[0040] A low-noise LDO independently powers the microphone, with its input filtered by a 47 µH inductor and a 4.7 µF capacitor in a π-type manner. A differential analog front-end corresponding to the microphone filters each microphone signal through a 100 Ω ferrite bead and a 10 nF capacitor in a π-type manner before connecting it to the ADC. Thus, the multi-microphone driver circuit 60 achieves high SNR (>64 dB) far-field pickup; phase error <0.5 mm, meeting MVDR beamforming requirements; dynamic power supply switching; and a standby current of <120 µA. The entire analog front-end is tightly coupled with the DSP / NPU of the JL7083F6 chip, providing a low-noise, low-power, and high-performance voice input solution for AI headphones.

[0041] like Figure 7 As shown, the button circuit 40 is a multi-button, multi-functional multiplexed input network. The same KEY line detects button presses, drives LED status indicators, and provides pull-up levels for Hall switches or touch interrupts. This embodiment includes four mechanical buttons (Play, Vol+, Vol-, ANC), one end of which is grounded, and the other end is connected to the KEY line. Two LEDs (see attached diagram) are also included. Figure 2 The cathodes of LED1 and LED2 (shown) are connected to the KEY line, and the anodes are pulled up to 3V3 via current-limiting resistors R24 and R25 respectively. The button circuit 40 can also enable the headphones. When not enabled, only the secondary microphone channel works in standby mode, with power consumption less than 120 µA; after being woken up, all microphone channels are enabled within 5 ms, and the total system power consumption is less than 28 mA.

[0042] like Figure 8 As shown, the battery protection circuit 70 is a three-in-one network for single-cell lithium battery protection, power monitoring, and power supply bus. It connects the battery, protection IC, power detection, and system bus VBAT+ / VBAT– together. It achieves 62.5mA linear charging; overcharge, over-discharge, short circuit, and over-temperature protection; and provides a clean 3.0–4.2V bus to all subsystems of the headset.

[0043] like Figure 9 As shown, an AI headset 100 is provided. Based on the multi-microphone circuit of the aforementioned AI headset, it includes a call microphone 101, a right main microphone 102, a right secondary microphone 103, a left main microphone 104, and a left secondary microphone 105. The call microphone 101, right main microphone 102, right secondary microphone 103, left main microphone 104, and left secondary microphone 105 are electrically connected to and driven by the call microphone driving circuit, the right main microphone driving circuit, the right secondary microphone driving circuit, the left main microphone driving circuit, and the left secondary microphone driving circuit, respectively.

[0044] The left main microphone 104 and right main microphone 102 are located near the wearer's mouth, while the left secondary microphone 105 and right secondary microphone 103 are located near the back of the wearer's ears. The call microphone 101 is closer to the wearer's mouth than the left main microphone 104 and right main microphone 102. The left main microphone 104 and right main microphone 102 are symmetrical from left to right, as are the left secondary microphone 105 and right secondary microphone 103.

[0045] The AI ​​headset 100 has a retractable and adjustable headband 107 and earcups 108. A call microphone 101, a right main microphone 102, a right secondary microphone 103, a left main microphone 104, and a left secondary microphone 105 are mounted on the shell of the earcups 108.

[0046] In summary, the key design feature of this utility model lies in adding multiple (more than 2, taking 4 as an example) AI headsets 100, with the circuit as follows: Figure 1 One right main microphone 102, one right secondary microphone 103, one left main microphone 104, and one left secondary microphone 105 are respectively installed on the left and right earcups of the AI ​​headset 100, as shown in the attached diagram. Figure 2 The main microphone is mounted near the wearer's mouth, while the secondary microphone is mounted behind the wearer. With multiple microphones working, this hardware design greatly improves the accuracy of the AI ​​headset in picking up the target human voice, while also suppressing environmental interference signals, allowing users to experience the convenience of AI voice recognition even in noisy environments.

[0047] The above description is merely a preferred embodiment of the present utility model and does not constitute any limitation on the technical scope of the present utility model. Therefore, any minor modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present utility model shall still fall within the scope of the technical solution of the present utility model.

Claims

1. A multi-microphone circuit for an AI headset, comprising a Bluetooth main control circuit (10), a power interface circuit (20), a speaker circuit (30), a button circuit (40), an external analog audio input circuit (50), and a multi-microphone driver circuit (60), wherein the power interface circuit (20), the speaker circuit (30), the button circuit (40), the external analog audio input circuit (50), and the multi-microphone driver circuit (60) are all electrically connected to the Bluetooth main control circuit (10), characterized in that: The multi-microphone driver circuit (60) drives the call microphone (101), right main microphone (102), right secondary microphone (103), left main microphone (104), and left secondary microphone (105) respectively. Each driver circuit is powered independently.

2. The multi-microphone circuit for an AI headset according to claim 1, characterized in that: The Bluetooth master control circuit (10) includes the JL7083F6 master control SoC and its peripheral devices.

3. The multi-microphone circuit for an AI headset according to claim 1, characterized in that: The power interface circuit (20) includes a linear charging chip U1 LP5308 and its peripheral devices.

4. The multi-microphone circuit for an AI headset according to claim 1, characterized in that: The external analog audio input circuit (50) includes a physical interface J1, a signal conditioning link, an insertion detection, and an analog switch.

5. The multi-microphone circuit for an AI headset according to claim 1, characterized in that: The speaker circuit (30) includes a stereo differential headphone amplifier U2, model WAS4729QB.

6. The multi-microphone circuit for an AI headset according to claim 1, characterized in that: The button circuit (40) includes four mechanical buttons: Play, Vol+, Vol-, and ANC. One end of each mechanical button is grounded, and the other end is connected to the KEY line. The cathodes of two LEDs are connected to the KEY line, and the anodes are pulled up to 3.3V through current-limiting resistors R24 and R25, respectively.

7. An AI headset, based on the multi-microphone circuit of the AI ​​headset according to any one of claims 1 to 6, characterized in that: It includes a call microphone (101), a right main microphone (102), a right secondary microphone (103), a left main microphone (104), and a left secondary microphone (105). The call microphone (101), the right main microphone (102), the right secondary microphone (103), the left main microphone (104), and the left secondary microphone (105) are electrically connected and driven by the call microphone driving circuit, the right main microphone driving circuit, the right secondary microphone driving circuit, the left main microphone driving circuit, and the left secondary microphone driving circuit, respectively.

8. An AI-powered headset according to claim 7, characterized in that: After being worn, the left main microphone (104) and right main microphone (102) are close to the wearer's mouth, the left secondary microphone (105) and right secondary microphone (103) are close to the back of the wearer's ear, and the call microphone (101) is closer to the wearer's mouth than the left main microphone (104) and right main microphone (102).

9. An AI-powered headset according to claim 7, characterized in that: The left main wheat (104) and right main wheat (102) are symmetrical from left to right, and the left secondary wheat (105) and right secondary wheat (103) are symmetrical from left to right.

10. An AI-powered headset according to claim 7, characterized in that: The AI ​​headset (100) has a retractable and adjustable headband (107) and earcups (108). The microphone (101), right main microphone (102), right secondary microphone (103), left main microphone (104), and left secondary microphone (105) are located on the shell of the earcups (108).

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