A signal anti-interference mainboard wiring structure

Abstract

The utility model provides a signal anti -jamming mainboard wiring structure, including mainboard base body, matching resistance network, dynamic balance compensation module and metal shielding layer. The mainboard base body is equipped with wiring layer, ground layer and insulating dielectric layer, and is provided with a pair of differential signal line in wiring layer, is used for impedance matching to differential signal line to dynamic balance compensation module between matching resistance network and ground layer, contains temperature -sensitive resistance element, strain sensing unit and regulation control circuit, can adjust impedance in real time according to temperature and strain change, realizes differential signal dynamic balance, and metal shielding layer and conductive wave -absorbing layer are used for restraining external electromagnetic interference. The structure passes through temperature and strain double feedback mechanism and combines microcontrol unit's closed -loop regulation, realizes the adaptive impedance compensation of high -speed differential signal transmission process, reduces common mode interference and reflected noise, promotes signal integrity and electromagnetic compatibility performance, is applicable to high -speed data mainboard and electronic equipment.

Description

Technical Field

[0001] This utility model relates to the field of electronic circuit design technology, and in particular to a signal anti-interference motherboard wiring structure. Background Technology

[0002] With the rapid development of data centers and artificial intelligence computing clusters, the number of GPU computing cards integrated on server motherboards is constantly increasing, the motherboard wiring density is significantly improved, and the signal transmission rate generally exceeds 10Gbps. In this high-computing platform, the CPU and multiple GPUs conduct large-scale data interaction through high-speed differential channels such as PCIe bus or NVLink.

[0003] Due to the extremely small spacing between high-speed signal lines and the complex cross-layer routing, motherboard wiring is highly susceptible to electromagnetic coupling, crosstalk, reflected noise, and ground return current interference, leading to data transmission eye diagram closure, increased bit error rate, and even link interruption. In addition, there are multiple high-frequency signals being transmitted in parallel between the motherboard and the graphics card, and the impedance requirements of different frequency bands vary greatly. Traditional static wiring methods cannot simultaneously ensure stable matching of multiple frequency band signals. Therefore, we propose a signal anti-interference motherboard wiring structure. Utility Model Content

[0004] The purpose of this invention is to address the shortcomings of existing technologies by providing a signal anti-interference motherboard wiring structure. By introducing a dynamic balance compensation module into the motherboard wiring structure, real-time automatic impedance adjustment is achieved during differential signal transmission. This module senses local temperature changes on the motherboard using a thermistor element and monitors the mechanical deformation of the motherboard using a strain sensing unit. The control circuit dynamically corrects the equivalent resistance value of the matching resistor network based on the detected signals, thereby maintaining impedance balance between differential signal lines. This mechanism effectively eliminates common-mode interference and reflection noise caused by thermal drift and stress deformation, significantly improving signal integrity and anti-interference capabilities.

[0005] To achieve the above objectives, this utility model provides the following technical solution:

[0006] A signal interference suppression motherboard wiring structure, including

[0007] A motherboard substrate, wherein a wiring layer, a ground layer and an insulating dielectric layer are provided on the motherboard substrate for signal transmission, and a pair of differential signal lines for high-speed signal transmission are provided in the wiring layer;

[0008] A matching resistor network is provided in the terminal region of the differential signal line to match the impedance of the differential signal line.

[0009] A dynamic balance compensation module is connected between the matching resistor network and the grounding layer;

[0010] A metal shielding layer is disposed below the grounding layer to reduce external electromagnetic interference.

[0011] Preferably, the dynamic balance compensation module includes:

[0012] Thermosensitive resistor element;

[0013] A strain sensing unit is disposed below the wiring layer;

[0014] An adjustment control circuit is provided, which is electrically connected to the temperature-sensitive resistor element and the strain sensing unit.

[0015] Furthermore, the adjustment and control circuit includes a differential amplifier, a resistor divider bridge, and a MOSFET adjustment unit.

[0016] Preferably, the matching resistor network includes three sets of parallel branches, namely low-frequency band, mid-frequency band and high-frequency band signals.

[0017] Furthermore, a heat dissipation channel is provided in the motherboard substrate, and the thermistor element is arranged near the outlet of the heat dissipation channel.

[0018] Preferably, the edge of the metal shielding layer extends to form a grounding extension, which is connected to the grounding layer by multi-point welding or conductive adhesive.

[0019] Furthermore, the adjustment and control circuit further includes an analog-to-digital conversion unit and a microcontroller unit, wherein the microcontroller unit is used to acquire analog signals from the thermistor element and the strain sensing unit.

[0020] Preferably, the microcontroller unit is electrically connected to the external interface.

[0021] The beneficial effects of this utility model are as follows:

[0022] This invention achieves real-time automatic impedance adjustment during differential signal transmission by introducing a dynamic balance compensation module into the motherboard wiring structure. This module senses local temperature changes on the motherboard using a thermistor and monitors the mechanical deformation of the motherboard using a strain gauge. The control circuit dynamically adjusts the equivalent resistance value of the matching resistor network based on the detected signals, thereby maintaining impedance balance between differential signal lines. This mechanism effectively eliminates common-mode interference and reflection noise caused by thermal drift and stress deformation, significantly improving signal integrity and anti-interference capabilities.

[0023] This invention employs a composite shielding design combining a conductive absorbing material layer and a metal shielding layer. While absorbing high-frequency common-mode interference, it utilizes the grounding extension section to construct multiple grounding paths, significantly reducing high-frequency return inductance, further suppressing electromagnetic radiation, and improving the overall electromagnetic compatibility performance of the board.

[0024] This invention establishes a closed-loop adaptive control system by integrating an analog-to-digital converter and a microcontroller unit, achieving integrated signal detection, digital analysis, and PWM feedback regulation. It can perform multi-point compensation in real time based on impedance deviation. This solution offers advantages such as fast response, high accuracy, and strong adaptability, making it suitable for multi-band high-speed differential signal systems.

[0025] This utility model has a reasonable structural design and feasible manufacturing process. It can significantly improve anti-interference performance and transmission stability without increasing the motherboard area. It has good versatility and engineering application value, and is particularly suitable for high-speed data transmission motherboards, high-performance computing devices and precision communication electronic systems. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of the motherboard wiring structure of this utility model;

[0027] Figure 2 This is a schematic diagram of the adjustment and control circuit structure of this utility model;

[0028] Figure 3 This is a schematic diagram of the motherboard layer structure of this utility model.

[0029] Figure Labels

[0030] 1. Mainboard substrate; 11. Wiring layer; 111. Differential signal line; 12. Ground layer; 13. Insulating dielectric layer; 2. Matching resistor network; 3. Dynamic balance compensation module; 31. Thermistor element; 32. Strain sensing unit; 33. Adjustment control circuit; 331. Differential amplifier; 332. Resistor voltage divider bridge; 333. MOSFET adjustment unit; 334. Analog-to-digital converter unit; 335. Microcontroller unit; 4. Metal shielding layer; 5. External interface. Detailed Implementation

[0031] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0032] In the description of this utility model, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this utility model and simplifying the description, and are not intended to indicate or imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model.

[0033] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this utility model, "a plurality of" means two or more, unless otherwise explicitly specified.

[0034] Example 1: As Figure 1 As shown, this embodiment provides a signal anti-interference motherboard wiring structure, including:

[0035] The motherboard substrate 1 has a layered structure inside, which includes a wiring layer 11, an insulating dielectric layer 13 and a grounding layer 12 from top to bottom.

[0036] The wiring layer 11 is used to lay high-speed differential signal lines 111, the grounding layer 12 forms a complete signal return plane, and the insulating dielectric layer 13 is disposed between the two to achieve electrical isolation between the signal lines and the grounding layer 12 and control the transmission impedance.

[0037] The thickness of the insulating dielectric layer 13 is preferably 0.10 to 0.25 mm, and the dielectric constant εr is 3.8 to 4.5, so as to ensure that the characteristic impedance of the differential signal is maintained at 100Ω ± 10%.

[0038] Matching resistor network 2 is located in the terminal region of differential signal line 111 to perform impedance matching on differential signal line 111. Matching resistor network 2 includes three sets of parallel branches, corresponding to impedance adjustment of low-frequency, mid-frequency, and high-frequency signals respectively, to achieve multi-frequency common matching. Each branch contains an adjustable resistor unit, the resistance value of which is controlled by the output signal of dynamic balance compensation module 3.

[0039] The dynamic balance compensation module 3 is connected between the matching resistor network 2 and the ground layer 12, and includes a temperature-sensitive resistor element 31, a strain sensing unit 32 and an adjustment control circuit 33.

[0040] The matching resistor network 2 is disposed in the terminal region of the differential signal line 111 and is used to perform impedance matching on the differential signal line 111.

[0041] The matching resistor network 2 includes three sets of parallel branches, which correspond to impedance adjustment of low-frequency, mid-frequency and high-frequency signals, respectively, to achieve multi-frequency common matching.

[0042] The low-frequency band is preferably 0-100MHz, the mid-frequency band is 100-500MHz, and the high-frequency band is 500MHz-2GHz. The resistance value of each branch is 30Ω-120Ω to meet the signal matching requirements of different frequency bands.

[0043] Each branch contains an adjustable resistor unit, the value of which is controlled by the output signal of the dynamic balance compensation module 3. Each branch can be constructed by connecting the adjustable resistor and the bypass capacitor in series and parallel to form a frequency-selective impedance characteristic, thereby achieving corresponding matching compensation in different frequency bands.

[0044] The dynamic balance compensation module 3 is connected between the matching resistor network 2 and the ground layer 12, and includes a temperature-sensitive resistor element 31, a strain sensing unit 32 and an adjustment control circuit 33.

[0045] The temperature-sensitive resistor element 31 is used to automatically adjust the resistance value of the matching resistor network 2 according to the local temperature change of the motherboard;

[0046] The strain sensing unit 32 is used to detect impedance imbalance caused by bending or deformation of the motherboard;

[0047] The adjustment control circuit 33 dynamically adjusts the equivalent resistance value of the matching resistor network 2 according to the detection signal to maintain the impedance balance of the differential signal line 111 and achieve dynamic compensation.

[0048] The thermistor element 31 is located near the heat dissipation channel outlet of the motherboard. It is preferably packaged with NTC thermistor material. Its resistance decreases as the temperature rises, and it is used to reflect the changes in the operating temperature of the motherboard in real time.

[0049] The strain sensing unit 32 uses a strain resistance sensing element, which is attached below the wiring layer 11 to detect impedance imbalance signals caused by local bending or mechanical stress of the motherboard.

[0050] The adjustment and control circuit 33 includes a differential amplifier 331, a resistor voltage divider bridge 332, and a MOSFET adjustment unit 333.

[0051] The differential amplifier 331 compares and amplifies the temperature and strain signals to form a voltage control signal; the MOS transistor adjustment unit 333 changes the equivalent resistance in the matching resistor network 2 according to the voltage signal, so that the impedances of the two differential signal lines 111 automatically tend to be consistent, thereby maintaining transmission balance.

[0052] To achieve precise multi-point compensation adjustment, the adjustment control circuit 33 further includes an analog-to-digital conversion unit 334 and a microcontroller unit 335.

[0053] The analog-to-digital converter 334 converts the analog voltage signals of the thermistor 31 and the strain sensing unit 32 into digital signals; the microcontroller 335 performs data fusion calculation based on a preset impedance balance algorithm and outputs a PWM control signal to the MOSFET adjustment unit 333, forming a closed-loop dynamic control mechanism of "detection-adjustment-feedback".

[0054] The sampling frequency of the analog-to-digital converter 334 is 1 to 10 kHz, and the duty cycle range of the PWM control signal output by the microcontroller 335 is 10% to 90% to ensure the dynamic response and stability of the impedance adjustment process.

[0055] The microcontroller unit 335 performs proportional-integral control based on the impedance deviation ΔZ. The algorithm is corrected according to the real-time impedance difference ΔZ, and its update formula is as follows:

[0056] R adj (t+1)=R adj (t)-K p ·ΔZ-K i ·∫ΔZ·dt

[0057] Where R adj For the equivalent matching resistance, K p K i Here, ΔZ represents the proportional and integral coefficients, and ΔZ is the impedance difference between the two differential lines. The MCU outputs a PWM signal to control the duty cycle of the MOSFET, thereby continuously and adjustablely changing the equivalent resistance of the matching network to achieve automatic impedance balancing compensation.

[0058] proportionality coefficient K p The preferred value is 0.05 to 0.3, and the integral coefficient K i The preferred values ​​are 0.01 to 0.1, all of which are dimensionless adjustment parameters; the algorithm is executed with a period of 1 to 10 ms, which can achieve continuous adaptive impedance compensation in dynamic environments.

[0059] The MCU outputs a pulse width modulation (PWM) signal to the MOSFET adjustment unit based on the real-time calculation results. By adjusting the duty cycle of the MOSFET, the equivalent resistance of the matching resistor network can be continuously varied, thereby compensating for impedance deviations caused by temperature drift, dielectric changes, or stress deformation in real time, so that the impedance of the differential pair is maintained within the target value (e.g., 100Ω ± 5%).

[0060] During the above adjustment process, the MCU can periodically read the impedance data output by the A / D conversion module and perform iterative calculations with a sampling period T. When |ΔZ| is less than the threshold ΔZth (preferably 5Ω), the system enters the steady-state maintenance mode, keeping only the low-frequency integral loop working to avoid high-frequency oscillation and over-adjustment.

[0061] The microcontroller unit 335 can employ an 8-bit or 32-bit low-power MCU, such as the STM32 series or equivalent devices, to ensure control accuracy and stability. The microcontroller unit 335 is also electrically connected to external interface 5 for outputting real-time impedance status parameters of the differential signal line 111. The interface supports I / O. 2 The system can use C or UART communication to output monitoring data including temperature, strain, equivalent impedance, and compensation current, which facilitates motherboard production debugging and in-service signal integrity analysis.

[0062] Example 2: In this example, a metal shielding layer 4 and a conductive absorbing material layer can be further stacked below the grounding layer 12 to form a composite shielding structure, which significantly improves the electromagnetic interference resistance of the motherboard.

[0063] The edge of the metal shielding layer 4 extends to form a grounding extension, which is connected to the grounding layer 12 by multi-point welding or conductive adhesive to reduce the inductive effect of the high-frequency signal return path.

[0064] A conductive absorbing material layer is provided between the grounding extension and the grounding layer 12. The material is preferably ferrite composite rubber or carbon magnetic powder high-loss polymer, with a thickness of 0.2 to 0.5 mm.

[0065] The absorbing layer is adhered and fixed to the surface of the grounding layer 12 by epoxy conductive adhesive or hot-pressing composite method to ensure close contact and conductive continuity between the absorbing layer and the conductor surface.

[0066] The surface resistivity of the absorbing layer is preferably less than 1 Ω / □, and the adhesion strength is not less than 1.5 MPa, in order to ensure high-frequency return conduction and structural stability.

[0067] This absorbing layer can absorb common-mode interference energy in the GHz band, thereby further suppressing electromagnetic radiation and improving the electromagnetic compatibility performance of the motherboard.

[0068] Example 3: In this example, the motherboard substrate 1 is provided with a metal annular grounding frame, which together with the metal shielding layer 4 forms a closed annular shielding cavity; the metal shielding layer 4 is preferably a copper foil layer with a thickness of 0.1 to 0.3 mm, which is embedded into the interlayer structure of the motherboard through a multi-layer lamination method.

[0069] The metal ring-shaped grounding frame can be fixed to the outer edge of the motherboard using laser welding or conductive resin bonding. The contact resistance between the frame and the metal shielding layer 4 is preferably less than 0.05Ω to ensure continuous electrical connection and low-impedance conduction. This ring-shaped shielding cavity can maintain the stability and anti-interference capability of differential signal transmission under dynamic conditions such as motherboard bending and temperature changes, further improving the electromagnetic compatibility and reliability of the motherboard system.

[0070] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A signal anti-interference motherboard wiring structure, characterized in that, include A motherboard substrate, wherein a wiring layer, a ground layer and an insulating dielectric layer are provided on the motherboard substrate for signal transmission, and a pair of differential signal lines for high-speed signal transmission are provided in the wiring layer; A matching resistor network is provided in the terminal region of the differential signal line to match the impedance of the differential signal line. A dynamic balance compensation module is connected between the matching resistor network and the ground plane; A metal shielding layer is disposed below the grounding layer to reduce external electromagnetic interference.

2. The signal anti-interference motherboard wiring structure according to claim 1, characterized in that, The dynamic balance compensation module includes: Thermosensitive element A strain sensing unit is disposed below the wiring layer; An adjustment control circuit is provided, which is electrically connected to the temperature-sensitive resistor element and the strain sensing unit.

3. The signal anti-interference motherboard wiring structure according to claim 2, characterized in that, The adjustment and control circuit includes a differential amplifier, a resistor divider bridge, and a MOSFET adjustment unit.

4. The signal anti-interference motherboard wiring structure according to claim 1, characterized in that, The matching resistor network includes three sets of parallel branches, namely low-frequency band, mid-frequency band and high-frequency band signals.

5. The signal anti-interference motherboard wiring structure according to claim 2, characterized in that, The motherboard substrate is provided with a heat dissipation channel, and the temperature-sensitive resistor element is arranged near the outlet of the heat dissipation channel.

6. The signal anti-interference motherboard wiring structure according to claim 4, characterized in that, The edge of the metal shielding layer extends to form a grounding extension, which is connected to the grounding layer by multi-point welding or conductive adhesive.

7. The signal anti-interference motherboard wiring structure according to claim 3, characterized in that, The adjustment and control circuit further includes an analog-to-digital conversion unit and a microcontroller unit, wherein the microcontroller unit is used to acquire analog signals from the thermistor element and the strain sensing unit.

8. The signal anti-interference motherboard wiring structure according to claim 7, characterized in that, The microcontroller unit is electrically connected to the external interface.

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