A digital ultrasonic flaw detection circuit

Abstract

The utility model belongs to the field of ultrasonic flaw detection, and relates to a digital ultrasonic flaw detection circuit, which has stable and constant frequency and gentle and smooth current change when outputting current to a flaw detection probe. The technical scheme comprises a microprocessor, a pulse circuit, a pulse width modulation circuit, a band-pass filter and an ultrasonic probe. The pulse circuit is electrically connected to the microprocessor, and the pulse circuit alternately outputs positive pulse current and negative pulse current. The pulse width modulation circuit is electrically connected to the microprocessor and the pulse circuit, receives signals from the microprocessor, and under the signal control of the microprocessor, outputs positive pulse current and negative pulse current in the form of pulse current with multiple different widths. The band-pass filter is electrically connected to the pulse width modulation circuit, receives pulse current with multiple different widths, and outputs sinusoidal current with a fixed frequency. The ultrasonic probe is electrically connected to the band-pass filter.

Description

Technical Field

[0001] This utility model belongs to the field of ultrasonic flaw detection and relates to a digital ultrasonic flaw detection circuit. Background Technology

[0002] For ultrasonic testing of thicker workpieces, higher ultrasonic energy is required. Higher power output can be achieved by increasing the volume of the piezoelectric ceramic in the ultrasonic testing device. However, to balance power output, ultrasonic testing devices capable of inspecting thicker workpieces use piezoelectric ceramics that generate ultrasonic waves at lower frequencies, thus providing higher penetration into the workpiece.

[0003] In current technology, piezoelectric ceramics are generally excited using square waves, which have steep rise and fall edges. Under the influence of an electric field, the piezoelectric ceramic vibrates, generating ultrasonic waves. Square wave excitation causes sudden deformation of the piezoelectric ceramic. When the power is high, the possibility of surface cracking increases, affecting the lifespan of the piezoelectric ceramic. Furthermore, square waves can cause resonance in the piezoelectric ceramic, resulting in a high signal-to-noise ratio in ultrasonic testing. When testing materials with high attenuation, the returned acoustic signal is easily interfered with by noise. Utility Model Content

[0004] To overcome the shortcomings of the aforementioned related technologies, this utility model proposes a digital ultrasonic flaw detection circuit, which has a stable and constant frequency of the output current to the flaw detection probe and a smooth and gradual current change.

[0005] To achieve the above technical objectives, this utility model provides a digital ultrasonic flaw detection circuit. The digital ultrasonic flaw detection circuit includes: a microprocessor, a pulse circuit, a pulse width modulation circuit, a bandpass filter, and an ultrasonic probe. The pulse circuit is electrically connected to the microprocessor, and alternately outputs positive and negative pulse currents. The pulse width modulation circuit is electrically connected to the microprocessor and the pulse circuit, and receives signals from the microprocessor, and under the signal control of the microprocessor, outputs positive and negative pulse currents in multiple pulse currents of different widths. The bandpass filter is electrically connected to the pulse width modulation circuit, and receives multiple pulse currents of different widths and outputs a sinusoidal current at a fixed frequency. The ultrasonic probe is electrically connected to the bandpass filter.

[0006] Preferably, the pulse circuit includes: a first IGBT driver, a first IGBT, a second IGBT driver, and a second IGBT. The signal terminal of the first IGBT driver is electrically connected to the microprocessor. The first IGBT is an N-type IGBT, with its gate terminal electrically connected to the first IGBT driver and its collector electrically connected to a high-voltage power supply. The signal terminal of the second IGBT driver is electrically connected to the microprocessor. The second IGBT is a P-type IGBT, with its gate terminal electrically connected to the second IGBT driver, its emitter electrically connected to the emitter of the first IGBT, and its collector grounded.

[0007] Preferably, the pulse width modulation circuit includes a MOS transistor, the gate of which is electrically connected to the microprocessor, the source of which is electrically connected to the junction of the emitters of the first IGBT and the second IGBT, and the drain of which is electrically connected to the bandpass filter.

[0008] Preferably, the bandpass filter includes: a first inductor, a second capacitor, and a second inductor. One end of the first inductor is electrically connected to the drain of the MOSFET, and the other end of the first inductor is grounded. One end of the first capacitor is electrically connected to the drain of the MOSFET, and the other end of the first capacitor is grounded. One end of the second capacitor is electrically connected to the drain of the MOSFET. One end of the second inductor is electrically connected to one end of the second capacitor, and the other end of the second inductor is electrically connected to the ultrasonic probe.

[0009] Preferably, the digital ultrasonic flaw detection circuit further includes a power supply, which includes mains power.

[0010] The digital ultrasonic flaw detection circuit further includes a transformer circuit, a rectifier circuit, a voltage regulator circuit, and a boost circuit. The transformer circuit is electrically connected to the power supply, the rectifier circuit is electrically connected to the transformer circuit, and the voltage regulator circuit and the boost circuit are respectively electrically connected to the rectifier circuit. The voltage regulator circuit provides power for the operation of the microprocessor, the first IGBT driver, and the second IGBT driver, and the output of the boost circuit is a high-voltage power supply.

[0011] Preferably, the first IGBT driver includes a non-inverting amplifier circuit, the input terminal of which is electrically connected to the microprocessor, and the output terminal of which is electrically connected to the gate terminal of the first IGBT.

[0012] The second IGBT driver includes an inverting amplifier circuit, the input terminal of which is electrically connected to the microprocessor, and the output terminal of which is electrically connected to the gate terminal of the second IGBT.

[0013] The beneficial effects of this utility model are as follows: This invention employs a pulse circuit and a pulse width modulation circuit. With the ultrasonic probe unchanged, the required current frequency of the ultrasonic probe remains stable. The pulse circuit can adapt to high-voltage DC power and stably alternately output positive and negative pulse currents. After adjustment by the pulse width modulation circuit, the positive and negative pulse currents can be output as multiple pulses of different widths. These multiple pulses of different widths are then filtered by a bandpass filter to achieve a sinusoidal current output. Maintaining a smooth current flow and stable frequency ensures stable and smooth vibration of the piezoelectric ceramic, preventing abrupt changes in vibration amplitude due to sudden current fluctuations. This reduces other resonances in the piezoelectric ceramic, decreases ultrasonic noise, and improves imaging quality. Furthermore, it allows for a smooth transition in the deformation of the piezoelectric ceramic, extending its service life. Attached Figure Description

[0014] To more clearly illustrate the technical solutions in the embodiments of this utility model or related technologies, the drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0015] Figure 1 This is a circuit structure diagram of the present invention; Figure 2 The circuit diagrams for the pulse circuit, pulse width modulation circuit, and bandpass filter of this utility model are shown below. Figure 3 This is a circuit diagram of the first IGBT driver of this utility model; Figure 4 This is a circuit diagram of the second IGBT driver of this utility model. Detailed Implementation

[0016] To make the above-mentioned objectives, features, and advantages of this utility model more apparent and understandable, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this utility model.

[0017] In the description of this utility model, it should be understood that the terms "center", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0018] The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this utility model, unless otherwise stated, "a plurality of" means two or more.

[0019] like Figure 1 and Figure 2 As shown, some embodiments of this utility model provide a digital ultrasonic flaw detection circuit. The digital ultrasonic flaw detection circuit includes: a microprocessor 1, a pulse circuit 2, a pulse width modulation circuit 3, a bandpass filter 4, and an ultrasonic probe 5. The pulse circuit 2 is electrically connected to the microprocessor 1, and alternately outputs positive and negative pulse currents. The pulse width modulation circuit 3 is electrically connected to the microprocessor 1 and the pulse circuit 2, and receives signals from the microprocessor 1, and under the signal control of the microprocessor 1, outputs positive and negative pulse currents in multiple pulse currents of different widths. The bandpass filter 4 is electrically connected to the pulse width modulation circuit 3, and receives multiple pulse currents of different widths and outputs a sinusoidal current at a fixed frequency. The ultrasonic probe 5 is electrically connected to the bandpass filter 4.

[0020] The pulse circuit 2 includes: a first IGBT driver 21, a first IGBT, a second IGBT driver 22, and a second IGBT. The signal terminal of the first IGBT driver 21 is electrically connected to the microprocessor 1. The first IGBT is an N-type IGBT, with its gate terminal electrically connected to the first IGBT driver 21 and its collector electrically connected to a high-voltage power supply. The signal terminal of the second IGBT driver 22 is electrically connected to the microprocessor 1. The second IGBT is a P-type IGBT, with its gate terminal electrically connected to the second IGBT driver 22, its emitter electrically connected to the emitter of the first IGBT, and its collector grounded.

[0021] The pulse width modulation circuit 3 includes a MOS transistor. The gate of the MOS transistor is electrically connected to the microprocessor 1. The source of the MOS transistor is electrically connected to the junction of the emitter of the first IGBT and the emitter of the second IGBT. The drain of the MOS transistor is electrically connected to the bandpass filter 4.

[0022] The bandpass filter 4 includes: a first inductor L1, a first capacitor C1, a second capacitor C2, and a second inductor L2. One end of the first inductor L1 is electrically connected to the drain of the MOSFET, and the other end of the first inductor L1 is grounded. One end of the first capacitor C1 is electrically connected to the drain of the MOSFET, and the other end of the first capacitor C1 is grounded. One end of the second capacitor C2 is electrically connected to the drain of the MOSFET. One end of the second inductor L2 is electrically connected to one end of the second capacitor C2, and the other end of the second inductor L2 is electrically connected to the ultrasonic probe 5.

[0023] The digital ultrasonic flaw detection circuit also includes a power supply, which includes mains power.

[0024] The digital ultrasonic flaw detection circuit also includes a transformer circuit, a rectifier circuit, a voltage regulator circuit, and a boost circuit. The transformer circuit is electrically connected to the power supply, the rectifier circuit is electrically connected to the transformer circuit, and the voltage regulator circuit and the boost circuit are respectively electrically connected to the rectifier circuit. The voltage regulator circuit provides power for the operation of the microprocessor 1, the first IGBT driver 21, and the second IGBT driver 22. The output of the boost circuit is a high-voltage power supply.

[0025] In this application, the transformer circuit receives mains power and outputs 36V AC power, while the rectifier circuit shapes the AC power into 24V DC power. It should be noted that the rectifier circuit should also include a voltage regulator to ensure stable output voltage.

[0026] The voltage regulator circuit receives DC 24V current and outputs 3.3V current to power the microprocessor.

[0027] The boost circuit receives a DC 24V current and outputs a DC voltage of 2200V.

[0028] The first IGBT driver 21 includes a non-inverting amplifier circuit. The input terminal of the non-inverting amplifier circuit is electrically connected to the microprocessor, and the output terminal of the non-inverting amplifier circuit is electrically connected to the gate terminal of the first IGBT.

[0029] like Figure 3As shown, the non-inverting amplifier circuit includes: operational amplifier A, resistor R1 and resistor R2. The non-inverting input terminal of operational amplifier A is electrically connected to the microprocessor. The output terminal of operational amplifier A is electrically connected to one end of resistor R1 and the gate terminal of the first IGBT. The other end of resistor R1 is electrically connected to one end of resistor R2 and the inverting input terminal of operational amplifier A. The other end of resistor R2 is grounded. The positive power input terminal of operational amplifier A is electrically connected to the output terminal of the rectifier circuit, and the negative power input terminal of operational amplifier A is grounded.

[0030] In this application, the microprocessor is a single-chip microcomputer, and the voltage of the output signal is not lower than 2.4V. The ratio of the resistance value of resistor R1 to the resistance value of resistor R2 is 5.5~6.

[0031] The second IGBT driver 22 includes an inverting amplifier circuit, the input terminal of which is electrically connected to the microprocessor, and the output terminal of which is electrically connected to the gate terminal of the second IGBT.

[0032] like Figure 4 As shown, the inverting amplifier circuit includes: operational amplifier B, resistors R3 and R4. The non-inverting input terminal of operational amplifier B is grounded. The inverting input terminal of operational amplifier B is electrically connected to one end of resistor R3 and one end of resistor R4. The other end of resistor R3 is electrically connected to the microprocessor. The other end of resistor R4 is electrically connected to the output terminal of operational amplifier B. The output terminal of operational amplifier B is also electrically connected to the gate terminal of the second IGBT. The positive power input terminal of operational amplifier B is electrically connected to the output terminal of the rectifier circuit, and the negative power input terminal of operational amplifier B is grounded.

[0033] In this application, the ratio of the resistance value of resistor R4 to the resistance value of resistor R3 is 6.5 to 7.

[0034] The microprocessor is electrically connected as follows: the output terminal of operational amplifier A is electrically connected to one end of resistor R1 and the gate terminal of the first IGBT; the other end of resistor R1 is electrically connected to one end of resistor R2 and the inverting input terminal of operational amplifier A; and the other end of resistor R2 is grounded. The positive input terminal of the power supply of operational amplifier A is electrically connected to the output terminal of the rectifier circuit, and the negative input terminal of the power supply of operational amplifier A is grounded.

[0035] The operation process of this utility model is as follows: This application can be connected to mains power. The mains power is reduced to 36V after passing through a transformer circuit, and then output as DC24V after passing through a rectifier circuit. The voltage regulator circuit can further reduce the voltage to a suitable voltage for the microprocessor 1, such as 3.3V.

[0036] The boost circuit can use a voltage multiplier circuit to increase the DC voltage output by the rectifier circuit to 2200V.

[0037] During operation, the microprocessor 1 outputs electrical signals to the first IGBT driver 21 and the second IGBT driver 22 at a fixed frequency according to the piezoelectric ceramic characteristics inside the flaw detection probe. After receiving the electrical signal, the first IGBT driver 21 can output a conduction signal of not less than 15V. After receiving the conduction signal, the gate terminal of the first IGBT turns on the boost circuit and the pulse width modulation circuit 3.

[0038] Similarly, after receiving the electrical signal, the second IGBT driver 22 can output a conduction signal not higher than -15V. After receiving the conduction signal, the gate terminal of the second IGBT will turn on the boost circuit and the pulse width modulation circuit 3.

[0039] Thus, the first IGBT and the second IGBT are turned on alternately, causing the pulse width modulation circuit 3 to receive alternating positive and negative pulse currents.

[0040] The pulse width modulation circuit 3 further modulates the positive pulse current and the negative pulse current to generate a sinusoidal current.

[0041] Because the frequency of the piezoelectric ceramic is constant, the frequency of the current that excites the piezoelectric ceramic can be calculated. That is, the on and off times of the MOSFET during the positive pulse current period and the negative pulse current period can be calculated. By controlling the on and off times of the MOSFET through the microprocessor 1, the positive pulse current can be made into multiple narrow pulse currents of different widths, or the positive pulse current can be made into multiple narrow pulse currents of different widths. Then, after passing through the bandpass filter 4, a sinusoidal current of a specific frequency is output to drive the piezoelectric ceramic to vibrate and generate ultrasonic waves.

[0042] It should be noted that in this application, the microprocessor outputs electrical signals to the first IGBT driver 21 and the second IGBT driver 22 1 to 5 times and then pauses, so that the bandpass filter 4 outputs a sinusoidal pulse current to the piezoelectric ceramic, rather than a continuous sinusoidal current, to prevent the return signal generated in the workpiece under test from interfering with the signal emitted by the ultrasonic flaw detection device.

[0043] This application applies to low-frequency ultrasonic flaw detection devices, where the resonant frequency of the piezoelectric ceramic is between 50kHz and 100kHz. Both the first and second IGBTs used are silicon carbide (SiC) IGBTs to facilitate the supply of high-frequency pulsed current to the piezoelectric ceramic.

[0044] In the description of this specification, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

[0045] The above are merely specific embodiments of this utility model, but the protection scope of this utility model is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this utility model should be included within the protection scope of this utility model. Therefore, the protection scope of this utility model should be determined by the scope of the claims.

Claims

1. A digital ultrasonic flaw detection circuit, characterized in that, include: microprocessor; A pulse circuit, electrically connected to a microprocessor, alternately outputs positive pulse current and negative pulse current; A pulse width modulation circuit is electrically connected to the microprocessor and the pulse circuit. The pulse width modulation circuit receives signals from the microprocessor and, under the signal control of the microprocessor, outputs positive pulse current and negative pulse current in multiple pulse currents of different widths. A bandpass filter is electrically connected to the pulse width modulation circuit. The bandpass filter receives multiple pulse currents of different widths and outputs a sinusoidal current at a fixed frequency. An ultrasonic probe, which is electrically connected to the bandpass filter.

2. The digital ultrasonic flaw detection circuit according to claim 1, characterized in that, The pulse circuit includes: A first IGBT driver, wherein the signal terminal of the first IGBT driver is electrically connected to the microprocessor; The first IGBT is an N-type IGBT. The gate of the first IGBT is electrically connected to the first IGBT driver, and the collector of the first IGBT is electrically connected to a high-voltage power supply. The second IGBT driver, the signal terminal of the second IGBT driver is electrically connected to the microprocessor; The second IGBT is a P-type IGBT. The gate of the second IGBT is electrically connected to the second IGBT driver. The emitter of the first IGBT is electrically connected to the emitter of the second IGBT. The collector of the second IGBT is grounded.

3. The digital ultrasonic flaw detection circuit according to claim 2, characterized in that, The pulse width modulation circuit includes a MOS transistor, the gate of which is electrically connected to the microprocessor, the source of which is electrically connected to the junction of the emitters of the first IGBT and the second IGBT, and the drain of which is electrically connected to the bandpass filter.

4. The digital ultrasonic flaw detection circuit according to claim 3, characterized in that, The bandpass filter includes: A first inductor, one end of which is electrically connected to the drain of the MOS transistor, and the other end of which is grounded; A first capacitor, one end of which is electrically connected to the drain of the MOS transistor, and the other end of which is grounded; The second capacitor has one end electrically connected to the drain of the MOS transistor; The second inductor has one end electrically connected to one end of the second capacitor, and the other end of the second inductor is electrically connected to the ultrasonic probe.

5. The digital ultrasonic flaw detection circuit according to any one of claims 1 to 4, characterized in that, The digital ultrasonic flaw detection circuit also includes a power supply, which includes AC power. The digital ultrasonic flaw detection circuit further includes a transformer circuit, a rectifier circuit, a voltage regulator circuit, and a boost circuit. The transformer circuit is electrically connected to the power supply, the rectifier circuit is electrically connected to the transformer circuit, and the voltage regulator circuit and the boost circuit are respectively electrically connected to the rectifier circuit. The voltage regulator circuit provides power for the operation of the microprocessor, the first IGBT driver, and the second IGBT driver, and the output of the boost circuit is a high-voltage power supply.

6. The digital ultrasonic flaw detection circuit according to claim 5, characterized in that, The first IGBT driver includes a non-inverting amplifier circuit, the input terminal of which is electrically connected to the microprocessor, and the output terminal of which is electrically connected to the gate terminal of the first IGBT. The second IGBT driver includes an inverting amplifier circuit, the input terminal of which is electrically connected to the microprocessor, and the output terminal of which is electrically connected to the gate terminal of the second IGBT.

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