An electromagnetic interference detection circuit, wireless network control circuit

Abstract

The utility model discloses a kind of electromagnetic wave interference detection circuit, wireless network control circuit, comprising: inverter component, inverter component includes first input pin and second input pin, first input pin is connected with the power amplifier enable signal output pin of wireless network chip, second input pin is connected with the low noise amplifier enable signal output pin of wireless network chip, inverter component is used for first inverting signal and second inverting signal;With the output end connection of inverter component logic and gate component, logic and gate component includes the third input pin connected with the data path switching signal output pin of wireless network chip, logic and gate component is used for output first inverting signal, second inverting signal and the logic and signal of data path switching signal, as electromagnetic wave interference detection signal. Thus, electromagnetic wave interference condition can be detected in time, and then avoid that wireless terminal cannot normally surf the net through vehicle-mounted hotspot.

Description

Technical Field

[0001] This utility model relates to the field of wireless network technology, and in particular to an electromagnetic interference detection circuit and a wireless network control circuit. Background Technology

[0002] Currently, in vehicle-mounted wireless network communication scenarios, there are situations where electromagnetic interference, such as the use of a wireless charging holder for mobile phones, can cause interference from the electromagnetic waves emitted by wireless charging, ultimately preventing wireless terminals from accessing the internet normally through the vehicle's hotspot.

[0003] Therefore, how to detect electromagnetic interference in a timely manner and thus prevent wireless terminals from being unable to access the Internet normally through the vehicle hotspot is a technical problem that needs to be solved. Utility Model Content

[0004] In view of this, the purpose of this utility model is to provide an electromagnetic interference detection circuit and a wireless network control circuit, which can detect electromagnetic interference in a timely manner, thereby preventing wireless terminals from being unable to access the internet normally through the vehicle hotspot. The specific solution is as follows:

[0005] In a first aspect, this utility model provides an electromagnetic interference detection circuit, comprising:

[0006] An inverter assembly includes a first input pin and a second input pin. The first input pin is connected to the power amplifier enable signal output pin of the wireless network chip, and the second input pin is connected to the low noise amplifier enable signal output pin of the wireless network chip. The wireless network chip is connected to an RF front-end module. The inverter assembly is used to output a first inverted signal corresponding to the power amplifier enable signal and a second inverted signal corresponding to the noise amplifier enable signal.

[0007] A logic AND gate component connected to the output terminal of the inverter component, the logic AND gate component including a third input pin connected to the data path switching signal output pin of the wireless network chip, the logic AND gate component is used to output a logic AND signal of the first inverted signal, the second inverted signal and the data path switching signal as an electromagnetic interference detection signal.

[0008] Optionally, the inverter assembly includes a first inverter and a second inverter, and the AND gate assembly includes a first AND gate and a second AND gate;

[0009] The first inverter includes the first input pin, which is used to output a first inverted signal corresponding to the power amplifier enable signal;

[0010] The second inverter includes the second output pin, which is used to output the second inverted signal corresponding to the noise amplifier enable signal;

[0011] The first logic AND gate is connected to the output terminals of the first inverter and the second inverter, and is used to output the first inverted signal and the first logic AND signal corresponding to the second inverted signal;

[0012] The second AND gate includes the third input pin and is connected to the output of the first AND gate. It is used to output the first AND signal and the second AND signal corresponding to the data path switching signal as an electromagnetic interference detection signal.

[0013] Optionally, the inverter assembly is a two-input inverter, including a first input pin, a second input pin, a first output terminal, and two output terminals; the AND gate assembly is a three-input AND gate.

[0014] The first output terminal is used to output the first inverted signal corresponding to the power amplifier enable signal;

[0015] The second output terminal is used to output the second inverted signal corresponding to the noise amplifier enable signal;

[0016] The three-input AND gate is connected to the first output terminal and the second output terminal, and includes the third input pin, which is used to output the first inverted signal, the second inverted signal and the data path switching signal corresponding to the AND signal, as an electromagnetic interference detection signal.

[0017] Optional, also includes:

[0018] A capacitor connected to the output of the AND gate component, with the other end of the capacitor grounded.

[0019] Optional, also includes:

[0020] A resistor is connected to the output of the AND gate component, with the other end of the resistor grounded.

[0021] Secondly, this utility model provides a wireless network control circuit, including the aforementioned electromagnetic interference detection circuit and application processor;

[0022] The detection signal output pin of the electromagnetic interference detection circuit is connected to the general-purpose input / output interface of the application processor.

[0023] The application processor is used to receive electromagnetic interference detection signals via the general-purpose input / output interface and to perform channel detection and switching processing.

[0024] Optional, also includes:

[0025] A wireless network chip, connected to the application processor, is used to receive a channel noise intensity collection command output by the application processor and collect the noise intensity of each channel, as well as receive a channel switching command output by the application processor and issue a channel switching announcement to a terminal connected to the wireless network chip.

[0026] Optionally, the wireless network chip is connected to the application processor via a high-speed peripheral component interconnect bus.

[0027] Optional, also includes:

[0028] The radio frequency front-end module, which connects to the wireless network chip, is used to amplify the signal through an internal low-noise amplifier.

[0029] Optionally, the radio frequency front-end module is equipped with an antenna for receiving and transmitting signals.

[0030] As can be seen from the above scheme, this utility model provides an electromagnetic interference detection circuit, including: an inverter assembly, the inverter assembly including a first input pin and a second input pin, the first input pin being connected to the power amplifier enable signal output pin of the wireless network chip, the second input pin being connected to the low noise amplifier enable signal output pin of the wireless network chip, the wireless network chip being connected to an RF front-end module, the inverter assembly being used to output a first inverted signal corresponding to the power amplifier enable signal and a second inverted signal corresponding to the noise amplifier enable signal; and a logic AND gate assembly connected to the output terminal of the inverter assembly, the logic AND gate assembly including a third input pin connected to the data path switching signal output pin of the wireless network chip, the logic AND gate assembly being used to output a logic AND signal of the first inverted signal, the second inverted signal and the data path switching signal as an electromagnetic interference detection signal.

[0031] As can be seen, this utility model processes the power amplifier enable signal, low-noise amplifier enable signal, and data path switching signal output by the wireless network chip connected to the RF front-end module through an inverter component and a logic AND gate component to obtain an electromagnetic interference detection signal. The power amplifier enable signal, low-noise amplifier enable signal, and data path switching signal can reflect the current control mode of the wireless network chip on the RF front-end module, and thus reflect the strength of the received electromagnetic interference signal. In this way, electromagnetic interference can be detected in time, so as to perform channel detection and switching in time, thereby preventing the wireless terminal from being unable to access the Internet normally through the vehicle hotspot. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0033] Figure 1 A schematic diagram of an electromagnetic interference detection circuit provided for an embodiment of this utility model;

[0034] Figure 2 A truth representation of the operating mode of a radio frequency front-end module provided in this embodiment of the present invention;

[0035] Figure 3 A schematic diagram of an electromagnetic interference detection circuit structure provided for an embodiment of this utility model;

[0036] Figure 4 A schematic diagram of another electromagnetic interference detection circuit structure provided in this embodiment of the present invention;

[0037] Figure 5 A schematic diagram of a wireless network control circuit provided in an embodiment of this utility model;

[0038] Figure 6 A schematic diagram of a wireless network control circuit structure provided for an embodiment of this utility model;

[0039] Figure 7 This is a schematic diagram of an application processor provided for an embodiment of the present utility model. Detailed Implementation

[0040] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0041] See Figure 1 As shown, this utility model embodiment discloses an electromagnetic interference detection circuit, including:

[0042] Inverter assembly 11 includes a first input pin and a second input pin. The first input pin is connected to the power amplifier enable signal output pin of the wireless network chip, and the second input pin is connected to the low noise amplifier enable signal output pin of the wireless network chip. The wireless network chip is connected to an RF front-end module. The inverter assembly is used to output a first inverted signal corresponding to the power amplifier enable signal and a second inverted signal corresponding to the noise amplifier enable signal.

[0043] The AND gate component 12, which is connected to the output of the inverter component, includes a third input pin connected to the data path switching signal output pin of the wireless network chip. The AND gate component is used to output a logical AND signal of the first inverted signal, the second inverted signal, and the data path switching signal as an electromagnetic interference detection signal.

[0044] The first input pin is used to receive the power amplifier enable signal, the second input pin is used to receive the low-noise amplifier enable signal, and the third input pin is used to receive the logic AND signal of the data path switching signal. The wireless network chip is connected to an RF front-end module, which is connected to the low-noise amplifier enable signal output pin, the low-noise amplifier enable signal output pin, and the data path switching signal output pin of the wireless network chip. The electromagnetic interference detection circuit includes a detection signal output pin for outputting an electromagnetic interference detection signal; the detection signal output pin is encapsulated in a logic AND gate component.

[0045] Currently, WiFi (wireless network) hardware designs typically employ external FEM (Front-End Module) chips to improve WiFi signal coverage, penetration, and transmission quality. An FEM is an integrated RF module chip that combines a series of RF front-end circuits in Wi-Fi communication, such as power amplifiers (PAs), RF switches, and low-noise amplifiers (LNAs). For example, a VC5450 chip can be used. The FEM chip integrates an LNA, which amplifies weak RF signals. During normal data reception, the RF signal is amplified by the LNA before being analyzed. However, when the received signal is very strong, to prevent signal recognition failure or damage to the RFIC (Radio Frequency Integrated Circuit), the switch above the LNA will activate, entering LNA Bypass mode. Typically, the FEM can enter different modes via external I / O. For example, the truth table for the VC5450 chip's operating modes can be found here. Figure 2 As shown, Figure 2This invention provides a truth table representation of the operating mode of a radio frequency front-end module. Based on the characteristics of the LNA Bypass mode and the truth table of the FEM chip, since this type of I / O (i.e., Input / Output) is directly controlled by the WiFi chip and does not pass through the application processor, the application processor cannot directly determine whether the FEM is in LNA Bypass mode based on the truth table. Therefore, this invention designs a hardware circuit, namely an electromagnetic interference detection circuit, to detect whether the WiFi radio frequency front-end receives a very strong signal.

[0046] In an optional implementation, the inverter assembly includes a first inverter and a second inverter, and the AND gate assembly includes a first AND gate and a second AND gate; the first inverter includes a first input pin for outputting a first inverted signal corresponding to the power amplifier enable signal; the second inverter includes a second output pin for outputting a second inverted signal corresponding to the noise amplifier enable signal; the first AND gate is connected to the outputs of the first inverter and the second inverter, and is used to output a first AND signal corresponding to the first inverted signal and the second inverted signal; the second AND gate includes the third input pin and is connected to the output of the first AND gate, and is used to output the first AND signal and the second AND signal corresponding to the data path switching signal, as an electromagnetic interference detection signal.

[0047] See Figure 3 As shown, Figure 3 This is a schematic diagram of an electromagnetic interference detection circuit provided for a utility model embodiment. The circuit uses two inverters (a first inverter and a second inverter) to invert PA_EN (power amplifier enable signal) and LNA_EN (low-noise amplifier enable signal) and input them to the input of a first AND gate. C_RX (data path switching signal) is directly input to the input of a second AND gate. When the condition !PA_EN∧!LNA_EN∧C_RX = true is met, BYPASS_CHECK (the detection signal output pin) will output a high level. BYPASS_CHECK is connected to the GPIO (General-purpose input / output) port of the application processor, configured as a pull-down input and configured with an external interrupt. When the FEM is in receiving mode and receives a strong signal, the FEM will switch to LNABypass mode. After passing through this circuit, BYPASS_CHECK will output a high level, triggering the GPIO external interrupt of the application processor.

[0048] In an optional implementation, the inverter assembly is a dual-input inverter, including a first input pin, a second input pin, a first output terminal, and two output terminals; the AND gate assembly is a three-input AND gate; the first output terminal is used to output a first inverted signal corresponding to the power amplifier enable signal; the second output terminal is used to output a second inverted signal corresponding to the noise amplifier enable signal; the three-input AND gate is connected to the first output terminal and the second output terminal, and includes the third input pin, used to output a AND signal corresponding to the first inverted signal, the second inverted signal, and the data path switching signal, as an electromagnetic interference detection signal.

[0049] See Figure 4 As shown, Figure 4 This is a schematic diagram of another electromagnetic interference detection circuit structure provided in this application embodiment. U1 is a dual-input inverter, and U2 is a three-input AND gate. PA_EN and LNA_EN are inverted by the dual-input inverter and input to the input terminals A and B of the three-input AND gate. C_RX is directly input to the input terminal C of the three-input AND gate. When the condition !PA_EN∧!LNA_EN∧C_RX = true is met, BYPASS_CHECK will output a high level. BYPASS_CHECK is connected to the GPIO port of the application processor, configured as a pull-down input, and configured as an external interrupt. When the FEM is in receiving mode and receives a very strong signal, the FEM will switch to LNA Bypass mode. After passing through this circuit, BYPASS_CHECK will output a high level, thereby triggering the GPIO external interrupt of the application processor.

[0050] Furthermore, the electromagnetic interference detection circuit also includes a capacitor connected to the output of the AND gate component, with the other end of the capacitor grounded. This capacitor helps prevent signal fluctuations.

[0051] Furthermore, the electromagnetic interference detection circuit also includes a resistor connected to the output of the AND gate component, with the other end of the resistor grounded. The resistor acts as a pull-down resistor, pulled to ground by default. That is, it ensures that the detection signal output pin is initially pulled to ground by default, and then pulled high when the condition is met.

[0052] As can be seen, this embodiment of the utility model processes the power amplifier enable signal, low noise amplifier enable signal, and data path switching signal output by the wireless network chip connected to the RF front-end module through an inverter component and a logic AND gate component to obtain an electromagnetic interference detection signal. The power amplifier enable signal, low noise amplifier enable signal, and data path switching signal can reflect the current control mode of the wireless network chip on the RF front-end module, and thus reflect the strength of the currently received electromagnetic interference signal. In this way, electromagnetic interference can be detected in time, so as to perform channel detection and switching in time, thereby preventing the wireless terminal from being unable to access the Internet normally through the vehicle hotspot.

[0053] Further, see Figure 5 As shown, this utility model embodiment provides a wireless network control circuit, including the electromagnetic interference detection circuit 21 disclosed in the foregoing embodiment and the application processor 22.

[0054] The detection signal output pin of the electromagnetic interference detection circuit 21 is connected to the general-purpose input / output interface of the application processor.

[0055] The application processor 22 is used to receive electromagnetic interference detection signals via the general-purpose input / output interface and perform channel detection and switching processing.

[0056] Furthermore, the wireless network control circuit also includes:

[0057] A wireless network chip, connected to the application processor, is used to receive channel noise intensity collection commands output by the application processor and collect the noise intensity of each channel, as well as to receive channel switching commands output by the application processor and issue channel switching announcements to terminals connected to the wireless network chip. Channel detection involves collecting the noise intensity of each channel.

[0058] In an optional implementation, the wireless network chip and the application processor are connected via a high-speed peripheral component interconnect bus. Other types of buses may also be selected in other embodiments.

[0059] Furthermore, the wireless network control circuit also includes a radio frequency (RF) front-end module connected to the wireless network chip, used to amplify signals via an internal low-noise amplifier. The RF front-end module is equipped with an antenna for receiving and transmitting signals.

[0060] Further, see Figure 6As shown in the diagram, this utility model embodiment discloses a schematic diagram of a wireless network control circuit. The LAN BYPASS detection circuit, also known as the electromagnetic interference detection circuit, detects whether the FEM chip has switched to LAN BYPASS mode, thereby triggering an interrupt in the application processor. It then collects information on various channels around the current WiFi network and assesses whether to avoid interference sources. It can avoid non-WiFi standard interference signals by detecting signal energy intensity.

[0061] The processing logic flow of the application processor is as follows: Figure 7 As shown, see Figure 7 As shown, Figure 7 This is a schematic diagram of an application processor processing according to an embodiment of the present invention. When an external interrupt is triggered, the `iw dev wlan1 survey dump` command is executed to call the driver to collect the noise intensity of all channels. If the noise intensity of other channels is low and the noise of the currently used channel is high, the channel switching process is prepared. During the channel switching process, if another wireless terminal is already connected to this hotspot, a CSA message (Channel Switching Announcement) is sent before updating the channel configuration; otherwise, the channel configuration is updated directly and takes effect. The application processor controls the wireless network chip to collect the noise intensity of the channels.

[0062] In this way, by detecting that the FEM chip is in LNA Bypass mode through hardware circuitry and collecting noise information, the channel is switched to avoid interference sources. This method is not only applicable to the VC5450 FEM chip, but can also be used for any other FEM chip with LNA Bypass functionality and standalone LNA chips. The same principle can be used to detect strong energy signal interference by selecting other logic AND gates and input source signals. Using hardware detection and interrupt triggering to perform noise detection on all channels ensures the timeliness of interference avoidance. Even intermittent and sudden wireless interference can be detected immediately and the channel can be switched. Furthermore, when the terminal is connected to a hotspot, a CSA (Channel Switch Announcement) is executed first to inform the terminal device that a channel switch will occur. The terminal will then switch channels according to the AP (Access Point), ensuring an excellent wireless network experience.

[0063] This application designs a detection circuit for strong energy signal interference from non-Wi-Fi standards. It can quickly respond to the detection of strong energy signals and trigger an interrupt. By collecting noise information from all channels around the hotspot, it comprehensively evaluates whether there is a better channel. If a better channel is found, it issues a CSA (Communication-Assisted Access) notification to inform connected wireless terminals to switch channels with the AP, thereby allowing Wi-Fi wireless communication to avoid interference from strong energy signals from non-Wi-Fi standards. This solves the problem that the currently widely used ACS (Auto Channel Selection) technology cannot detect interference from non-Wi-Fi standards, improving the robustness and stability of in-vehicle hotspot networks.

[0064] The above description of the disclosed embodiments enables those skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An electromagnetic interference detection circuit, characterized in that, include: An inverter assembly includes a first input pin and a second input pin. The first input pin is connected to the power amplifier enable signal output pin of the wireless network chip, and the second input pin is connected to the low noise amplifier enable signal output pin of the wireless network chip. The wireless network chip is connected to an RF front-end module. The inverter assembly is used to output a first inverted signal corresponding to the power amplifier enable signal and a second inverted signal corresponding to the noise amplifier enable signal. A logic AND gate component connected to the output terminal of the inverter component, the logic AND gate component including a third input pin connected to the data path switching signal output pin of the wireless network chip, the logic AND gate component is used to output a logic AND signal of the first inverted signal, the second inverted signal and the data path switching signal as an electromagnetic interference detection signal.

2. The electromagnetic interference detection circuit according to claim 1, characterized in that, The inverter assembly includes a first inverter and a second inverter, and the AND gate assembly includes a first AND gate and a second AND gate; The first inverter includes the first input pin, which is used to output a first inverted signal corresponding to the power amplifier enable signal; The second inverter includes the second input pin, which is used to output the second inverted signal corresponding to the noise amplifier enable signal; The first logic AND gate is connected to the output terminals of the first inverter and the second inverter, and is used to output the first inverted signal and the first logic AND signal corresponding to the second inverted signal; The second AND gate includes the third input pin and is connected to the output of the first AND gate. It is used to output the first AND signal and the second AND signal corresponding to the data path switching signal as an electromagnetic interference detection signal.

3. The electromagnetic interference detection circuit according to claim 1, characterized in that, The inverter assembly is a two-input inverter, including a first input pin, a second input pin, a first output terminal, and a second output terminal; the AND gate assembly is a three-input AND gate. The first output terminal is used to output the first inverted signal corresponding to the power amplifier enable signal; The second output terminal is used to output the second inverted signal corresponding to the noise amplifier enable signal; The three-input AND gate is connected to the first output terminal and the second output terminal, and includes the third input pin, which is used to output the first inverted signal, the second inverted signal and the data path switching signal corresponding to the AND signal, as an electromagnetic interference detection signal.

4. The electromagnetic interference detection circuit according to claim 1, characterized in that, Also includes: A capacitor connected to the output of the AND gate component, with the other end of the capacitor grounded.

5. The electromagnetic interference detection circuit according to claim 1, characterized in that, Also includes: A resistor is connected to the output of the AND gate component, with the other end of the resistor grounded.

6. A wireless network control circuit, characterized in that, Includes the electromagnetic interference detection circuit and application processor as described in any one of claims 1 to 5; The detection signal output pin of the electromagnetic interference detection circuit is connected to the general-purpose input / output interface of the application processor. The application processor is used to receive electromagnetic interference detection signals via the general-purpose input / output interface and to perform channel detection and switching processing.

7. The wireless network control circuit according to claim 6, characterized in that, Also includes: A wireless network chip, connected to the application processor, is used to receive a channel noise intensity collection command output by the application processor and collect the noise intensity of each channel, as well as receive a channel switching command output by the application processor and issue a channel switching announcement to a terminal connected to the wireless network chip.

8. The wireless network control circuit according to claim 7, characterized in that, The wireless network chip is connected to the application processor via a high-speed peripheral component interconnect bus.

9. The wireless network control circuit according to claim 7, characterized in that, Also includes: The radio frequency front-end module, which connects to the wireless network chip, is used to amplify the signal through an internal low-noise amplifier.

10. The wireless network control circuit according to claim 9, characterized in that, The radio frequency front-end module is equipped with an antenna for receiving and transmitting signals.

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