Semiconductor photonic device

Abstract

The utility model provides a kind of semiconductor photon device. Multiple optical waveguide structures are formed in the semiconductor layer of semiconductor photon device, so that optical waveguide structure can realize different physical size and / or configuration. For example, the operation described here enables strip waveguide structure and rib optical waveguide structure to be formed from the same semiconductor layer and in the same process flow. In addition and / or alternatively, rib optical waveguide structures having different slab thicknesses, different ridge portion thicknesses, and / or different combinations of slab thickness and ridge portion thickness can be formed from the same semiconductor layer and in the same process flow. This enables the functions performed by the optical waveguide structures to be optimized to achieve low insertion loss in the semiconductor photon device, high modulation efficiency in the semiconductor photon device, and / or lower power consumption in the semiconductor photon device, among other examples.

Description

Technical Field

[0001] The embodiments of this utility model relate to a semiconductor photonic device. Background Technology

[0002] Semiconductor photonic devices can be configured to use optical signals for high-speed and secure data transmission between integrated circuitry and / or semiconductor chips within the device. The optical signals can be transmitted through waveguide structures within the semiconductor photonic device. These waveguide structures confine the optical signals, reducing optical loss and improving propagation efficiency. Data can be encoded into the optical signals by modulating the light into optical pulses using an optical modulator. These optical pulses are then transmitted through the waveguide structure to propagate to other areas of the semiconductor photonic device. Utility Model Content

[0003] This invention provides a semiconductor photonic device, comprising: a first ribbed optical waveguide structure, including a first plate-shaped portion and a first ridge portion, wherein the first ridge portion has a first vertical thickness; and a second ribbed optical waveguide structure optically coupled to the first ribbed optical waveguide structure, wherein the second ribbed optical waveguide structure includes a second plate-shaped portion and a second ridge portion, wherein the second ridge portion has a second vertical thickness, and wherein the first vertical thickness and the second vertical thickness are different vertical thicknesses.

[0004] This invention provides a semiconductor photonic device, comprising: a first ribbed optical waveguide structure, including a first plate-shaped portion and a first ridge portion, wherein the first ridge portion has a first vertical thickness; a second ribbed optical waveguide structure optically coupled to the first ribbed optical waveguide structure, the second ribbed optical waveguide structure including a second plate-shaped portion and a second ridge portion, wherein the second ridge portion has a second vertical thickness; and a strip-shaped optical waveguide structure optically coupled to at least one of the first ribbed optical waveguide structure and the second ribbed optical waveguide structure, wherein the strip-shaped optical waveguide structure has a third vertical thickness, and wherein the first vertical thickness is different from at least one of the second vertical thickness and the third vertical thickness. Attached Figure Description

[0005] The best understanding of the features of this disclosure will be achieved by reading the following detailed description in conjunction with the accompanying drawings. It should be noted that, according to industry standard practice, the various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or decreased for clarity of explanation.

[0006] Figure 1A and Figure 1B This is a diagram of the example semiconductor photonic device described in this article.

[0007] Figures 2A to 2Q This is a diagram of an example embodiment of the semiconductor photonic device described herein.

[0008] Figure 3A and Figure 3B This is a diagram of the example semiconductor photonic device described in this article.

[0009] Figure 4A and Figure 4B This is a diagram of the example semiconductor photonic device described in this article.

[0010] Figure 5A and Figure 5B This is a diagram of the example semiconductor photonic device described in this article.

[0011] Figures 6A to 6N This is a diagram of an example embodiment of the semiconductor photonic device described herein.

[0012] Figure 7 This is an example process flow diagram related to the formation of photonic integrated circuits for the semiconductor photonic device described herein. Detailed Implementation

[0013] This disclosure provides numerous different embodiments or instances for implementing various features of this disclosure. Specific examples of components and arrangements are described below to simplify this disclosure. Of course, these are merely examples and are not intended to be limiting. For example, the following description of a first feature formed on or on a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, thereby preventing direct contact between the first and second features. Furthermore, reference numerals and / or letters may be repeated throughout this disclosure in various examples. Such repetition is for simplicity and clarity and does not in itself indicate a relationship between the various embodiments and / or configurations discussed.

[0014] Furthermore, for ease of explanation, this document may use spatially relative terms such as “beneath,” “below,” “lower,” “above,” “upper,” and similar expressions to describe the relationship between one device or feature shown in the figures and another device or feature. These spatially relative terms are intended to encompass different orientations of the device in use or operation, in addition to those shown in the figures. The device may have other orientations (rotated 90 degrees or in other orientations), and the spatially relative descriptions used herein can be interpreted accordingly.

[0015] Multiple optical waveguide structures can be formed in semiconductor photonic devices to perform various functions. Some optical waveguide structures can be configured to facilitate the propagation of optical signals in photonic integrated circuits. Some optical waveguide structures can be included in optical modulator structures and configured to modulate optical signals. Some optical waveguide structures can be configured as optical splitters, which are configured to separate optical signals into multiple optical signals. Some optical waveguide structures can be included in photodetector structures and configured to generate current based on received optical signals.

[0016] Optical waveguide structures can be formed from the semiconductor layers of a semiconductor photonic device. While forming multiple optical waveguide structures in a semiconductor photonic device allows for the integration of the fabrication process and enables the implementation of various types of photonic integrated circuits within the device, forming optical waveguide structures with identical physical dimensions and configurations can lead to insertion loss, reduced modulation efficiency, and / or increased power consumption for certain functions performed by the optical waveguide structures.

[0017] In some embodiments described herein, multiple optical waveguide structures are formed within the semiconductor layer of a semiconductor photonic device. The formation of the optical waveguide structures allows for different physical dimensions and / or configurations. For example, the operations described herein allow strip waveguide structures and ribbed optical waveguide structures to be formed from the same semiconductor layer and in the same fabrication process. Furthermore and / or alternatively, the operations described herein allow ribbed optical waveguide structures with different slab thicknesses, different ridge thicknesses, and / or different combinations of slab and ridge thicknesses to be formed from the same semiconductor layer and in the same fabrication process. This allows the functionality performed by the optical waveguide structures in the examples to be optimized to achieve low insertion loss, high modulation efficiency, and / or low power consumption in semiconductor photonic devices, etc.

[0018] Figure 1A and Figure 1B This is an illustration of the example semiconductor photonic device 100 described herein. Figure 1A A top view of the semiconductor photonic device 100 in the xy plane is shown. Figure 1A As shown, the semiconductor photonic device 100 is a semiconductor device including a photonic integrated circuit 102. The photonic integrated circuit 102 may include various semiconductor photonic elements, such as a rib optical waveguide structure 104, a rib optical waveguide structure 106, a strip optical waveguide structure 108 and / or a rib optical waveguide structure 110, and other examples.

[0019] In some embodiments, two or more of the ribbed waveguide structures 104, ribbed waveguide structures 106, strip optical waveguide structures 108, and / or ribbed waveguide structures 110 may be formed from the same semiconductor layer of the semiconductor photonic device 100. In these embodiments, transition regions may be included between two or more of the ribbed waveguide structures 104, ribbed waveguide structures 106, strip optical waveguide structures 108, and / or ribbed waveguide structures 110.

[0020] For example, ribbed waveguide structure 104 and ribbed waveguide structure 106 may be formed from the same semiconductor layer, and a transition region 112 may be included laterally (e.g., in the x-direction) between ribbed waveguide structure 104 and ribbed waveguide structure 106. In the transition region 112, the arrangement, shape, and / or size of structures in the semiconductor may transition between ribbed waveguide structure 104 and ribbed waveguide structure 106.

[0021] As another example, the ribbed optical waveguide structure 106 and the strip optical waveguide structure 108 may be formed from the same semiconductor layer, and a transition region 114 may be included laterally (e.g., in the x-direction) between the ribbed optical waveguide structure 106 and the strip optical waveguide structure 108. In the transition region 114, the arrangement, shape, and / or size of the structures in the semiconductor may transition between the ribbed optical waveguide structure 106 and the strip optical waveguide structure 108.

[0022] As another example, the strip optical waveguide structure 108 and the rib optical waveguide structure 110 may be formed from the same semiconductor layer, and a transition region 116 may be included laterally (e.g., in the x-direction) between the strip optical waveguide structure 108 and the rib optical waveguide structure 110. In the transition region 116, the arrangement, shape, and / or size of the structures in the semiconductor may transition between the strip optical waveguide structure 108 and the rib optical waveguide structure 110.

[0023] like Figure 1A As further shown, each of the ribbed optical waveguide structure 104, ribbed optical waveguide structure 106, strip optical waveguide structure 108, and ribbed optical waveguide structure 110 includes a ridge section 118. The ridge section 118 (sometimes referred to as the core section or rib section) may extend continuously along the x-direction in the semiconductor photonic device 100 between two or more of the ribbed optical waveguide structures 104, ribbed optical waveguide structure 106, strip optical waveguide structure 108, and / or ribbed optical waveguide structure 110.

[0024] like Figure 1AAs further shown, ribbed waveguide structures 104, 106, and 110 each include slab sections 120a and 120b on opposite sides of a ridge 118 along the y-direction in the semiconductor photonic device 100. Therefore, each of the ribbed waveguide structures 104, 106, and 110 includes a combination of slab sections 120a and 120b and a ridge 118. Slab sections 120a and 120b can extend along the x-direction. However, the strip optical waveguide structure 108 only includes the ridge 118, and slab sections 120a and 120b are omitted from the strip optical waveguide structure 108. Therefore, the slab sections 120a and 120b in the transition regions 114 and 116 are tapered along the x-direction in the y-direction. In other words, the lateral width of the plate-like portions 120a and 120b in the y-direction varies along the x-direction in the transition regions 114 and 116.

[0025] like Figure 1A As further shown, the ribbed waveguide structure 104, ribbed waveguide structure 106, strip optical waveguide structure 108, and ribbed waveguide structure 110 may each include end portions 122a and 122b on opposite sides of the ridge portion 118 in the y-direction. End portions 122a and 122b may extend in the x-direction. In some embodiments, end portion 122a may be coupled to plate portion 120a, and end portion 122b may be coupled to plate portion 120b. End portions 122a and 122b may be portions in the photonic integrated circuit 102 that provide electrical connections to the ribbed waveguide structure 104, ribbed waveguide structure 106, and / or ribbed waveguide structure 110.

[0026] Figure 1B This example shows a cross-sectional view of the semiconductor photonic device 100 in the y-direction, for example along... Figure 1A Cross-sectional view of the semiconductor photonic device 100 along the AA line, along Figure 1A Cross-sectional view of the semiconductor photonic device 100 along the BB line. Figure 1A Cross-sectional view of the semiconductor photonic device 100 along the CC line, Figure 1A Cross-sectional view of the semiconductor photonic device 100 along the DD line. Figure 1A Cross-sectional view of the semiconductor photonic device 100 along the EE line, along Figure 1A A cross-sectional view of the semiconductor photonic device 100 along the mid-FF line, and along... Figure 1ACross-sectional view of semiconductor photonic device 100 along line GG. Cross-sectional view along line AA is cross-sectional view of ribbed optical waveguide structure 104. Cross-sectional view along line BB is cross-sectional view of transition region 112. Cross-sectional view along line CC is cross-sectional view of ribbed optical waveguide structure 106. Cross-sectional view along line DD is cross-sectional view of transition region 114. Cross-sectional view along line EE is cross-sectional view of strip optical waveguide structure 108. Cross-sectional view along line FF is cross-sectional view of transition region 116. Cross-sectional view along line GG is cross-sectional view of ribbed optical waveguide structure 110.

[0027] like Figure 1B As shown, ribbed waveguide structure 104, ribbed waveguide structure 106, striped waveguide structure 108, and / or ribbed waveguide structure 110 may be included in dielectric region 124. Etch stop layer 126 may be included over dielectric region 124, and another dielectric region 128 may be included over etch stop layer 126. Dielectric region 124, etch stop layer 126, and dielectric region 128 may each contain one or more dielectric materials. Examples of such dielectric materials include oxides (e.g., silicon oxide (SiO2)). x ) and / or other oxide materials), undoped silicate glass (USG), borosilicate glass (BSG), fluorine-doped silicate glass (FSG), extremely low dielectric constant (ELK) dielectric materials with a dielectric constant less than about 2.5, silicon nitride (Si) x N y ), silicon carbide (SiC), silicon oxynitride (SiON) and / or other suitable dielectric materials.

[0028] As described above, the ribbed optical waveguide structure 104, ribbed optical waveguide structure 106, strip optical waveguide structure 108, and / or ribbed optical waveguide structure 110 can be formed from the same semiconductor layer of the semiconductor photonic device 100. The ribbed optical waveguide structure 104, ribbed optical waveguide structure 106, strip optical waveguide structure 108, and / or ribbed optical waveguide structure 110 may contain one or more semiconductor materials, such as silicon (Si), doped silicon, germanium (Ge), silicon-germanium (SiGe), group III-V semiconductor materials, and / or other suitable semiconductor materials. Furthermore and / or alternatively, one or more of the ribbed optical waveguide structures 104, ribbed optical waveguide structure 106, strip optical waveguide structure 108, and / or ribbed optical waveguide structure 110 may be formed from a dielectric layer and may contain the aforementioned one or more dielectric materials and / or other suitable dielectric materials.

[0029] like Figure 1BAs further shown, the ribbed waveguide structure 104, ribbed waveguide structure 106, strip optical waveguide structure 108, ribbed waveguide structure 110, and associated transition regions 112, 114, and 116 may each have one or more dimensions. Two or more of the ribbed waveguide structures 104, ribbed waveguide structure 106, strip optical waveguide structure 108, and / or ribbed waveguide structure 110 may have different dimensions (e.g., different ridge portion dimensions, different plate portion dimensions), and the transition regions 112, 114, and / or 116 may provide a transition between the different dimensions of the ribbed waveguide structures 104, ribbed waveguide structure 106, strip optical waveguide structure 108, and / or ribbed waveguide structure 110.

[0030] like Figure 1B As shown, end portions 122a and 122b may each have a dimension D1 corresponding to the vertical (z-direction) thickness of end portions 122a and 122b. The ridge portion 118 of the ribbed waveguide structure 106, the ridge portion 118 of the striped waveguide structure 108, the ridge portion 118 of the ribbed waveguide structure 110, and the ridge portions 118 of the transition regions 114 and 116 may each have approximately the same vertical (z-direction) thickness as the end portions 122a and 122b, corresponding to dimension D1. In some embodiments, dimension D1 is contained in the range of approximately 250 nanometers to approximately 350 nanometers. However, other values ​​and ranges of dimension D1 are also covered within the scope of this disclosure.

[0031] like Figure 1B As further shown, the ridge portion 118 of the ribbed waveguide structure 104 has a dimension D2 corresponding to the vertical (z-direction) thickness of the ridge portion 118 of the ribbed waveguide structure 104. The vertical (z-direction) thickness of the ridge portion 118 of the ribbed waveguide structure 104 may be less than the vertical (z-direction) thickness of the ridge portion 118 of the ribbed waveguide structure 106. Similarly, the vertical (z-direction) thickness of the ridge portion 118 of the ribbed waveguide structure 104 may be less than the vertical (z-direction) thickness of the ridge portion 118 of the strip optical waveguide structure 108 and the ribbed waveguide structure 110. In some embodiments, the dimension D2 is contained in the range of about 150 nanometers to about 250 nanometers. However, other values ​​and ranges of the dimension D2 are also covered within the scope of this disclosure.

[0032] The ridge portion 118 of the rib-shaped optical waveguide structure 104 has a small vertical (z-direction) thickness (for example, D2<D1), which can provide higher modulation efficiency in embodiments where the rib-shaped optical waveguide structure 104 is included in an optical modulator structure (such as examples like a micro-ring modulator (MRM) or a Mach-Zehnder modulator (MZM)). In particular, the small vertical (z-direction) thickness of the ridge portion 118 of the rib-shaped optical waveguide structure 104 can increase the overlap between the optical mode of the optical signal propagating through the optical modulator structure and the p-n junction of the optical modulator structure (which mainly occupies the ridge portion 118 of the rib-shaped optical waveguide structure 104), thereby improving the modulation efficiency of the optical modulator structure. The ridge portion 118 of the rib-shaped optical waveguide structure 110 has a large vertical (z-direction) thickness (for example, D1>D2), which can provide a larger area for forming an absorption region in the ridge portion 118 in embodiments where the rib-shaped optical waveguide structure 110 is included in a photodetector structure. This can increase the full well capacity of the photodetector structure, thereby improving its sensitivity and range.

[0033] In the transition region 112 between the rib-shaped optical waveguide structure 104 and the rib-shaped optical waveguide structure 106, a tapered portion 130 (for example, a tapered transition portion) is provided on the ridge portion 118 of the transition region 112. The lateral (y-direction) width of the tapered portion 130 gradually increases from the rib-shaped optical waveguide structure 104 to the rib-shaped optical waveguide structure 106. The taper of the tapered portion 130 provides an adiabatic transition between the small vertical (z-direction) thickness (dimension D2) of the ridge portion 118 of the rib-shaped optical waveguide structure 104 and the large vertical (z-direction) thickness (dimension D1) of the ridge portion 118 of the rib-shaped optical waveguide structure 106, with little or no optical loss. Therefore, the combined vertical (z-direction) thickness of the ridge portion 118 and the tapered portion 130 of the transition region 112 is approximately equal to the vertical (z-direction) thickness of the ridge portion 118 of the rib-shaped optical waveguide structure 106 (for example, approximately equal to dimension D1).

[0034] As Figure 1B further shown, the slab portions 120a and 120b of the rib-shaped optical waveguide structure 104, the rib-shaped optical waveguide structure 106, the transition region 112 and the transition region 114 may each have a dimension D3 corresponding to the z-direction of the slab portions 120a and 120b. In some embodiments, the dimension D3 is in the range of about 30 nanometers to about 90 nanometers. However, other values and ranges for the dimension D3 are also included within the scope of the present disclosure.

[0035] As Figure 1BAs further shown, the plate-like portions 120a and 120b of the rib-shaped optical waveguide structure 110 and the transition region 116 may each have a dimension D4 corresponding to the z-direction of the plate-like portions 120a and 120b. The smaller vertical (z-direction) thickness of the plate-like portions 120a and 120b of the rib-shaped optical waveguide structures 104 and 106 may be less than the vertical (z-direction) thickness of the plate-like portions 120a and 120b of the rib-shaped optical waveguide structure 110 (e.g., D3<D4). In some embodiments, the dimension D4 is in the range of about 50 nanometers to about 100 nanometers. However, other values and ranges for dimension D4 are also included within the scope of the present disclosure.

[0036] The smaller vertical (z-direction) thickness of the plate-like portions 120a and 120b of the rib-shaped optical waveguide structure 104 (e.g., D3<D4) may provide higher modulation efficiency in embodiments where the rib-shaped optical waveguide structure 104 is included in an optical modulator structure. In particular, the smaller vertical (z-direction) thickness of the plate-like portions 120a and 120b of the rib-shaped optical waveguide structure 104 may provide greater optical confinement for optical signals to the ridge portion 118 of the rib-shaped optical waveguide structure 104, which may increase the overlap between the optical mode of the optical signal propagating through the optical modulator structure and the p-n junction of the optical modulator structure, thereby improving the modulation efficiency of the optical modulator structure. The larger vertical (z-direction) thickness of the plate-like portions 120a and 120b of the rib-shaped optical waveguide structure 110 (e.g., D4>D3) may provide a larger area for current flow from the absorption region in the plate-like portions 120a and 120b in embodiments where the rib-shaped optical waveguide structure 110 is included in a photodetector structure. This may reduce the resistance between the absorption region and the end portions 122a and 122b through the plate-like portions 120a and 120b, thereby possibly improving the efficiency of the photodetector structure.

[0037] As described above, provided Figure 1A and Figure 1B are taken as examples. Other examples may differ from those described with respect to Figure 1A and Figure 1B the description provided.

[0038] Figures 2A to 2Q is a diagram of an example embodiment 200 for forming the semiconductor photonic device 100 described herein. In some embodiments, one or more operations described in relation to Figures 2A to 2Q may be performed to form another semiconductor photonic device described herein, for example, the semiconductor photonic device 300 described in relation to Figure 3A and Figure 3B , the semiconductor photonic device 400 described in relation to Figure 4A and Figure 4B , and / or described in relation to Figure 5A and Figure 5BThe related description includes a semiconductor photonic device 500, and other examples. In some embodiments, one or more semiconductor processing tools can be used to perform operations related to... Figures 2A to 2Q The related description includes one or more operations, such as deposition tools, exposure tools, development tools, etching tools, planarization tools, ion implantation tools, annealing tools, and / or wafer / die transport tools, as well as other examples.

[0039] Turn Figure 2A A substrate 202 may be provided. The substrate 202 may include a silicon-on-insulator (SOI) substrate comprising a base layer 204 (e.g., a silicon (Si) substrate and / or another type of semiconductor substrate), a portion of a dielectric region 124 (e.g., a buried oxide or bottom oxide (BOX) layer and / or another type of insulating layer) on and / or above the base layer 204, and a semiconductor layer 206 (e.g., a silicon (Si) layer and / or another type of semiconductor layer) on and / or above the portion of the dielectric region 124. Alternatively, the base layer 204 may be provided as a semiconductor wafer, and the portion of the dielectric region 124 may be formed on and / or above the base layer 204 using deposition tools, and the semiconductor layer 206 may be formed on and / or above the portion of the dielectric region 124. This portion of the dielectric region 124 can be deposited using deposition tools employing chemical vapor deposition (CVD), physical vapor deposition (PVD), oxidation techniques (e.g., thermal oxidation), and / or another type of deposition technique. A semiconductor layer 206 can be formed using epitaxial technology and / or another type of deposition technique. The vertical (z-direction) thickness of the semiconductor layer 206 can be formed or provided corresponding to dimension D1.

[0040] like Figure 2A As further shown, a mask layer 208 may be formed on the semiconductor layer 206. The mask layer 208 may include a hard mask layer and / or another type of layer that can be patterned and used for etching the semiconductor layer 206. The mask layer 208 may include one or more dielectric materials, such as silicon nitride (Si). x N y Silicon carbide (SiC), silicon oxynitride (SiON), and / or aluminum oxide (Al) x O y(e.g., Al2O3), and other examples. The mask layer 208 can be deposited using deposition tools employing PVD, atomic layer deposition (ALD), CVD, and / or another suitable deposition technique. The mask layer 208 may be deposited in one or more deposition operations. In some embodiments, a planarization operation (e.g., chemical-mechanical planarization (CMP)) can be performed on the mask layer 208 after deposition using planarization tools to planarize the mask layer 208.

[0041] like Figure 2B and Figure 2C As shown, a first patterning and etching process can be performed, using a mask layer 208 to etch a semiconductor layer 206 to form various semiconductor photonic elements from the semiconductor layer 206. For example, the mask layer 208 can be used to etch the semiconductor layer 206 to form ribbed optical waveguide structures 104, ribbed optical waveguide structures 106, strip optical waveguide structures 108, ribbed optical waveguide structures 110, and / or associated transition regions 112, 114, and 116. In some embodiments, a photoresist layer can be patterned and used to transfer a pattern to the mask layer 208, and the semiconductor layer 206 can be etched using a pattern in the mask layer 208. In some embodiments, a photoresist layer can be patterned and used to etch the mask layer 208 and the semiconductor layer 206 based on a pattern in the photoresist layer.

[0042] like Figure 2B and Figure 2C As shown, the ribbed optical waveguide structure 104, ribbed optical waveguide structure 106, strip optical waveguide structure 108, ribbed optical waveguide structure 110, and / or associated transition regions 112, 114, and 116 can each be formed to include a ridge portion 118, plate-shaped portions 120a and 120b located on both sides of the ridge portion 118 in the y-direction, and end portions 122a and 122b respectively laterally adjacent to the plate-shaped portions 120a and 120b in the y-direction. Furthermore, the transition region 112 can be formed to include a tapered portion 130 located above the ridge portion 118.

[0043] like Figure 2CAs shown, the masking layer 208 is retained over the end portions 122a and 122b of the ribbed waveguide structure 104, the ribbed waveguide structure 106, the strip optical waveguide structure 108, the ribbed waveguide structure 110 and / or the associated transition regions 112, 114 and 116, such that the end portions 122a and 122b retain a vertical (z-direction) thickness corresponding to dimension D1 after the first patterning and etching process. Similarly, the masking layer 208 remains above the tapered portion 130 of the transition region 112 and the ridge portions 118 of the strip optical waveguide structure 108, the rib optical waveguide structure 110 and / or the associated transition regions 112, 114 and 116, such that the tapered portion 130 of the transition region 112 and the ridge portions 118 of the strip optical waveguide structure 108, the rib optical waveguide structure 110 and / or the associated transition regions 112, 114 and 116 retain a vertical (z-direction) thickness corresponding to dimension D1 after the first patterning and etching process.

[0044] However, in the first patterning and etching process, a portion of the mask layer 208 is removed from above the ridge portions 118 of the ribbed waveguide structures 104 and 106, and from above the plate-like portions 120a and 120b of the ribbed waveguide structures 104, 106, 108, 110, and the associated transition regions 112, 114, and 116. This allows the ridge portions 118 of the ribbed waveguide structures 104 and 106, and the plate-like portions 120a and 120b of the ribbed waveguide structures 104, 106, 108, 110, and the associated transition regions 112, 114, and 116, to be formed to a vertical (z-direction) thickness corresponding to dimension D2. In other words, the vertical (z-direction) thickness of the ridge portion 118 of the ribbed optical waveguide structures 104 and 106 can be less than the vertical (z-direction) thickness of the ridge portion 118 of the ribbed optical waveguide structure 106, the strip optical waveguide structure 108, the ribbed optical waveguide structure 110 and / or the associated transition regions 112, 114 and 116.

[0045] The first patterning operation of the first patterning and etching process may include forming a pattern in the mask layer 208. A photoresist layer may be formed on the mask layer 208 using a deposition tool (e.g., using spin coating and / or other suitable deposition techniques). The photoresist layer may be patterned by exposing it to a radiation source using an exposure tool. A portion of the photoresist layer may be developed and removed using a development tool to expose the pattern. The mask layer 208 may be etched based on the pattern using an etching tool to transfer the pattern to the mask layer 208.

[0046] The first etching operation of the first patterning and etching process may include etching the semiconductor layer 206 based on the pattern in the mask layer 208. In some embodiments, the first etching operation includes a dry etching operation (e.g., a plasma-based etching operation, a gas-based etching operation), a wet chemical etching operation, and / or other types of etching operations. In some embodiments, the remaining portion of the photoresist layer may be removed using a photoresist removal tool (e.g., using a chemical stripper, plasma ashing, and / or other techniques).

[0047] like Figure 2D and Figure 2E As shown, a patterned masking layer 210 is formed on the semiconductor photonic device 100. (As illustrated...) Figure 2D As shown, the patterned masking layer 210 can be formed on the ridge portion 118 of the ribbed waveguide structure 104, on the ridge portion 118 and the tapered portion 130 of the transition region 112, on the ridge portion 118 and a portion of the plate-like portions 120a and 120b of the transition region 116, and on the ridge portion 118 and the plate-like portions 120a and 120b of the ribbed waveguide structure 110. The patterned masking layer 210 can be formed to be tapered in the y-direction along the x-direction in the transition region 116.

[0048] like Figure 2E As shown, the patterned mask layer 210 can be part of a multilayer mask formed on the semiconductor photonic device 100 after a first patterning and etching process. The multilayer mask can be formed as part of a second patterning operation in a second patterning and etching process performed after the first patterning and etching process. The multilayer mask may include a mask layer 212 on the semiconductor photonic device 100, a mask layer 214 on the mask layer 212, and a patterned mask layer 210 on the mask layer 214.

[0049] The multilayer mask may include multiple layers of photoresist stacked together. Patterned mask layer 210 may include a photoresist layer stacked with multiple layers of photoresist, mask layer 212 may include a photoresist underlayer stacked with multiple layers of photoresist, and mask layer 214 may include a photoresist intermediate layer stacked with multiple layers of photoresist. In some embodiments, each mask layer 212 and 214 is deposited using a deposition tool employing a spin coating technique. In some embodiments, each mask layer 212 and 214 is deposited using a deposition tool employing physical vapor deposition, atomic layer deposition, chemical vapor deposition, and / or other suitable deposition techniques.

[0050] The patterned mask layer 210 can be deposited as a photoresist layer, and the photoresist layer can be exposed to a radiation source using an exposure tool to pattern the photoresist layer, thereby forming the patterned mask layer 210. A portion of the photoresist layer can be developed and removed using a development tool to expose the pattern in the patterned mask layer 210.

[0051] like Figure 2E As shown, the patterned masking layer 210 may be included on the ribbed waveguide structure 104, the ribbed waveguide structure 110, and the ridge portions 118 of the transition regions 112 and 116. The patterned masking layer 210 may also be included on the plate-like portions 120a and 120b and the end portions 122a and 122b of the ribbed waveguide structure 110. The patterned masking layer 210 may also be included on portions of the plate-like portions 120a and 120b of the transition region 116. Patterning the patterned masking layer 210 may remove portions of the patterned masking layer 210 on the ribbed waveguide structure 106, the strip-like optical waveguide structure 108, and the transition region 114. Furthermore, patterning the patterned masking layer 210 may remove portions of the patterned masking layer 210 on the plate-like portions 120a and 120b and the end portions 122a and 122b of the ribbed waveguide structure 104 and the transition region 112.

[0052] like Figure 2F As shown, the second patterning operation may further include transferring a pattern from the patterned mask layer 210 to the mask layer 214. In some embodiments, the mask layer 214 may be etched using an etching tool based on the pattern in the patterned mask layer 210 to transfer the pattern from the patterned mask layer 210 to the mask layer 214. In some embodiments, the etching operation includes dry etching operations (e.g., plasma-based etching operations, gas-based etching operations), wet chemical etching operations, and / or other types of etching operations. In some embodiments, the remaining portion of the patterned mask layer 210 may be removed using a photoresist removal tool (e.g., using a chemical stripper, plasma ashing, and / or other techniques).

[0053] like Figure 2G As shown, the second patterning operation may further include transferring a pattern from mask layer 214 to mask layer 212. In some embodiments, an etching tool may be used to etch mask layer 212 based on the pattern in mask layer 214 to transfer the pattern from mask layer 214 to mask layer 212. In some embodiments, the etching operation includes dry etching operations (e.g., plasma-based etching operations, gas-based etching operations), wet chemical etching operations, and / or other types of etching operations.

[0054] Parts of shielding layers 212 and 214 may remain over the ridge portions 118 of the ribbed waveguide structure 104, the ribbed waveguide structure 110, the transition region 112, and the transition region 116. Parts of shielding layers 212 and 214 may remain over the plate-like portions 120a and 120b of the ribbed waveguide structure 110, and over portions of the plate-like portions 120a and 120b of the transition region 116. Parts of shielding layers 212 and 214 may remain over the end portions 122a and 122b of the ribbed waveguide structure 110. Parts of shielding layers 212 and 214 may remain over the tapered portion 130 of the transition region 112.

[0055] like Figure 2H and Figure 2I As shown, the second etching operation of the second patterning and etching process may include etching the semiconductor layer 206 based on the pattern in mask layers 212 and 214. In some embodiments, the second etching operation includes a dry etching operation (e.g., a plasma-based etching operation, a gas-based etching operation), a wet chemical etching operation, and / or other types of etching operations. Figure 2H As shown, in the second etching operation, the semiconductor layer 206 can be etched to form laterally tapered plates 120a and 120b in the transition region 116. The plates 120a and 120b can be tapered in the y-direction along the x-direction in the transition region 116. The plates 120a and 120b can increase their lateral width in the y-direction from the strip-shaped optical waveguide structure 108 to the rib-shaped optical waveguide structure 110 along the x-direction.

[0056] like Figure 2I As shown, in the second etching operation, the semiconductor layer 206 can be etched to reduce the vertical (z-direction) thickness of the plate-like portions 120a and 120b of the ribbed optical waveguide structure 104, the ribbed optical waveguide structure 106, the strip optical waveguide structure 108, the transition region 112, and the transition region 114 from dimension D2 to dimension D3. Furthermore, in the second etching operation, the semiconductor layer 206 can be etched to reduce the vertical (z-direction) thickness of a portion of the plate-like portions 120a and 120b of the transition region 116 from dimension D2 to dimension D3.

[0057] The masking layers 208, 212, and / or 214 protect the ridge portions 118 and end portions 122a and 122b of the ribbed waveguide structures 104, 106, 108, 110, and the associated transition regions 112, 114, and 116 from etching during the second etching operation. Therefore, the ribbed waveguide structures 104, 106, 108, 110, and the end portions 122a and 122b of the associated transition regions 112, 114, and 116 retain a vertical (z-direction) thickness corresponding to dimension D1 after the second etching operation. Furthermore, the ridge portion 118 of the ribbed waveguide structure 104 and the transition region 112 retains a vertical (z-direction) thickness corresponding to dimension D2 after the second etching operation. Furthermore, the ribbed optical waveguide structure 106, the strip optical waveguide structure 108, the ribbed optical waveguide structure 110, and the ridge portion 118 of the transition regions 114 and 116 retain a thickness corresponding to dimension D1 in the vertical (z-direction) after the second etching operation. The tapered portion 130 of the transition region 112 also retains a thickness corresponding to dimension D1 in the vertical (z-direction) after the second etching operation.

[0058] Furthermore, the masking layers 212 and 214 protect the plate-shaped portions 120a and 120b of the ribbed waveguide structure 110 from being etched during the second etching operation. Therefore, the plate-shaped portions 120a and 120b of the ribbed waveguide structure 110 retain a vertical (z-direction) thickness corresponding to dimension D2 after the second etching operation.

[0059] Masking layer 214 may be consumed during the second etching operation. The remaining portion of masking layer 212 may be subsequently removed after the second etching operation. In some embodiments, the remaining portion of masking layer 212 is removed by plasma ashing, etching, and / or other removal techniques.

[0060] like Figure 2J and Figure 2K As shown, a third patterning and etching process can be performed to etch plate-like portions 120a and 120b of the strip optical waveguide structure 108 and the transition region 114. The third patterning operation of the third patterning and etching process may include forming a mask layer 216 on the semiconductor photonic device 100 and forming a pattern in the mask layer 216. The third etching operation of the third patterning and etching process may include etching the plate-like portions 120a and 120b of the strip optical waveguide structure 108 and the transition region 114 based on the pattern in the mask layer 216 to remove the plate-like portions 120a and 120b from a portion of the strip optical waveguide structure 108 and the transition region 114.

[0061] A mask layer 216 can be formed on the semiconductor photonic device 100 using a deposition tool (e.g., using spin coating and / or other suitable deposition techniques). The mask layer 216 can be exposed to a radiation source using an exposure tool to pattern the mask layer 216. A portion of the mask layer 216 can be developed and removed using a development tool to expose the pattern. A portion of the mask layer 216 may remain on the ribbed waveguide structure 104, the ribbed waveguide structure 106, and the transition regions 112 and 114. The semiconductor layer 206 can be etched based on the pattern in the mask layer 216 using an etching tool. In some embodiments, the etching operation includes dry etching operations (e.g., plasma-based etching operations, gas-based etching operations), wet chemical etching operations, and / or other types of etching operations.

[0062] like Figure 2J As shown, the third etching operation creates a lateral tapered shape in the plate-shaped portions 120a and 120b in the transition region 114. The plate-shaped portions 120a and 120b can be tapered in the y-direction along the x-direction in the transition region 114. The plate-shaped portions 120a and 120b can increase the lateral width in the y-direction from the strip-shaped optical waveguide structure 108 to the rib-shaped optical waveguide structure 106 along the x-direction.

[0063] like Figure 2K As shown, in the third etching operation, the mask layer 216 protects a portion of the ribbed waveguide structure 104, the ribbed waveguide structure 106, the transition region 112, and the transition region 114. Furthermore, in the third etching operation, the vertical (z-direction) thickness of the plate-like portions 120a and 120b of the ribbed waveguide structure 110 and the transition region 116 decreases from dimension D2 to dimension D5. Dimension D5 can be larger than dimension D3 and can be contained in the range of approximately 120 nanometers to approximately 150 nanometers. However, other values ​​and ranges of dimension D5 are also within the scope of this disclosure.

[0064] like Figure 2L As shown, the remaining portion of the mask layer 216 can be removed after the third etching operation using a photoresist removal tool (e.g., using a chemical stripper, plasma ashing, and / or other techniques).

[0065] like Figure 2M and Figure 2NAs shown, a fourth patterning and etching process can be performed to etch the plate-like portions 120a and 120b of the ribbed optical waveguide structure 110 and the transition region 116. The fourth patterning operation of the fourth patterning and etching process may include forming a mask layer 218 on the semiconductor photonic device 100 and forming a pattern in the mask layer 218. The fourth etching operation of the third patterning and etching process may include etching the plate-like portions 120a and 120b of the ribbed optical waveguide structure 110 and the transition region 116 based on the pattern in the mask layer 218 to reduce the vertical (z-direction) thickness of the plate-like portions 120a and 120b of the ribbed optical waveguide structure 110 and the transition region 116 from dimension D5 to dimension D4.

[0066] A mask layer 218 can be formed on the semiconductor photonic device 100 using a deposition tool (e.g., using spin coating and / or other suitable deposition techniques). The mask layer 218 can be patterned by exposing it to a radiation source using an exposure tool. A portion of the mask layer 218 can be developed and removed using a development tool to expose the pattern. A portion of the mask layer 218 may remain over the ribbed waveguide structure 104, the ribbed waveguide structure 106, the striped waveguide structure 108, and the transition regions 112 and 114. A portion of the mask layer 218 may also remain over the end portions 122a and 122b (or a portion thereof) of the ribbed waveguide structure 110 and the transition region 116.

[0067] The semiconductor layer 206 can be etched using an etching tool based on a pattern in the mask layer 218. In some embodiments, the etching operation includes dry etching operations (e.g., plasma-based etching operations, gas-based etching operations), wet chemical etching operations, and / or other types of etching operations.

[0068] like Figure 2M As shown, the fourth etching operation forms a lateral tapered shape in the plate-shaped portions 120a and 120b in the transition region 116. In the transition region 116, the plate-shaped portions 120a and 120b may be tapered in the y-direction along the x-direction. The plate-shaped portions 120a and 120b may increase their lateral width in the y-direction from the strip-shaped optical waveguide structure 108 to the rib-shaped optical waveguide structure 110 along the x-direction.

[0069] like Figure 2N As shown, in the fourth etching operation, the mask layer 218 protects a portion of the ribbed waveguide structure 104, the ribbed waveguide structure 106, the transition region 112, and the transition region 114. Furthermore, in the fourth etching operation, the vertical (z-direction) thickness of the plate-like portions 120a and 120b of the ribbed waveguide structure 110 and the transition region 116 decreases from dimension D5 to dimension D4.

[0070] like Figure 2OAs shown, the remaining portion of the mask layer 218 can be removed after the third etching operation using a photoresist removal tool (e.g., using a chemical stripper, plasma ashing, and / or other techniques).

[0071] like Figure 2P As shown, portions of end portions 122a and 122b can be etched to define the lateral widths of end portions 122a and 122b and provide regions adjacent to end portions 122a and 122b in which shallow trench isolation (STI) portions of dielectric regions 124 can be formed. In some embodiments, patterns in a photoresist layer are used to etch end portions 122a and 122b. In these embodiments, a photoresist layer can be formed on the semiconductor photonic device 100 using a deposition tool (e.g., using spin coating and / or other suitable deposition techniques). An exposure tool can be used to expose the photoresist layer to a radiation source to pattern the photoresist layer. A development tool can be used to develop and remove portions of the photoresist layer to expose the pattern. An etching tool can be used to etch end portions 122a and 122b based on the pattern. In some embodiments, the etching operation includes dry etching operations (e.g., plasma-based etching operations, gas-based etching operations), wet chemical etching operations, and / or other types of etching operations. In some embodiments, a photoresist removal tool can be used to remove the remaining portions of the photoresist layer (e.g., using chemical strippers, plasma ashing, and / or other techniques). In some embodiments, a hard mask layer is used as an alternative technique to pattern-based etching of the end portions 122a and 122b.

[0072] like Figure 2Q As shown, a planarization operation (e.g., CMP operation) can be performed using a planarization tool to remove the remaining portion of the mask layer 208 from the semiconductor photonic device 100. The STI portion of the dielectric region 124 can be deposited using PVD, atomic layer deposition, chemical vapor deposition, oxidation, and / or other suitable deposition techniques using deposition tools. The STI portion of the dielectric region 124 may be deposited in one or more deposition operations. In some embodiments, a planarization operation (e.g., CMP operation) can be performed using a planarization tool after the deposition of the dielectric region 124 to planarize the dielectric region 124.

[0073] As mentioned above, Figures 2A to 2Q This is provided as one or more examples. Other examples may be related to... Figures 2A to 2Q The descriptions are different.

[0074] Figure 3A and Figure 3B This is a diagram of the example semiconductor photonic device 300 described herein. Figure 3A and Figure 3BAs shown, the semiconductor photonic device 300 includes a photonic integrated circuit 302, which comprises a combination and arrangement of layers and structures similar to those of the photonic integrated circuit 102 of the semiconductor photonic device 100. However, in the semiconductor photonic device 300, the ribbed optical waveguide structure 104 of the semiconductor photonic device 300 is included in the optical modulator structure 304 of the photonic integrated circuit 302. The optical modulator structure 304 can be configured to modulate an optical signal to generate a modulated optical signal. The optical modulator structure 304 may include a microring modulator (MRM), a Mach-Zehnder modulator (MZM), and / or other types of optical modulator structures.

[0075] Rib-shaped optical waveguide structure 106, strip-shaped optical waveguide structure 108, and / or rib-shaped optical waveguide structure 110 may be configured to provide optical signals to and / or receive modulated optical signals from optical modulator structure 304. In some embodiments, strip-shaped optical waveguide structure 108 is configured as a splitter structure (or polarizer-splitter-rotator (PSR) waveguide) that splits the optical signal before it is provided to optical modulator structure 304.

[0076] like Figure 3B As shown, various regions of the ribbed waveguide structure 106 may be doped to form pn junctions in the ridge portion 118 of the ribbed waveguide structure 106. For example, a pn junction may be formed at the interface between doped regions 306 and 308 in the ridge portion 118 of the ribbed waveguide structure 106. Doped regions 306 and 308 may comprise semiconductor materials (e.g., silicon (Si) and / or other suitable semiconductor materials) doped with opposite dopant types. For example, doped region 306 may be doped with one or more p-type dopants (e.g., boron (B) and / or gallium (Ga), and other examples), while doped region 308 may be doped with one or more n-type dopants (e.g., phosphorus (P) and / or arsenic (As), and other examples).

[0077] Other regions of the rib-shaped optical waveguide structure 106 may be doped to facilitate the flow of electrons and / or holes between the p-n junction in the ridge portion 118 and the end portions 122a and 122b through the plate-like portions 120a and 120b. For example, the doped region 310 may be included in the plate-like portion 120a and the end portion 122a, and the doped region 312 may be included in the plate-like portion 120b and the end portion 122b. In another example, the doped region 314 may be included in the end portion 122a, and the doped region 316 may be included in the end portion 122b. The doped region 310 may have a higher dopant concentration than the doped region 306, and the doped region 314 may have a higher dopant concentration than the doped region 310. The doped region 312 may have a higher dopant concentration than the doped region 308, and the doped region 316 may have a higher dopant concentration than the doped region 312.

[0078] When an electrical input signal is applied to the p-n junction of the optical modulator structure 404, the junction depletion width of the p-n junction is modified. This results in a change in the concentration of electrons and holes within the ridge portion 118 of the rib-shaped optical waveguide structure 104. The change in the concentration of electrons and holes may lead to a change in the effective refractive index in the ridge portion 118, which may modulate the input optical signal (e.g., the phase and / or other characteristics of the input optical signal) to generate a modulated optical signal.

[0079] As Figure 1B described, the ridge portion 118 of the rib-shaped optical waveguide structure 104 may have a smaller vertical (z-direction) thickness (e.g., D2<D1) than the vertical (z-direction) thickness of the ridge portions 118 of the rib-shaped optical waveguide structures 106 and 110. In addition, the plate-like portions 120a and 120b of the rib-shaped optical waveguide structure 104 may have a smaller vertical (z-direction) thickness (e.g., D3<D4) than the vertical (z-direction) thickness of the plate-like portions 120a and 120b of the rib-shaped optical waveguide structure 110. The smaller vertical (z-direction) thickness of the ridge portion 118 and the smaller vertical (z-direction) thickness of the plate-like portions 120a and 120b of the rib-shaped optical waveguide structure 104 may increase the overlap between the optical mode of the optical signal propagating through the optical modulator structure 304 and the p-n junction of the optical modulator structure 304 (corresponding to the junction between the doped regions 306 and 308 in the ridge portion 118). The increased overlap improves the modulation efficiency of the optical modulator structure 304, as the optical mode of the optical signal overlaps with the depletion region of the p-n junction, which modifies the refractive index of the ridge portion 118 (thereby modifying the optical signal propagating through the ridge portion 118).

[0080] Metal silicide layers 318 and 320 may be included on the end portions 122a and 122b of the ribbed optical waveguide structure 104. Metal silicide layers 318 and 320 may each comprise titanium silicide (TiSi), ruthenium silicide (RuSi), nickel silicide (NiSi), cobalt silicide (CoSi), and / or other types of metal silicide materials. Metal silicide layers 318 and 320 provide a transition between the semiconductor material of the ribbed optical waveguide structure 104 and the contact structures 322 and 324 formed on the end portions 122a and 122b of the ribbed optical waveguide structure 104, respectively. Metal silicide layers 318 and 320 enable low contact resistance between the contact structures 322 and 324 and the end portions 122a and 122b of the ribbed optical waveguide structure 104.

[0081] In some embodiments, contact structures 322 and 324 may each comprise one or more conductive materials, such as tungsten (W), cobalt (Co), ruthenium (Ru), titanium (Ti), aluminum (Al), copper (Cu), and / or gold (Au), as well as other examples of conductive materials. Contact structures 322 and 324 may each comprise through-holes, contact plugs, trenches, and / or other types of conductive structures.

[0082] Contact structures 322 and 324 may be electrically and / or physically coupled to one or more metallization layers 326 in dielectric region 128. Metallization layers 326 correspond to circuitry enabling the provision and / or reception of signals and / or power to and / or from other devices in optical modulator structure 304 and / or semiconductor photonic device 300. Each metallization layer 326 may each comprise one or more conductive materials, such as tungsten (W), cobalt (Co), ruthenium (Ru), titanium (Ti), aluminum (Al), copper (Cu), and / or gold (Au), as well as other examples of conductive materials. Each metallization layer 326 may each comprise vias, trenches, contact plugs, conductive pads, conductive pillars, and / or other types of metallization layers.

[0083] As mentioned above, Figure 3A and Figure 3B Provided as an example. Other examples may be related to... Figure 3A and Figure 3B The descriptions are different.

[0084] Figure 4A and Figure 4B This is a diagram of the example semiconductor photonic device 400 described in this article. Figure 4A and Figure 4BAs shown, the semiconductor photonic device 400 includes a photonic integrated circuit 402, which comprises a combination and arrangement of layers and structures similar to those of the photonic integrated circuit 102 of the semiconductor photonic device 100. However, in the semiconductor photonic device 400, a ribbed optical waveguide structure 110 is included within a photodetector structure 404 of the photonic integrated circuit 402. The photodetector structure 404 can be configured to generate an electrical output (e.g., current, voltage) based on an optical signal received at the photodetector structure 404. The ribbed optical waveguide structure 104, the ribbed optical waveguide structure 106, and / or the strip optical waveguide structure 108 can be configured to provide an optical signal to the photodetector structure 404.

[0085] The photodetector structure 404 may include an absorption region 406, which is contained on the ridge portion 118 of the ribbed optical waveguide structure 110. The absorption region 406 is configured to convert photons of a received optical signal into electrons. The number of electrons generated may be based on the number of photons absorbed in the absorption region 406. Therefore, the magnitude of the electrical output generated by the photodetector structure 404 may be based on the intensity of the optical signal received by the photodetector structure 404. Electrons propagate through plate-like portions 120a and 120b to end portions 122a and 122b, which correspond to the collection regions of the electrons generated by the absorption region 406.

[0086] Absorption region 406 may include an epitaxially grown semiconductor material region, including germanium (Ge), germanium-tin (GeSn), silicon-germanium (SiGe), indium gallium arsenide (InGaAs), and / or gallium arsenide (GaAs), among others. Photons of the optical signal received by the photodetector structure 404 interact with electron-hole pairs in the semiconductor material of absorption region 406. This interaction causes electrons and holes to separate and migrate toward opposing end portions 122a and 122b (e.g., opposing collection regions), thereby generating an electric field (e.g., a built-in electric field).

[0087] Regions of the ribbed waveguide structure 110 may be doped to facilitate the flow of electrons and / or holes between the absorption region 406 in the ridge portion 118 and the end portions 122a and 122b through the plate portions 120a and 120b. For example, a doped region 408 may be included in the ridge portion 118, the plate portion 120a, and the end portion 122a, while a doped region 410 may be included in the ridge portion 118 and the plate portion 120b. As another example, a doped region 412 may be included in the plate portion 120a and the end portion 122a, while a doped region 414 may be included in the plate portion 120b and the end portion 122b. As another example, a doped region 416 may be included in the end portion 122a, while a doped region 418 may be included in the end portion 122b. The doped region 412 may have a higher doping concentration than the doped region 408, and the doped region 416 may have a higher doping concentration than the doped region 412. Doped region 414 may have a higher doping concentration than doped region 410, and doped region 418 may have a higher doping concentration than doped region 414.

[0088] like Figure 1B As described in the related description, the ridge portion 118 of the ribbed waveguide structure 110 may have a greater vertical (z-direction) thickness than the ridge portion 118 of the ribbed waveguide structure 104 (e.g., D1 > D2). Furthermore, the plate portions 120a and 120b of the ribbed waveguide structure 110 may have a greater vertical (z-direction) thickness than the plate portions 120a and 120b of the ribbed waveguide structure 104 (e.g., D4 > D3). The larger vertical (z-direction) thickness of the ridge portion 118 of the ribbed waveguide structure 104 can provide a larger area for forming the absorption region 406 within the ridge portion 118. The larger size of the absorption region 406 can increase the potential well capacity of the photodetector structure, thereby improving its sensitivity and range.

[0089] The larger vertical (z-direction) thickness of the plate-shaped portions 120a and 120b of the ribbed waveguide structure 104 provides a larger area within these portions, allowing electrons and holes to flow from the absorption region 406 through the plate-shaped portions 120a and 120b to the end portions 122a and 122b. This enables low resistance between the absorption region 406 and the end portions 122a and 122b, thereby improving the efficiency of the photodetector structure.

[0090] Metal silicide layers 420 and 422 may be included on the end portions 122a and 122b of the ribbed optical waveguide structure 110, respectively. Metal silicide layers 420 and 422 may each comprise titanium silicide (TiSi), ruthenium silicide (RuSi), and / or other types of metal silicide materials. Metal silicide layers 420 and 422 provide a transition between the semiconductor material of the ribbed optical waveguide structure 110 and the contact structures 424 and 426 formed on the end portions 122a and 122b of the ribbed optical waveguide structure 110, respectively. Metal silicide layers 420 and 422 enable low contact resistance between the contact structures 424 and 426 and the end portions 122a and 122b of the ribbed optical waveguide structure 110.

[0091] In some embodiments, contact structures 424 and 426 may each comprise one or more conductive materials, such as tungsten (W), cobalt (Co), ruthenium (Ru), titanium (Ti), aluminum (Al), copper (Cu), and / or gold (Au), as well as other examples of conductive materials. Contact structures 424 and 426 may each comprise through-holes, contact plugs, trenches, and / or other types of conductive structures.

[0092] Contact structures 424 and 426 may be electrically and / or physically coupled to one or more metallization layers 428 in dielectric region 128. Metallization layers 428 correspond to enabling signals and / or power to be provided to and / or received from other devices in photodetector structure 404 and / or semiconductor photonic device 400. Each metallization layer 428 may each comprise one or more conductive materials, such as tungsten (W), cobalt (Co), ruthenium (Ru), titanium (Ti), aluminum (Al), copper (Cu), and / or gold (Au), as well as other examples of conductive materials. Each metallization layer 428 may each comprise vias, trenches, contact plugs, conductive pads, conductive pillars, and / or other types of metallization layers.

[0093] As mentioned above, Figure 4A and Figure 4B Provided as an example. Other examples may be related to... Figure 4A and Figure 4B The description differs. In other embodiments, the ribbed optical waveguide structure 110 may be implemented as a phase shifter, an optical modulator structure, and / or other photonic elements.

[0094] Figure 5A and Figure 5B This is a diagram of the example semiconductor photonic device 500 described in this article. Figure 5A and Figure 5BAs shown, the semiconductor photonic device 500 includes a photonic integrated circuit 502, which comprises a combination and arrangement of layers and structures similar to those of the photonic integrated circuit 102 of the semiconductor photonic device 100. However, in the semiconductor photonic device 500, the ribbed optical waveguide structure 104 is included in the optical modulator structure 304 of the photonic integrated circuit 502, while the ribbed optical waveguide structure 110 is included in the photodetector structure 404 of the photonic integrated circuit 502.

[0095] Rib-shaped optical waveguide structure 106 and / or strip-shaped optical waveguide structure 108 may be configured to provide an optical signal between optical modulator structure 304 and photodetector structure 404. Optical modulator structure 304 and photodetector structure 404 may be included in the semiconductor photonic device 500 to facilitate optical communication between regions of the semiconductor photonic device 500 (e.g., intra-die optical communication). In some embodiments, the semiconductor photonic device 500 includes additional optical waveguide structures and / or other photonic elements.

[0096] As mentioned above, Figure 5A and Figure 5B Provided as an example. Other examples may be related to... Figure 5A and Figure 5B The descriptions are different.

[0097] Figures 6A to 6N This is a diagram of an example embodiment 600 of the semiconductor photonic device 500 described herein. In some embodiments, it is possible to perform with... Figures 6A to 6N The described one or more operations can be linked to form another semiconductor photonic device described herein, such as semiconductor photonic device 100, semiconductor photonic device 300, and / or semiconductor photonic device 400, etc. In some embodiments, one or more semiconductor processing tools can be used to perform the operations described herein. Figures 6A to 6N Link to one or more operations described, such as deposition tools, exposure tools, development tools, etching tools, planarization tools, ion implantation tools, annealing tools, and / or wafer / die transport tools, etc.

[0098] like Figure 6A As shown, executable with Figures 2A to 2Q One or more operations described herein are linked to form ribbed optical waveguide structure 104, ribbed optical waveguide structure 106, strip optical waveguide structure 108, ribbed optical waveguide structure 110, and associated transition regions 112, 114 and 116.

[0099] like Figure 6BAs shown, a portion of the ribbed waveguide structure 104 of the optical modulator structure 304 may be doped to form a doped region 308. Additionally and / or alternatively, a portion of the ribbed waveguide structure 110 of the photodetector structure 404 may be doped to form a doped region 410. In some embodiments, doped regions 308 and 410 may be doped with an n-type dopant. In some embodiments, doped regions 308 and 410 may be doped with another type of dopant, such as a p-type dopant.

[0100] In some embodiments, ions are implanted into the ribbed waveguide structures 104 and 110 using an ion implantation tool to form doped regions 308 and 410, respectively. In these embodiments, dopant ions (e.g., n-type ions, p-type ions) are accelerated toward and implanted into the ribbed waveguide structures 104 and 110 to form doped regions 308 and 410, respectively. In some embodiments, another doping technique (e.g., diffusion) is used to form the doped regions 308 and / or 410.

[0101] In some embodiments, an implanted photomask can be formed and patterned on the semiconductor photonic device 500 to facilitate doping of specific portions of the ribbed waveguide structures 104 and 110. For example, an implanted photomask can be used to dope a portion of the ridge portion 118 of the ribbed waveguide structures 104 and 110. As another example, an implanted photomask can be used to dope the plate-like portion 120b of the ribbed waveguide structures 104 and 110. Yet another example, an implanted photomask can be used to dope at least a portion of the end portion 122b of the ribbed waveguide structures 104 and 110.

[0102] like Figure 6C As shown, another portion of the ribbed waveguide structure 104 of the optical modulator structure 304 may be doped to form a doped region 312. Furthermore and / or alternatively, another portion of the ribbed waveguide structure 110 of the photodetector structure 404 may be doped to form a doped region 414. In some embodiments, doped regions 312 and 414 may be doped with the same type of dopant as doped regions 308 and 410. For example, doped regions 312 and 414 may each be doped with an n-type dopant, similar to doped regions 308 and 410. Alternatively, doped regions 312 and 414 may be doped with another type of dopant, such as a p-type dopant. The doping concentration of doped region 312 may be greater than that of doped region 308, and / or the doping concentration of doped region 414 may be greater than that of doped region 410.

[0103] In some embodiments, ions are implanted into the ribbed waveguide structures 104 and 110 using an ion implantation tool to form doped regions 312 and 414, respectively. In these embodiments, dopant ions (e.g., n-type ions, p-type ions) are accelerated toward and implanted into the ribbed waveguide structures 104 and 110 to form doped regions 312 and 414, respectively. In some embodiments, another doping technique (e.g., diffusion) may be used to form doped regions 312 and / or 414.

[0104] In some embodiments, an implantation mask may be formed and patterned on the semiconductor photonic device 500 to facilitate doping of specific portions of the ribbed waveguide structures 104 and 110. For example, the implantation mask may be used to dope portions of the plate-like portion 120b and the end portion 122b of the ribbed waveguide structures 104 and 110. In some embodiments, an annealing operation is performed before, during, and / or after the dopant is implanted into the doped regions 312 and 414 using an annealing tool.

[0105] like Figure 6D As shown, another portion of the ribbed waveguide structure 104 of the optical modulator structure 304 can be doped to form a doped region 306. In some embodiments, the doped region 306 can be doped with a dopant of a different type than that of the doped regions 308 and 312. For example, the doped region 306 can be doped with a p-type dopant, while the doped regions 308 and 312 can be doped with an n-type dopant. As another example, the doped region 306 can be doped with an n-type dopant, while the doped regions 308 and 312 can be doped with a p-type dopant.

[0106] In some embodiments, ions are implanted into the ribbed waveguide structure 104 using an ion implantation tool to form a doped region 306. In these embodiments, dopant ions (e.g., n-type ions, p-type ions) are accelerated toward the ribbed waveguide structure 104 and implanted into the ribbed waveguide structure 104 to form the doped region 306. In some embodiments, another doping technique (e.g., diffusion) may be used to form the doped region 306.

[0107] In some embodiments, an implanted photomask may be formed and patterned on the semiconductor photonic device 500 to facilitate doping of specific portions of the ribbed waveguide structure 104. For example, an implanted photomask may be used to dope a portion of the ridge portion 118 of the ribbed waveguide structure 104. As another example, an implanted photomask may be used to dope the plate-like portion 120a of the ribbed waveguide structure 104. Yet another example, an implanted photomask may be used to dope at least a portion of the end portion 122a of the ribbed waveguide structure 104.

[0108] like Figure 6EAs shown, another portion of the ribbed waveguide structure 110 of the photodetector structure 404 can be doped to form a doped region 408. In some embodiments, the doped region 408 can be doped with a dopant of a different type than that of the doped regions 410 and 414. For example, the doped region 408 can be doped with a p-type dopant, while the doped regions 410 and 414 can be doped with an n-type dopant. As another example, the doped region 408 can be doped with an n-type dopant, while the doped regions 410 and 414 can be doped with a p-type dopant.

[0109] In some embodiments, ions are implanted into the ribbed waveguide structure 110 using an ion implantation tool to form a doped region 408. In these embodiments, dopant ions (e.g., n-type ions, p-type ions) are accelerated toward the ribbed waveguide structure 110 and implanted into the ribbed waveguide structure 110 to form the doped region 408. In some embodiments, another doping technique (e.g., diffusion) may be used to form the doped region 408.

[0110] In some embodiments, an implanted photomask may be formed and patterned on the semiconductor photonic device 500 to facilitate doping of specific portions of the ribbed waveguide structure 110. For example, an implanted photomask may be used to dope a portion of the ridge portion 118 of the ribbed waveguide structure 110. As another example, an implanted photomask may be used to dope the plate-like portion 120a of the ribbed waveguide structure 110. Yet another example, an implanted photomask may be used to dope at least a portion of the end portion 122a of the ribbed waveguide structure 110.

[0111] like Figure 6F As shown, another portion of the ribbed waveguide structure 104 of the optical modulator structure 304 may be doped to form a doped region 310. Furthermore and / or alternatively, another portion of the ribbed waveguide structure 110 of the photodetector structure 404 may be doped to form a doped region 412. In some embodiments, doped regions 310 and 412 may be doped with the same type of dopant as doped regions 306 and 408. For example, doped regions 310 and 412 may each be doped with a p-type dopant, similar to doped regions 306 and 408. Alternatively, doped regions 310 and 412 may be doped with another type of dopant, such as an n-type dopant. The doping concentration of doped region 310 may be greater than the doping concentration of doped region 306, and / or the doping concentration of doped region 412 may be greater than the doping concentration of doped region 408.

[0112] In some embodiments, ions are implanted into ribbed waveguide structures 104 and 110, respectively, using an ion implantation tool to form doped regions 310 and 412. In these embodiments, doped ions (e.g., n-type ions, p-type ions) are accelerated toward and implanted into the ribbed waveguide structures 104 and 110 to form doped regions 310 and 412, respectively. In some embodiments, another doping technique (e.g., diffusion) may be used to form doped regions 310 and / or 412.

[0113] In some embodiments, an implantation mask may be formed and patterned on the semiconductor photonic device 500 to facilitate doping of specific portions of the ribbed waveguide structures 104 and 110. For example, the implantation mask may be used to dope portions of the plate-like portion 120a and the end portion 122a of the ribbed waveguide structures 104 and 110. In some embodiments, an annealing operation is performed before, during, and / or after the dopant is implanted into the doped regions 310 and 412 using an annealing tool.

[0114] like Figure 6G As shown, another portion of the ribbed waveguide structure 104 of the optical modulator structure 304 may be doped to form a doped region 316. Furthermore and / or alternatively, another portion of the ribbed waveguide structure 110 of the photodetector structure 404 may be doped to form a doped region 418. In some embodiments, doped regions 316 and 418 may be doped with the same type of dopant as doped regions 308, 312, 410, and 414. For example, doped regions 316 and 418 may each be doped with an n-type dopant, similar to doped regions 308, 312, 410, and 414. Alternatively, doped regions 316 and 418 may be doped with another type of dopant, such as a p-type dopant. The doping concentration of doped region 316 may be greater than the doping concentration of doped regions 308 and 312, and / or the doping concentration of doped region 418 may be greater than the doping concentration of doped regions 410 and 414.

[0115] In some embodiments, ions are implanted into ribbed waveguide structures 104 and 110, respectively, using an ion implantation tool to form doped regions 316 and 418. In these embodiments, dopant ions (e.g., n-type ions, p-type ions) are accelerated toward and implanted into the ribbed waveguide structures 104 and 110 to form doped regions 316 and 418, respectively. In some embodiments, another doping technique (e.g., diffusion) may be used to form doped regions 316 and / or 418.

[0116] In some embodiments, an implantation mask may be formed and patterned on the semiconductor photonic device 500 to facilitate doping of specific portions of the ribbed waveguide structures 104 and 110. For example, the implantation mask may be used to dope portions of the end portions 122b of the ribbed waveguide structures 104 and 110. In some embodiments, an annealing operation is performed before, during, and / or after the dopant is implanted into the doped regions 316 and 418 using an annealing tool.

[0117] like Figure 6G As further shown, another portion of the ribbed waveguide structure 104 of the optical modulator structure 304 may be doped to form a doped region 314. Additionally and / or alternatively, another portion of the ribbed waveguide structure 110 of the photodetector structure 404 may be doped to form a doped region 416. In some embodiments, doped regions 314 and 416 may be doped with the same type of dopant as doped regions 306, 310, 408, and 412. For example, doped regions 314 and 416 may each be doped with a p-type dopant, similar to doped regions 306, 310, 408, and 412. Alternatively, doped regions 314 and 416 may be doped with another type of dopant, such as an n-type dopant. The doping concentration of doped region 314 may be greater than the doping concentration of doped regions 306 and 310, and / or the doping concentration of doped region 416 may be greater than the doping concentration of doped regions 408 and 412.

[0118] In some embodiments, ions are implanted into ribbed waveguide structures 104 and 110 using an ion implantation tool to form doped regions 314 and 416, respectively. In these embodiments, doped ions (e.g., n-type ions, p-type ions) are accelerated toward ribbed waveguide structures 104 and 110 and implanted into them to form doped regions 314 and 418, respectively. In some embodiments, another doping technique (e.g., diffusion) may be used to form doped regions 314 and / or 416.

[0119] In some embodiments, an implantation mask may be formed and patterned on the semiconductor photonic device 500 to facilitate doping of specific portions of the ribbed waveguide structures 104 and 110. For example, the implantation mask may be used to dope portions of the end portions 122a of the ribbed waveguide structures 104 and 110. In some embodiments, an annealing operation is performed before, during, and / or after the dopant is implanted into the doped regions 314 and 416 using an annealing tool.

[0120] like Figure 6HAs shown, a groove 602 can be formed in the ridge portion 118 of the ribbed waveguide structure 110 of the photodetector structure 404. The groove 602 can be formed in portions of the doped regions 408 and 410. In some embodiments, the ridge portion 118 of the ribbed waveguide structure 110 is etched using a pattern in the photoresist layer to form the groove 602. In these embodiments, the photoresist layer can be formed on the semiconductor photonic device 500 using a deposition tool (e.g., using spin coating and / or another suitable deposition technique). The photoresist layer can be exposed to a radiation source using an exposure tool to pattern the photoresist layer. A development tool can be used to develop and remove portions of the photoresist layer to expose the pattern. The ridge portion 118 of the ribbed waveguide structure 110 can be etched based on the pattern using an etching tool to form the groove 602. In some embodiments, the etching operation includes a dry etching operation (e.g., a plasma-based etching operation, a gas-based etching operation), a wet chemical etching operation, and / or another type of etching operation. In some embodiments, the remaining portion of the photoresist layer may be removed using a photoresist removal tool (e.g., using a chemical stripper, plasma ashing, and / or another technique). In some embodiments, a hard mask layer may be used as an alternative technique based on the pattern-forming groove 602.

[0121] like Figure 6I As shown, the groove 602 can be filled with epitaxially grown semiconductor material to form the absorption region 406 of the photodetector structure 404 in the groove 602. The epitaxially grown semiconductor material may differ from the semiconductor material of the ribbed waveguide structure 110. For example, the epitaxially grown semiconductor material may include germanium (Ge), while the semiconductor material of the ribbed waveguide structure 110 may include doped silicon (Si). The semiconductor material of the absorption region 406 can be epitaxially grown using deposition tools via epitaxial techniques. Furthermore and / or alternatively, atomic layer deposition, chemical vapor deposition, and / or another suitable deposition technique can be used to deposit the absorption region 406.

[0122] like Figure 6J As shown, additional material can be formed on the semiconductor photonic device 500, including above the absorption region 406 of the photodetector structure 404. The additional material of the dielectric region 124 can be deposited using deposition tools via physical vapor deposition, atomic layer deposition, chemical vapor deposition, oxidation techniques, and / or another suitable deposition technique.

[0123] like Figure 6KAs shown, the dielectric region 124 can be etched to expose the tops of the end portions 122a and 122b of the ribbed optical waveguide structure 104 of the optical modulator structure 304, and metal silicide layers 318 and 320 can be formed on the end portions 122a and 122b, respectively. Alternatively, the dielectric region 124 can be etched to expose the tops of the end portions 122a and 122b of the ribbed optical waveguide structure 110 of the photodetector structure 404, and metal silicide layers 420 and 422 can be formed on the end portions 122a and 122b, respectively.

[0124] Forming metal silicide layers 318, 320, 420, and / or 422 may include depositing a layer of metallic material (e.g., titanium (Ti), cobalt (Co), ruthenium (Ru), and / or nickel (Ni), among other examples) on the end portions 122a and 122b of the ribbed waveguide structures 104 and / or 110. The metallic material may be deposited using physical vapor deposition, atomic layer deposition, chemical vapor deposition, electroplating, and / or another suitable deposition technique. Annealing may be performed using annealing tools to diffuse the metallic material into the end portions 122a and 122b of the ribbed waveguide structures 104 and / or 110 to form the metal silicide layers 318, 320, 420, and / or 422.

[0125] like Figure 6K As further shown, an etch stop layer 126 can be formed on the dielectric region 124 and the metal silicide layers 318, 320, 420 and / or 422. The etch stop layer 126 can be deposited using deposition tools via physical vapor deposition, atomic layer deposition, chemical vapor deposition and / or another suitable deposition technique.

[0126] like Figure 6L As shown, a portion of the dielectric region 128 may be formed over the etch stop layer 126. This portion of the dielectric region 128 may be deposited using a deposition tool via physical vapor deposition, atomic layer deposition, chemical vapor deposition, and / or another suitable deposition technique. This portion of the dielectric region 128 may be formed in one or more deposition operations. In some embodiments, after depositing this portion of the dielectric region 128, a planarization operation (e.g., a chemical mechanical planarization operation) is performed using a planarization tool to planarize the portion of the dielectric region 128.

[0127] like Figure 6MAs shown, contact structures 322 and 324 may be formed in and / or through dielectric region 128. Contact structures 322 and 324 may pass through etch stop layer 126 and land on metal silicide layers 318 and 320, respectively. Alternatively, contact structures 424 and 426 may be formed in and / or through dielectric region 128. Contact structures 424 and 426 may pass through etch stop layer 126 and land on metal silicide layers 420 and 422, respectively.

[0128] Contact structures 322, 324, 424, and / or 426 may be formed in grooves passing through dielectric region 128 and etch stop layer 126. In some embodiments, a pattern in the photoresist layer is used to etch dielectric region 128 and etch stop layer 126 to form grooves. In these embodiments, a photoresist layer may be formed on dielectric region 128 using a deposition tool (e.g., using spin coating and / or another suitable deposition technique). The photoresist layer may be exposed to a radiation source using an exposure tool to pattern the photoresist layer. A developing tool may be used to develop and remove portions of the photoresist layer to expose the pattern. An etching tool may be used to etch dielectric region 128 and etch stop layer 126 based on the pattern to form grooves. In some embodiments, the etching operation includes dry etching operations (e.g., plasma-based etching operations, gas-based etching operations), wet chemical etching operations, and / or another type of etching operation. In some embodiments, a photoresist removal tool may be used to remove remaining portions of the photoresist layer (e.g., using chemical strippers, plasma ashing, and / or another technique). In some embodiments, a rigid masking layer is used as an alternative to pattern-based groove formation.

[0129] Contact structures 322, 324, 424, and / or 426 can be deposited using deposition tools via CVD, PVD, ALD, electroplating, and / or another suitable deposition technique. Contact structures 322, 324, 424, and / or 426 can be deposited in one or more deposition operations. In some embodiments, a seed layer is first deposited, and then contact structures 322, 324, 424, and / or 426 are deposited on the seed layer. In some embodiments, a liner is first deposited, and then contact structures 322, 324, 424, and / or 426 are deposited on the liner. The liner may include an adhesive liner, a barrier liner, and / or another type of liner, and may include liner materials such as titanium nitride (TiN) and / or tantalum nitride (TaN). In some embodiments, after depositing contact structures 322, 324, 424 and / or 426, a planarization operation (e.g., CMP operation) is performed using a planarization tool to planarize the contact structures 322, 324, 424 and / or 426.

[0130] like Figure 6NAs shown, another portion of the dielectric region 128 may be formed on the etch stop layer 126. The other portion of the dielectric region 128 may be deposited using deposition tools via PVD, ALD, CVD, and / or another suitable deposition technique. The other portion of the dielectric region 128 may be formed in one or more deposition operations. In some embodiments, after depositing the other portion of the dielectric region 128, a planarization operation (e.g., CMP operation) is performed using a planarization tool to planarize the other portion of the dielectric region 128.

[0131] like Figure 6N As further shown, metallization layers 326 and / or 428 may be formed in the dielectric region 128. Grooves may be formed in the dielectric region 128, and metallization layers 326 and / or 428 may be formed in the grooves. One or more metallization layers 326 may be formed such that they fall on the contact structures 322 and / or 324 of the optical modulator structure 304. Additionally and / or alternatively, one or more metallization layers 428 may be formed such that they fall on the contact structures 424 and / or 426 of the photodetector structure 404.

[0132] In some embodiments, a pattern in the photoresist layer is used to etch the dielectric region 128 to form a groove. In these embodiments, a deposition tool can be used to form the photoresist layer on the dielectric region 128 (e.g., using spin coating and / or another suitable deposition technique). An exposure tool can be used to expose the photoresist layer to a radiation source to pattern the photoresist layer. A developing tool can be used to develop and remove portions of the photoresist layer to expose the pattern. An etching tool can be used to etch the dielectric region 128 based on the pattern to form a groove. In some embodiments, the etching operation includes a dry etching operation (e.g., a plasma-based etching operation, a gas-based etching operation), a wet chemical etching operation, and / or another type of etching operation. In some embodiments, a photoresist removal tool can be used to remove the remaining portion of the photoresist layer (e.g., using a chemical stripper, plasma ashing, and / or another technique). In some embodiments, a hard mask layer is used as an alternative technique to pattern-based etching of the dielectric region 128.

[0133] Metallization layers 326 and / or 428 can be deposited using deposition tools via CVD, PVD, ALD, electroplating, and / or another suitable deposition technique. Metallization layers 326 and / or 428 may be deposited in one or more deposition operations. In some embodiments, a seed layer is first deposited, and then metallization layers 326 and / or 428 are deposited on the seed layer. In some embodiments, after depositing metallization layers 326 and / or 428, a planarization operation (e.g., CMP operation) is performed using a planarization tool to planarize metallization layers 326 and / or 428.

[0134] As mentioned above, Figures 6A to 6N Provided as an example only. Other examples may be related to... Figures 6A to 6N The descriptions differ. For example, with Figures 6A to 6N One or more of the operations described herein may be used solely to form the optical modulator structure 304, such as in the semiconductor photonic device 300. As another example, with... Figures 6A to 6N One or more of the operations described herein may be used only to form a photodetector structure 404, such as in a semiconductor photonic device 400.

[0135] Figure 7 This is a flowchart of an example process 700 related to the formation of the photonic integrated circuitry of the semiconductor photonic device described herein. In some embodiments, Figure 7 One or more process blocks are executed using one or more semiconductor processing tools, such as deposition tools, exposure tools, development tools, etching tools, planarization tools, ion implantation tools, annealing tools, wafer / die transport tools, and / or another type of semiconductor processing tool.

[0136] like Figure 7 As shown, process 700 may include performing a first etch operation to etch a semiconductor layer of a semiconductor photonic device to form a first ridge portion of a first rib-shaped optical waveguide structure to a first vertical thickness (block 710). For example, one or more semiconductor processing tools may be used to perform the first etch operation to etch a semiconductor layer (e.g., semiconductor layer 206) of a semiconductor photonic device (e.g., semiconductor photonic device 100, semiconductor photonic device 300, semiconductor photonic device 400, semiconductor photonic device 500) to form a first ridge portion (e.g., ridge portion 118) of a first rib-shaped optical waveguide structure (e.g., rib-shaped optical waveguide structure 104) to a first vertical thickness (e.g., dimension D4), as described herein.

[0137] like Figure 7 As further shown, process 700 may include performing a second etching operation to etch a semiconductor layer to form a first plate-like portion of the first ribbed optical waveguide structure to a second vertical thickness (block 720). For example, one or more semiconductor processing tools may be used to perform the second etching operation to etch a semiconductor layer to form a first plate-like portion (e.g., plate-like portion 120a, plate-like portion 120b) of the first ribbed optical waveguide structure to a second vertical thickness (e.g., dimension D3), as described herein.

[0138] like Figure 7As further shown, process 700 may include performing one or more third etch operations to etch a semiconductor layer to form a second plate-like portion of the second ribbed waveguide structure to a third vertical thickness greater than the second vertical thickness (block 730). For example, one or more semiconductor processing tools may be used to perform one or more third etch operations to etch a semiconductor layer to form a second plate-like portion (e.g., plate-like portion 120a, plate-like portion 120b) of the second ribbed waveguide structure (e.g., ribbed waveguide structure 110) to a third vertical thickness (e.g., dimension D3) greater than the second vertical thickness, as described herein. In some embodiments, the second ribbed waveguide structure includes a second ridge portion (e.g., ridge portion 118) having a fourth vertical thickness (e.g., dimension D1). In some embodiments, the fourth vertical thickness is greater than the first vertical thickness.

[0139] Process 700 may include additional implementations, such as any single implementation or any combination of implementations of one or more other processes described below and / or in conjunction with one or more other processes described elsewhere herein.

[0140] In the first embodiment, performing the second etching operation includes performing the second etching operation while the masking layer (e.g., masking layer 214) covers the second rib-shaped optical waveguide structure.

[0141] In the second embodiment, alone or in combination with the first embodiment, the masking layer includes a first masking layer, and the process 700 includes forming the first masking layer, forming a second masking layer (e.g., patterned masking layer 210) on the first masking layer, and patterning the first masking layer using the second masking layer, wherein performing the second etching operation includes etching a semiconductor layer based on the pattern in the first masking layer to form a first plate-like portion of the first rib-shaped optical waveguide structure to a second vertical thickness.

[0142] In the third embodiment, process 700 includes forming a third masking layer (e.g., masking layer 212) on a semiconductor layer, either alone or in combination with one or more of the first and second embodiments, wherein forming the first masking layer includes forming a first masking layer on the third masking layer.

[0143] In the fourth embodiment, the second etching operation is performed alone or in combination with one or more of the first to third embodiments, including performing the second etching operation when the masking layer (e.g., masking layer 214) covers the first plate-shaped portion of the first rib-shaped optical waveguide structure.

[0144] In the fifth embodiment, performing the first etching operation alone or in combination with one or more of the first to fourth embodiments includes performing the first etching operation to etch the semiconductor layer to form the second plate-like portion to a first vertical thickness, and performing one or more third etching operations includes performing one or more third etching operations to etch the semiconductor layer to reduce the vertical thickness of the second plate-like portion from the first vertical thickness to a third vertical thickness.

[0145] In the sixth embodiment, one or more third etching operations are performed alone or in combination with one or more of the first to fifth embodiments, including performing a fourth etching operation to etch a semiconductor layer to form a second plate-like portion to a fifth vertical thickness (e.g., dimension D5), and performing a fifth etching operation to etch a semiconductor layer to reduce the vertical thickness of the second plate-like portion from the fifth vertical thickness to a third vertical thickness.

[0146] In the seventh embodiment, process 700 includes performing a first etching operation, a second etching operation, and one or more third etching operations, alone or in combination with one or more of the first to sixth embodiments, to etch a semiconductor layer to form a strip optical waveguide structure (e.g., strip optical waveguide structure 108).

[0147] In the eighth embodiment, alone or in combination with one or more of the first to seventh embodiments, process 700 includes performing a first etching operation and a second etching operation to etch a semiconductor layer to form a third ribbed optical waveguide structure (e.g., ribbed optical waveguide structure 106), wherein the third ribbed optical waveguide structure includes a third plate-like portion (e.g., plate-like portion 120a, plate-like portion 120b) having a second vertical thickness, and a third ridge portion (e.g., ridge portion 118) having a fourth vertical thickness.

[0148] although Figure 7 Several example blocks of process 700 are shown, but in some embodiments, process 700 includes... Figure 7 The blocks shown can be compared to more blocks, fewer blocks, different blocks, or blocks with different arrangements. Additionally or alternatively, two or more blocks in process 700 can be executed in parallel.

[0149] In this manner, multiple optical waveguide structures are formed within the semiconductor layer of a semiconductor photonic device. The formation of these optical waveguide structures allows for different physical dimensions and / or configurations. For example, the operations described herein enable strip waveguide structures and ribbed optical waveguide structures to be formed from the same semiconductor layer and in the same fabrication process. Furthermore and / or alternatively, the operations described herein enable ribbed optical waveguide structures with different plate thicknesses, different ridge thicknesses, and / or different combinations of plate and ridge thicknesses to be formed from the same semiconductor layer and in the same fabrication process. This allows the functionality performed by the optical waveguide structures to be optimized to achieve low insertion loss, high modulation efficiency, and / or low power consumption in semiconductor photonic devices, etc.

[0150] As described in more detail above, some embodiments described herein provide a semiconductor photonic device. The semiconductor photonic device includes a first ribbed optical waveguide structure. The first ribbed optical waveguide structure includes a first plate-like portion and a first ridge portion, wherein the first ridge portion has a first vertical thickness. The semiconductor photonic device includes a second ribbed optical waveguide structure optically coupled to the first ribbed optical waveguide structure. The second ribbed optical waveguide structure includes a second plate-like portion and a second ridge portion, wherein the second ridge portion has a second vertical thickness. The first vertical thickness and the second vertical thickness are different vertical thicknesses.

[0151] In some embodiments, the first plate-shaped portion has a third vertical thickness; the second plate-shaped portion has a fourth vertical thickness; and the third vertical thickness and the fourth vertical thickness are different vertical thicknesses. In some embodiments, the first vertical thickness is less than the second vertical thickness; and the third vertical thickness is less than the fourth vertical thickness. In some embodiments, the first plate-shaped portion has a third vertical thickness; the second plate-shaped portion has a fourth vertical thickness; and the third vertical thickness and the fourth vertical thickness are approximately the same vertical thickness. In some embodiments, the first vertical thickness is less than the second vertical thickness. In some embodiments, it further includes: a transition region laterally located between the first rib-shaped waveguide structure and the second rib-shaped waveguide structure, wherein the transition region includes: a third plate-shaped portion having the fourth vertical thickness; a third ridge portion having the first vertical thickness; and a tapered transition portion having the second vertical thickness.

[0152] As described in more detail above, some embodiments described herein provide a method. The method includes performing a first etch operation to etch a semiconductor layer of a semiconductor photonic device to form a first ridge portion of a first ribbed optical waveguide structure to a first vertical thickness. The method includes performing a second etch operation to etch the semiconductor layer to form a first plate-like portion of the first ribbed optical waveguide structure to a second vertical thickness. The method includes performing one or more third etch operations to etch the semiconductor layer to form a second plate-like portion of a second ribbed optical waveguide structure to a third vertical thickness, wherein the third vertical thickness is greater than the second vertical thickness, wherein the second ribbed optical waveguide structure includes a second ridge portion having a fourth vertical thickness, and wherein the fourth vertical thickness is greater than the first vertical thickness.

[0153] In some embodiments, performing the second etching operation includes performing the second etching operation while the masking layer covers the second ribbed waveguide structure. In some embodiments, the masking layer includes a first masking layer; and the method further includes: forming the first masking layer; forming a second masking layer on the first masking layer; and patterning the first masking layer using the second masking layer, wherein performing the second etching operation includes: etching the semiconductor layer based on the pattern in the first masking layer to form the first plate-like portion of the first ribbed waveguide structure to the second vertical thickness. In some embodiments, it further includes: forming a third masking layer on the semiconductor layer, wherein forming the first masking layer includes: forming the first masking layer on the third masking layer. In some embodiments, performing the second etching operation includes performing the second etching operation while the masking layer covers the first plate-like portion of the first ribbed waveguide structure. In some embodiments, performing the first etching operation includes: performing the first etching operation to etch the semiconductor layer to form the second plate-like portion to the first vertical thickness; and performing the one or more third etching operations includes: performing the one or more third etching operations to etch the semiconductor layer, reducing the vertical thickness of the second plate-like portion from the first vertical thickness to the third vertical thickness. In some embodiments, performing the one or more third etching operations includes: performing a fourth etching operation to etch the semiconductor layer to form the second plate-like portion to a fifth vertical thickness; and performing a fifth etching operation to etch the semiconductor layer, reducing the vertical thickness of the second plate-like portion from the fifth vertical thickness to the third vertical thickness. In some embodiments, the method further includes: performing the first etching operation, the second etching operation, and the one or more third etching operations to etch the semiconductor layer to form a strip-shaped optical waveguide structure. In some embodiments, the method further includes: performing the first etching operation and the second etching operation to etch the semiconductor layer to form a third rib-shaped optical waveguide structure, wherein the third rib-shaped optical waveguide structure includes: a third plate-like portion having the second vertical thickness, and a third ridge portion having the fourth vertical thickness.

[0154] As described in more detail above, some embodiments described herein provide a semiconductor photonic device. The semiconductor photonic device includes a first ribbed optical waveguide structure. The first ribbed optical waveguide structure includes a first plate-like portion and a first ridge portion, wherein the first ridge portion has a first vertical thickness. The semiconductor photonic device includes a second ribbed optical waveguide structure optically coupled to the first ribbed optical waveguide structure. The second ribbed optical waveguide structure includes a second plate-like portion and a second ridge portion, wherein the second ridge portion has a second vertical thickness. The semiconductor photonic device includes a strip-shaped optical waveguide structure optically coupled to at least one of the first and second ribbed optical waveguide structures. The strip-shaped waveguide structure has a third vertical thickness. The first vertical thickness differs from at least one of the second and third vertical thicknesses.

[0155] In some embodiments, the device further includes: a first transition region laterally located between the first ribbed optical waveguide structure and the second ribbed optical waveguide structure; and a second transition region laterally located between the second ribbed optical waveguide structure and the strip-shaped optical waveguide structure. In some embodiments, the first transition region includes a fourth ridge portion having a fourth vertical thickness; the second transition region includes a fifth ridge portion having a fifth vertical thickness; and the fourth vertical thickness and the fifth vertical thickness are different thicknesses. In some embodiments, the first ribbed optical waveguide structure is included in the optical modulator structure of the semiconductor photonic device. In some embodiments, the second ribbed optical waveguide structure is included in the photodetector structure of the semiconductor photonic device.

[0156] The terms "approximately" and "substantially" can indicate that the value of a given quantity varies within 5% of that value (e.g., ±1%, ±2%, ±3%, ±4%, ±5%). These values ​​are merely illustrative and are not intended to be limiting. It should be understood that, according to this disclosure, the terms "approximately" and "substantially" can refer to a percentage of a given quantity value as interpreted by someone of ordinary skill in the art to which this disclosure pertains.

[0157] The foregoing has outlined features of several embodiments to enable those skilled in the art to better understand the nature of this disclosure. Those skilled in the art should understand that they can readily use this disclosure as a basis for designing or modifying other processes and structures to achieve the same purposes and / or attain the same advantages as the embodiments described herein. Those skilled in the art should also recognize that such equivalent constructions do not depart from the spirit and scope of this disclosure, and that they can make various changes, substitutions, and modifications thereto without departing from the spirit and scope of this disclosure.

Claims

1. A semiconductor photonic device, characterized in that, include: The first rib-shaped optical waveguide structure includes a first plate-shaped portion and a first ridge portion. The first ridge portion has a first vertical thickness; as well as A second ribbed optical waveguide structure is optically coupled to the first ribbed optical waveguide structure. The second ribbed optical waveguide structure includes a second plate-shaped portion and a second ridge portion. The second ridge portion has a second vertical thickness, and The first vertical thickness and the second vertical thickness are different vertical thicknesses.

2. The semiconductor photonic device according to claim 1, characterized in that, The first plate-shaped portion has a third vertical thickness; The second plate-shaped portion has a fourth vertical thickness; and The third vertical thickness and the fourth vertical thickness are different vertical thicknesses.

3. The semiconductor photonic device according to claim 2, characterized in that, The first vertical thickness is less than the second vertical thickness; and The third vertical thickness is less than the fourth vertical thickness.

4. The semiconductor photonic device according to claim 1, characterized in that, The first plate-shaped portion has a third vertical thickness; The second plate-shaped portion has a fourth vertical thickness; and The third vertical thickness and the fourth vertical thickness are approximately the same vertical thickness.

5. The semiconductor photonic device according to claim 4, characterized in that, The first vertical thickness is less than the second vertical thickness.

6. A semiconductor photonic device, characterized in that, include: The first rib-shaped optical waveguide structure includes a first plate-shaped portion and a first ridge portion. The first ridge portion has a first vertical thickness; A second ribbed optical waveguide structure is optically coupled to the first ribbed optical waveguide structure. The second ribbed optical waveguide structure includes a second plate-shaped portion and a second ridge portion. The second ridge portion has a second vertical thickness; and A strip-shaped optical waveguide structure, optically coupled to at least one of the first rib-shaped optical waveguide structure and the second rib-shaped optical waveguide structure. The strip-shaped optical waveguide structure has a third vertical thickness, and The first vertical thickness is different from at least one of the second vertical thickness and the third vertical thickness.

7. The semiconductor photonic device according to claim 6, characterized in that, Further includes: The first transition region is laterally located between the first rib-shaped optical waveguide structure and the second rib-shaped optical waveguide structure; as well as The second transition region is located laterally between the second rib-shaped optical waveguide structure and the strip-shaped optical waveguide structure.

8. The semiconductor photonic device according to claim 7, characterized in that, The first transition region includes a fourth ridge portion having a fourth vertical thickness; The second transition region includes a fifth ridge portion having a fifth vertical thickness; and The fourth vertical thickness and the fifth vertical thickness are different thicknesses.

9. The semiconductor photonic device according to claim 6, characterized in that, The first rib-shaped optical waveguide structure is included in the optical modulator structure of the semiconductor photonic device.

10. The semiconductor photonic device according to claim 6, characterized in that, The second ribbed optical waveguide structure is included in the photodetector structure of the semiconductor photonic device.

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