Voltage stabilizing circuit and electronic product

Abstract

The utility model provides a kind of voltage stabilizing circuit and electronic product, comprising: linear voltage regulator is used for power supply;Shunt pipe, first end connects power supply, second end connects the output end of linear voltage regulator;Load current detection module, load current is detected;Overcurrent detection module, whether the current on shunt pipe reaches current limit value is detected;Adjustment control module, the output signal of load current detection module and overcurrent detection module is based on and generates the drive signal of shunt pipe;Linear voltage regulator is set in chip, shunt pipe is set outside chip.The voltage stabilizing circuit and electronic product of the utility model can effectively reduce on-chip temperature rise, stabilize chip performance and improve service life;Total load current can be smoothly switched between on-chip linear voltage regulator and external shunt pipe, output voltage can still be maintained stable in switching process;When load jumps from light load to full load rapidly, output has no larger overshoot voltage and can recover to stable rapidly.

Description

Technical Field

[0001] This utility model relates to the field of integrated circuits, and in particular to a voltage regulator circuit and electronic product. Background Technology

[0002] In the System Basic Chip (SBC), the chip has a built-in linear regulator (LDO) to provide power on or off the chip. Due to the small size and high integration of the chip, the LDO has a large load during normal operation, which causes the on-chip temperature to rise rapidly. Sustained high temperature will affect the chip's performance or reduce its lifespan.

[0003] Overcoming the problem of decreased chip performance and lifespan due to increased LDO temperature under heavy load has become one of the urgent problems to be solved by those skilled in the art.

[0004] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this utility model and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background section of this utility model. Utility Model Content

[0005] In view of the shortcomings of the prior art described above, the purpose of this utility model is to provide a voltage regulator circuit and electronic product to solve the problems of chip performance degradation and shortened lifespan caused by the temperature rise of LDO in the prior art.

[0006] To achieve the above and other related objectives, this utility model provides a voltage regulator circuit, which includes at least:

[0007] Linear regulator, shunt tube, load current detection module, overcurrent detection module and adjustment control module;

[0008] The first end of the shunt tube is connected to the power supply, and the second end is connected to the output of the linear regulator.

[0009] The load current detection module is connected to the linear regulator and detects the load current of the linear regulator; it generates a first control signal when the load current reaches the turn-on threshold and a second control signal when the load current reaches the turn-off threshold.

[0010] The overcurrent detection module detects whether the current on the shunt tube reaches the current limit value;

[0011] The adjustment control module generates the drive signal for the shunt tube based on the output signals of the load current detection module and the overcurrent detection module;

[0012] The linear regulator is located inside the chip, while the shunt is located outside the chip.

[0013] Optionally, the load current detection module includes a first sampling unit, a first current mirror, a first comparator, and a second comparator;

[0014] The first sampling unit samples the load current and inputs the sampled current to the input terminal of the first current mirror;

[0015] The first input terminal of the first comparator is connected to the first output terminal of the first current mirror, and the second input terminal receives the first reference current and outputs the first control signal.

[0016] The first input terminal of the second comparator is connected to the second output terminal of the first current mirror, and the second input terminal receives the second reference current and outputs the second control signal.

[0017] Alternatively, the first sampling unit may employ a transistor;

[0018] The first terminal of the transistor is connected to the power input terminal of the power transistor in the linear regulator, the control terminal is connected to the control terminal of the power transistor, and the second terminal is connected to the input terminal of the first current mirror.

[0019] The device type of the transistor is the same as that of the power transistor.

[0020] Optionally, the overcurrent detection module includes a second sampling unit, a second current mirror, and a third comparator;

[0021] The second sampling unit samples the current flowing through the shunt tube;

[0022] The input terminal of the second current mirror is connected to the output terminal of the second sampling unit, and the output terminal is connected to the first input terminal of the third comparator;

[0023] The second input terminal of the third comparator receives the third reference current and outputs the third control signal.

[0024] Alternatively, the second sampling unit includes a sampling resistor and a voltage-controlled current source;

[0025] The sampling resistor is connected in series between the second end of the shunt tube and the output end of the linear regulator to output a sampling voltage.

[0026] The voltage-controlled current source is connected to the output terminal of the sampling resistor and generates a corresponding current based on the sampling voltage.

[0027] Optionally, the adjustment control module includes a digital control unit, a digital-to-analog converter, and a drive unit;

[0028] The digital control unit generates sequentially increasing digital control signals based on the first control signal, generates sequentially decreasing digital control signals based on the second control signal, and maintains the current digital control signal based on the output signal of the overcurrent detection module.

[0029] The digital-to-analog converter unit generates a positively correlated voltage signal based on the digital control signal;

[0030] The driving unit is connected to the output terminal of the digital-to-analog converter unit and generates a driving signal for the shunt tube based on the voltage signal output by the digital-to-analog converter unit. When the load current reaches the turn-off threshold, the driving signal reduces the current flowing through the shunt tube; when the load current reaches the turn-on threshold, the driving signal increases the current flowing through the shunt tube; and when the current on the shunt tube reaches the current limiting value, the driving signal maintains the current flowing through the shunt tube.

[0031] Alternatively, the digital-to-analog converter unit is a resistor series voltage divider digital-to-analog converter architecture controlled by a switch array.

[0032] Alternatively, the driving unit includes a first operational amplifier, a first NMOS transistor, and a first resistor;

[0033] The non-inverting input terminal of the first operational amplifier is connected to the output terminal of the digital-to-analog converter unit, the inverting input terminal is connected to the source of the first NMOS transistor, and the output terminal is connected to the gate of the first NMOS transistor.

[0034] The drain of the first NMOS transistor is connected to the power supply and the driving terminal of the shunt transistor, and the source is grounded through the first resistor.

[0035] Alternatively, the driving unit further includes a first PMOS transistor; the source of the first PMOS transistor is connected to the power supply, the gate receives a bias voltage, and the drain is connected to the drain of the first NMOS transistor and the driving terminal of the shunt transistor.

[0036] Optionally, the shunt tube is a PNP transistor.

[0037] Alternatively, the load current detection module, the overcurrent detection module, and the adjustment control module are disposed within the chip.

[0038] To achieve the above and other related objectives, this utility model also provides an electronic product, which includes at least the above-mentioned voltage regulator circuit.

[0039] As described above, the voltage regulator circuit and electronic product of this invention have the following beneficial effects:

[0040] The voltage regulator circuit and electronic products of this invention can effectively reduce on-chip temperature rise, stabilize chip performance, and improve service life.

[0041] The voltage regulator circuit and electronic product of this invention are simple to implement. The size of the external shunt tube drive current can be adaptively adjusted according to the load size, and the maximum overcurrent capability of the shunt tube is controllable.

[0042] During the rise and fall of the load current, the total load current of the voltage regulator circuit and electronic product of this invention can be smoothly switched between the on-chip linear regulator and the external shunt tube, and the output voltage can remain stable during the switching process; when the load changes rapidly from light load to full load, the output has no large overshoot voltage and can quickly recover to stability. Attached Figure Description

[0043] Figure 1 The diagram shown is a structural schematic of the voltage regulator circuit of this utility model.

[0044] Figure 2 The diagram shown is a detailed circuit diagram of the voltage regulator circuit of this utility model.

[0045] Figure 3 The diagram shows the current waveform of the voltage regulator circuit of this invention when the load changes slowly.

[0046] Figure 4 The diagram shows the voltage waveform of the voltage regulator circuit of this invention when the load changes rapidly.

[0047] Component designation explanation

[0048] 1-Voltage regulator circuit; 11-Linear regulator; 11a-Second operational amplifier; 12-Shunt diode; 13-Load current detection module; 13a-First sampling unit; 13b-First current mirror; 13c-First comparator; 13d-Second comparator; 14-Overcurrent detection module; 14a-Second sampling unit; 14b-Second current mirror; 14c-Third comparator; 15-Adjustment control module; 15a-Digital control unit; 15b-Digital-to-analog converter; 15c-Driver unit; 151-First operational amplifier. Detailed Implementation

[0049] The following specific examples illustrate the implementation of this utility model. Those skilled in the art can easily understand other advantages and effects of this utility model from the content disclosed in this specification. This utility model can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this utility model.

[0050] Please see Figures 1-4 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of this utility model. Therefore, the drawings only show the components related to this utility model and are not drawn according to the actual number, shape and size of the components. In actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0051] like Figure 1 As shown, this utility model provides a voltage regulator circuit 1, which includes:

[0052] Linear regulator 11, shunt tube 12, load current detection module 13, overcurrent detection module 14, and adjustment control module 15.

[0053] like Figure 1 As shown, the linear regulator 11 is located inside the chip and is used to provide power to the chip, either on-chip or off-chip.

[0054] Specifically, such as Figure 2 As shown in the example, the linear regulator 11 includes a second operational amplifier 11a, a power transistor M0, a second resistor R2, and a third resistor R3. The first terminal of the power transistor M0 is connected to a power supply BAT, and the second terminal is grounded via the second resistor R2 and the third resistor R3. The second resistor R2 and the third resistor R3 form a feedback module that generates a feedback signal VFB based on the output voltage Vout of the second terminal of the power transistor M0 (used to power internal or external circuitry). The first input terminal of the second operational amplifier 11a receives the feedback signal VFB, and the second input terminal receives a reference voltage VREF. The power supply terminal is connected to the power supply BAT, and the output terminal is connected to the control terminal of the power transistor M0 to adjust the current flowing through the power transistor M0. In this example, the power supply BAT is obtained from a battery. In actual use, the power supply BAT can be implemented based on any on-chip or off-chip module capable of providing power, and is not limited to this embodiment. In this example, the power transistor M0 is implemented using a PMOS transistor, with the first terminal being the source, the second terminal being the drain, and the control terminal being the gate. In practical applications, any device that can adjust the current based on the output signal of the second operational amplifier 11a to obtain a stable output voltage is applicable to this invention, and will not be elaborated here. In this example, the output voltage VOUT satisfies: VOUT = (VREF / R3) * (R2 + R3), where VREF = VFB.

[0055] Specifically, the load is connected to the output terminal of the linear regulator 11. It can be located inside the chip or outside the chip, depending on the actual needs.

[0056] like Figure 1As shown, the shunt tube 12 is located outside the chip, with its first end connected to the power supply BAT and its second end connected to the output of the linear regulator 11, and is controlled by the adjustment control module 15.

[0057] Specifically, the shunt tube 12 is used to shunt current to the linear regulator 11 when the load is large, so as to reduce the current flowing through the power transistor M0 in the linear regulator 11 while maintaining the output voltage Vout, thereby reducing the temperature rise of the linear regulator 11 and the chip.

[0058] Specifically, in this embodiment, the shunt tube 12 is implemented using a transistor; further, it is implemented using a PNP transistor Q1. In this case, the first end of the shunt tube 12 is the emitter, the second end is the collector, and the control end is the base. In practical applications, any device or circuit that can adjust the current flowing into the output terminal of the linear regulator 11 based on the output signal of the adjustment control module 15 is applicable to this invention and is not limited to this embodiment.

[0059] like Figure 1 As shown, the load current detection module 13 is connected to the linear regulator 11 to detect the load current of the linear regulator 11; when the load current reaches the turn-on threshold, it generates a first control signal EN_PNP, and when the load current reaches the turn-off threshold, it generates a second control signal ENN_PNP.

[0060] Specifically, such as Figure 2 As shown, as an example, the load current detection module 13 includes a first sampling unit 13a, a first current mirror 13b, a first comparator 13c, and a second comparator 13d.

[0061] More specifically, the first sampling unit 13a samples the load current and inputs the sampled current to the input terminal of the first current mirror 13b. In this example, the first sampling unit 13a is implemented using a transistor. The first terminal of the transistor is connected to the power input terminal of the power transistor M0 in the linear regulator 11, the control terminal is connected to the control terminal of the power transistor M0, and the second terminal is connected to the input terminal of the first current mirror 13b. If the device type of the transistor is the same as that of the power transistor M0, then the transistor is set as the second PMOS transistor MP2, with the first terminal being the source, the second terminal being the drain, and the control terminal being the gate.

[0062] More specifically, the first current mirror 13b includes a second NMOS transistor MN2, a third NMOS transistor MN3, and a fourth NMOS transistor MN4. The drain and gate of the second NMOS transistor MN2 are connected to the output terminal of the first sampling unit 13a, and its source is grounded. The source of the third NMOS transistor MN3 is grounded, its gate is connected to the gate of the second NMOS transistor MN2, and its drain serves as the second output terminal of the first current mirror 13b. The source of the fourth NMOS transistor MN4 is grounded, its gate is connected to the gate of the second NMOS transistor MN2, and its drain serves as the first output terminal of the first current mirror 13b. In this example, the size of the third NMOS transistor MN3 is smaller than the size of the fourth NMOS transistor MN4, so that the current at the second output terminal of the first current mirror 13b is less than the current at the first output terminal. In practical applications, the sizes of the third NMOS transistor MN3 and the fourth NMOS transistor MN4 can be configured as needed to obtain the required mirrored current.

[0063] More specifically, the first input terminal of the first comparator 13c is connected to the first output terminal of the first current mirror 13b, and the second input terminal receives the first reference current IREF1 (corresponding to the turn-on threshold) and outputs the first control signal EN_PNP. When the current at the first output terminal of the first current mirror 13b is greater than the first reference current IREF1, the first control signal EN_PNP flips from low level to high level, which is used to control the adjustment control module 15 to start the increment operation so that the current flowing through the shunt tube 12 increases.

[0064] More specifically, the first input of the second comparator 13d is connected to the second output of the first current mirror 13b. The second input receives the second reference current IREF2 (corresponding to the turn-off threshold) and outputs the second control signal ENN_PNP. When the current at the first output of the first current mirror 13b is less than the second reference current IREF2, the second control signal ENN_PNP flips from high to low, controlling the adjustment control module 15 to begin a decreasing operation, thereby reducing the current flowing through the shunt tube 12. In this example, the first reference current IREF1 is greater than the second reference current IREF2.

[0065] like Figure 1 As shown, the overcurrent detection module 14 detects whether the current on the shunt tube 12 has reached the current limit value.

[0066] Specifically, in this embodiment, the overcurrent detection module 14 includes a second sampling unit 14a, a second current mirror 14b, and a third comparator 14c.

[0067] More specifically, the second sampling unit 14a samples the current flowing through the shunt tube 12. As an example, the second sampling unit 14a includes a sampling resistor Rs and a voltage-controlled current source VCCS; the sampling resistor Rs is connected in series between the second terminal of the shunt tube 12 and the output terminal of the linear regulator 11, outputting a sampling voltage; the voltage-controlled current source VCCS is connected to the output terminal of the sampling resistor Rs, generating a corresponding current based on the sampling voltage; in practical use, any structure that can sample the current flowing through the shunt tube 12 is applicable to this utility model, including but not limited to the sampling tube.

[0068] More specifically, the input terminal of the second current mirror 14b is connected to the output terminal of the second sampling unit 14a, and the output terminal is connected to the first input terminal of the third comparator 14c. As an example, the second current mirror 14b includes a fifth NMOS transistor MN5 and a sixth NMOS transistor MN6; the drain and gate of the fifth NMOS transistor MN5 are connected to the output terminal of the second sampling unit 14a, and its source is grounded; the source of the sixth NMOS transistor MN6 is grounded, its gate is connected to the gate of the fifth NMOS transistor MN5, and its drain serves as the output terminal of the second current mirror 14b.

[0069] More specifically, the second input of the third comparator 14c receives the third reference current IREF3 (corresponding to the current limit value) and outputs the third control signal PNP_iLIMIT. When the load current reaches the current limit value, the third control signal PNP_iLIMIT flips from low level to high level to control the adjustment control module 15 to maintain the current state, and the current flowing through the shunt tube 12 remains unchanged.

[0070] like Figure 1 As shown, the adjustment control module 15 generates the drive signal for the shunt tube 12 based on the output signals of the load current detection module 13 and the overcurrent detection module 14.

[0071] Specifically, in this embodiment, the adjustment control module 15 includes a digital control unit 15a, a digital-to-analog conversion unit 15b, and a drive unit 15c.

[0072] More specifically, the digital control unit 15a generates digital control signals D0~Dn (the value of n can be set as needed) based on the output signals of the load current detection module 13 and the overcurrent detection module 14; wherein, the digital control signals are generated in ascending order based on the first control signal EN_PNP, the digital control signals are generated in descending order based on the second control signal ENN_PNP, and the current digital control signal is maintained based on the third control signal PNP_iLIMIT.

[0073] More specifically, the digital-to-analog converter (DAC) 15b generates a positively correlated voltage signal based on the digital control signal; that is, as the digital control signal increases, the output voltage of the DAC 15b also increases; as the digital control signal decreases, the output voltage of the DAC 15b also decreases. As an example, the DAC 15b is a resistor-series voltage divider DAC architecture controlled by a switch array. The operating states of each switch are switched using digital control signals D0~Dn, thereby achieving voltage division of the reference REF to obtain different output voltages. The specific structure will not be detailed here; in practical applications, a multi-resistor parallel architecture or other DAC architectures can also be used.

[0074] More specifically, the driving unit 15c is connected to the output of the digital-to-analog converter unit 15b, and generates a driving signal for the shunt transistor 12 based on the voltage signal output by the digital-to-analog converter unit 15b. Specifically, when the load current reaches (decreases) to the turn-off threshold, the driving signal reduces the current flowing through the shunt transistor 12; when the load current reaches (rises) to the turn-on threshold, the driving signal increases the current flowing through the shunt transistor 12; and when the current in the shunt transistor 12 reaches the current-limiting value, the driving signal maintains the current flowing through the shunt transistor. As an example, the driving unit 15c includes a first operational amplifier 151, a first NMOS transistor MN1, and a first resistor R1; the non-inverting input of the first operational amplifier 151 is connected to the output of the digital-to-analog converter unit 15b, the inverting input is connected to the source of the first NMOS transistor MN1, and the output is connected to the gate of the first NMOS transistor MN1; the drain of the first NMOS transistor MN1 is connected to the power supply BAT and the driving terminal of the shunt transistor 12, and the source is grounded via the first resistor R1. As another example, the driving unit 15c also includes a first PMOS transistor MP1; the source of the first PMOS transistor MP1 is connected to the power supply BAT, the gate receives the bias voltage VBP, and the drain is connected to the drain of the first NMOS transistor MN1 and the driving terminal of the shunt transistor 12. The base current IB,PNP of the shunt transistor 12 increases with the increase of the input voltage of the driving unit 15c and decreases with the decrease of the input voltage of the driving unit 15c.

[0075] As another implementation of this utility model, the voltage regulator circuit 1 also includes a reference current generation module for providing various reference currents.

[0076] In another implementation of this invention, the voltage regulator circuit 1 further includes a reference voltage generation module for providing various reference voltages. Further, the reference voltage generation module generates a reference voltage based on the reference current provided by the reference current generation module.

[0077] It should be noted that, except for the shunt diode 12, which must be located outside the chip, and the linear regulator 11, which must be located inside the chip, the other modules can be located inside or outside the chip; for example, the resistor Rs used for sampling the shunt diode can be located outside the chip. In one example, to simplify the external circuitry, all modules except the shunt diode 12 are located inside the chip.

[0078] like Figure 3 As shown, when the load current reaches the turn-on threshold, the current flowing through shunt 12 gradually increases, and the current i,LDO in the linear regulator 11 remains within a certain range. As the load current continues to increase, when the current on shunt 12 reaches the current-limiting value, the current i,LDO in the linear regulator 11 surges until the load (load current) no longer increases. Similarly, when the load decreases from a large value, shunt 12 conducts at the current-limiting value, and the current I,LDO in the linear regulator 11 is at a high level. As the load load decreases, when the load current reaches the turn-off threshold, the current on shunt 12 gradually decreases, and the current I,LDO in the linear regulator 11 remains within a certain range. Figure 4 As shown, when the load LOAD changes rapidly, the output voltage VOUT remains stable overall, without significant overshoot voltage, and can quickly recover to stability.

[0079] This utility model also provides an electronic product, which includes: the voltage regulator circuit 1 of this utility model; to avoid the problem of rapid temperature rise on the chip inside the electronic product, which would lead to a decrease in the performance and a reduction in the service life of the electronic product.

[0080] In summary, this utility model provides a voltage regulator circuit and electronic product, including: a linear regulator, a shunt diode, a load current detection module, an overcurrent detection module, and an adjustment control module; wherein, the linear regulator is used for power supply; the load current detection module detects the load current, and when the load current rises to the turn-on threshold, it outputs an enable control signal to turn on the shunt diode, causing the external shunt diode to turn on; when the load current drops to the turn-off threshold, it outputs a control signal to turn off the shunt diode, causing the external shunt diode to turn off; the overcurrent detection module determines whether the current through the shunt diode reaches the current limit value; the adjustment control module receives the output signals from the load current detection module and the overcurrent detection module, and generates a drive signal for the shunt diode through voltage division. The voltage regulator circuit and electronic products of this invention can effectively reduce on-chip temperature rise, stabilize chip performance, and extend service life. The implementation is simple, and the drive current of the external shunt can be adaptively adjusted according to the load size, with controllable maximum overcurrent capability of the shunt. During load current rise and fall, the total load current can smoothly switch between the on-chip linear regulator and the external shunt, and the output voltage remains stable during the switching process. When the load rapidly changes from light load to full load, the output has no large overshoot voltage and can quickly recover to stability. Therefore, this invention effectively overcomes the various shortcomings of the prior art and has high industrial application value.

[0081] The above embodiments are merely illustrative of the principles and effects of this utility model and are not intended to limit the scope of this utility model. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this utility model. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this utility model should still be covered by the claims of this utility model.

Claims

1. A voltage regulator circuit, characterized in that, The voltage regulator circuit includes at least: Linear regulator, shunt tube, load current detection module, overcurrent detection module and adjustment control module; The first end of the shunt tube is connected to the power supply, and the second end is connected to the output of the linear regulator. The load current detection module is connected to the linear regulator and detects the load current of the linear regulator; it generates a first control signal when the load current reaches the turn-on threshold and a second control signal when the load current reaches the turn-off threshold. The overcurrent detection module detects whether the current on the shunt tube reaches the current limit value; The adjustment control module generates the drive signal for the shunt tube based on the output signals of the load current detection module and the overcurrent detection module; The linear regulator is located inside the chip, while the shunt is located outside the chip.

2. The voltage regulator circuit according to claim 1, characterized in that: The load current detection module includes a first sampling unit, a first current mirror, a first comparator, and a second comparator; The first sampling unit samples the load current and inputs the sampled current to the input terminal of the first current mirror; The first input terminal of the first comparator is connected to the first output terminal of the first current mirror, and the second input terminal receives the first reference current and outputs the first control signal. The first input terminal of the second comparator is connected to the second output terminal of the first current mirror, and the second input terminal receives the second reference current and outputs the second control signal.

3. The voltage regulator circuit according to claim 2, characterized in that: The first sampling unit uses a transistor; The first terminal of the transistor is connected to the power input terminal of the power transistor in the linear regulator, the control terminal is connected to the control terminal of the power transistor, and the second terminal is connected to the input terminal of the first current mirror. The device type of the transistor is the same as that of the power transistor.

4. The voltage regulator circuit according to claim 1, characterized in that: The overcurrent detection module includes a second sampling unit, a second current mirror, and a third comparator. The second sampling unit samples the current flowing through the shunt tube; The input terminal of the second current mirror is connected to the output terminal of the second sampling unit, and the output terminal is connected to the first input terminal of the third comparator; The second input terminal of the third comparator receives the third reference current and outputs the third control signal.

5. The voltage regulator circuit according to claim 4, characterized in that: The second sampling unit includes a sampling resistor and a voltage-controlled current source; The sampling resistor is connected in series between the second end of the shunt tube and the output end of the linear regulator to output a sampling voltage. The voltage-controlled current source is connected to the output terminal of the sampling resistor and generates a corresponding current based on the sampling voltage.

6. The voltage regulator circuit according to claim 1, characterized in that: The adjustment control module includes a digital control unit, a digital-to-analog converter, and a drive unit; The digital control unit generates sequentially increasing digital control signals based on the first control signal, generates sequentially decreasing digital control signals based on the second control signal, and maintains the current digital control signal based on the output signal of the overcurrent detection module. The digital-to-analog converter unit generates a positively correlated voltage signal based on the digital control signal; The driving unit is connected to the output terminal of the digital-to-analog converter unit and generates a driving signal for the shunt tube based on the voltage signal output by the digital-to-analog converter unit. When the load current reaches the turn-off threshold, the driving signal reduces the current flowing through the shunt tube; when the load current reaches the turn-on threshold, the driving signal increases the current flowing through the shunt tube; and when the current on the shunt tube reaches the current limiting value, the driving signal maintains the current flowing through the shunt tube.

7. The voltage regulator circuit according to claim 6, characterized in that: The digital-to-analog converter unit is a resistor series voltage divider type digital-to-analog converter architecture controlled by a switch array.

8. The voltage regulator circuit according to claim 6, characterized in that: The driving unit includes a first operational amplifier, a first NMOS transistor, and a first resistor; The non-inverting input terminal of the first operational amplifier is connected to the output terminal of the digital-to-analog converter unit, the inverting input terminal is connected to the source of the first NMOS transistor, and the output terminal is connected to the gate of the first NMOS transistor. The drain of the first NMOS transistor is connected to the power supply and the driving terminal of the shunt transistor, and the source is grounded through the first resistor.

9. The voltage regulator circuit according to claim 8, characterized in that: The driving unit further includes a first PMOS transistor; the source of the first PMOS transistor is connected to the power supply, the gate receives the bias voltage, and the drain is connected to the drain of the first NMOS transistor and the driving terminal of the shunt transistor.

10. The voltage regulator circuit according to claim 1, characterized in that: The shunt tube is a PNP transistor.

11. The voltage regulator circuit according to any one of claims 1-10, characterized in that: The load current detection module, the overcurrent detection module, and the adjustment control module are located within the chip.

12. An electronic product, characterized in that, The electronic product includes at least the voltage regulator circuit as described in any one of claims 1-11.

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